From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yb1-xb30.google.com (mail-yb1-xb30.google.com [IPv6:2607:f8b0:4864:20::b30]) by sourceware.org (Postfix) with ESMTPS id 5D0D63858D39 for ; Thu, 29 Jun 2023 04:18:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5D0D63858D39 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-yb1-xb30.google.com with SMTP id 3f1490d57ef6-c14476f8401so246623276.3 for ; Wed, 28 Jun 2023 21:18:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1688012326; x=1690604326; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=sBXFb9UFoPYm1aQ7bjaZpWchdVrZvrDBBNgkuQxf/30=; b=rFb6Crz+oQ9uv1e5WH/No+SczIzl0Ct0jmhhdwTqjsFP+pspWRxIuryJ6qOoHm0E7A Ovey3Jzp7iiXK/t3FkokeJEbtI08VEsd/WRgUZC+ewSP6z+F7VydFmRx7JwQYJdACAW/ YuwOvIjbuGx2y6tuJcPSc9BjYJ6viCC4FnOIUQjgNWvTWH4Nt97upj+9H2CkW22uuPGa ux+aAu332ZRHw7t3AH6lpqXAxeQxufpGDxH/wrr1JgRIJDiknDU+7tij4ZpDKqLPonox mJkWrkf97WmkphjTehp4J7Hsx6jcv0jlFL6+Mwgeb/ev8ovPyk8RaJ7Jk0kUxNXAPNP1 Vcrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688012326; x=1690604326; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sBXFb9UFoPYm1aQ7bjaZpWchdVrZvrDBBNgkuQxf/30=; b=CvnR/5yyn1Yr+u/ylMZh8cqw0t90LvTDtIGQVYlHUqkXMKVO2bYmVOW1ZqLo+jDo/D mK75eyaEB0GZTispD/RltSQ3FwozLm8p20AHjLu6jw3hAJ9qDyJFA/DVslUbaO3lr+wd AyMZ38vGscVXJVbTfjjpeLyymNbnWBA1w3wTPNzCto6X38vsq/Z7tmoiWSF5RX94PWEO wFaZxCMSyG7IFqnS3x0lgaDpZZJLD+mQ7RTyDeUZPmmJ+Du6Xj12+79hkxBdXcYBOhfU JrsGgXAx9aciMZgMCNrW13dyCqAVckjHj/g2Ckq3LElZHAn0MZ5SCcFDAqXlLYLJv4ZR cqtA== X-Gm-Message-State: AC+VfDxstBvBeZpp15FTG0/OA16elsMH7EkKtyXthr6SsXsmp7ZStUbq UJ2uuR3wg8FC8kU2rF5Pm6FbrDQCWl8AXSKrDRU= X-Google-Smtp-Source: ACHHUZ5oPRh1SnsdEiO1+eyS+h7MDHltId3ClRPRmZI8Jor6CLo5eK0iAD12ln5mFtdtTInGOo2jZ/LqhNvVtHpi7RI= X-Received: by 2002:a25:2d02:0:b0:bcc:a4a6:bf34 with SMTP id t2-20020a252d02000000b00bcca4a6bf34mr32086894ybt.37.1688012326654; Wed, 28 Jun 2023 21:18:46 -0700 (PDT) MIME-Version: 1.0 References: <20230629025105.1993837-1-lin1.hu@intel.com> In-Reply-To: <20230629025105.1993837-1-lin1.hu@intel.com> From: Hongtao Liu Date: Thu, 29 Jun 2023 12:18:35 +0800 Message-ID: Subject: Re: [PATCH] i386: refactor macros. To: "Hu, Lin1" Cc: gcc-patches@gcc.gnu.org, hongtao.liu@intel.com, ubizjak@gmail.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE,UPPERCASE_50_75 autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Thu, Jun 29, 2023 at 10:51=E2=80=AFAM Hu, Lin1 via Gcc-patches wrote: > > Hi, all > > This patch aims to refactor macros in case some other thing is added to > AMX_TILE_SET in future. OK for trunk? Ok, thanks. > > BRs, > Lin > > gcc/ChangeLog: > > * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SE= T): > Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET= . > (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto > (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto > (OPTION_MASK_ISA_ABM_SET): > Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET. > --- > gcc/common/config/i386/i386-common.cc | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i3= 86/i386-common.cc > index bf126f14073..4f79afba917 100644 > --- a/gcc/common/config/i386/i386-common.cc > +++ b/gcc/common/config/i386/i386-common.cc > @@ -107,18 +107,18 @@ along with GCC; see the file COPYING3. If not see > #define OPTION_MASK_ISA2_AVX512VP2INTERSECT_SET OPTION_MASK_ISA2_AVX512V= P2INTERSECT > #define OPTION_MASK_ISA2_AMX_TILE_SET OPTION_MASK_ISA2_AMX_TILE > #define OPTION_MASK_ISA2_AMX_INT8_SET \ > - (OPTION_MASK_ISA2_AMX_TILE | OPTION_MASK_ISA2_AMX_INT8) > + (OPTION_MASK_ISA2_AMX_TILE_SET | OPTION_MASK_ISA2_AMX_INT8) > #define OPTION_MASK_ISA2_AMX_BF16_SET \ > - (OPTION_MASK_ISA2_AMX_TILE | OPTION_MASK_ISA2_AMX_BF16) > + (OPTION_MASK_ISA2_AMX_TILE_SET | OPTION_MASK_ISA2_AMX_BF16) > #define OPTION_MASK_ISA2_AVXVNNIINT8_SET OPTION_MASK_ISA2_AVXVNNIINT8 > #define OPTION_MASK_ISA2_AVXNECONVERT_SET OPTION_MASK_ISA2_AVXNECONVERT > #define OPTION_MASK_ISA2_CMPCCXADD_SET OPTION_MASK_ISA2_CMPCCXADD > #define OPTION_MASK_ISA2_AMX_FP16_SET \ > - (OPTION_MASK_ISA2_AMX_TILE | OPTION_MASK_ISA2_AMX_FP16) > + (OPTION_MASK_ISA2_AMX_TILE_SET | OPTION_MASK_ISA2_AMX_FP16) > #define OPTION_MASK_ISA2_PREFETCHI_SET OPTION_MASK_ISA2_PREFETCHI > #define OPTION_MASK_ISA2_RAOINT_SET OPTION_MASK_ISA2_RAOINT > #define OPTION_MASK_ISA2_AMX_COMPLEX_SET \ > - (OPTION_MASK_ISA2_AMX_TILE | OPTION_MASK_ISA2_AMX_COMPLEX) > + (OPTION_MASK_ISA2_AMX_TILE_SET | OPTION_MASK_ISA2_AMX_COMPLEX) > > /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same > as -msse4.2. */ > @@ -143,7 +143,7 @@ along with GCC; see the file COPYING3. If not see > (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2_SET) > > #define OPTION_MASK_ISA_ABM_SET \ > - (OPTION_MASK_ISA_ABM | OPTION_MASK_ISA_POPCNT) > + (OPTION_MASK_ISA_ABM | OPTION_MASK_ISA_POPCNT_SET) > > #define OPTION_MASK_ISA2_PCONFIG_SET OPTION_MASK_ISA2_PCONFIG > #define OPTION_MASK_ISA2_WBNOINVD_SET OPTION_MASK_ISA2_WBNOINVD > -- > 2.31.1 > --=20 BR, Hongtao