From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vs1-xe43.google.com (mail-vs1-xe43.google.com [IPv6:2607:f8b0:4864:20::e43]) by sourceware.org (Postfix) with ESMTPS id 51F1C3892441 for ; Wed, 22 Jul 2020 07:57:37 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 51F1C3892441 Received: by mail-vs1-xe43.google.com with SMTP id s20so666384vsq.5 for ; Wed, 22 Jul 2020 00:57:37 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=ZFlOvmfdhX+2OXv3yexh61D/Pl3P/GxR2aAv94v3/c4=; b=By2i119YF4eJJRwuVkOfSDUECY/T6MwabFt26OjV6BkwnLCHVVmhUz7JhyaXseCbY+ IIj4GCprbL/0pvbkRiuG5AF9GtPrc0aJo0MRkJpq2EpJQrivezTtH4kztuIisgTXNSZ9 LEX3U6Ql/Az0yDYLm0bTKNA9bvaSZ978e3dKzdkA6P/v12hft3AfBhN4N1tDKTI4vQai s9Gk1xHbfsVCfCOVBZFWEC3vBkXpXGsW4BJYbvJGeUXlRDbN8iy4myH+OlGyaVA1Uprb FYIMu7DQBCb78karE2YpQFHtCEe47pmfI6vLyKBciPBOiFEaPOsqy3mc7GTvXEPV2bTQ 5Viw== X-Gm-Message-State: AOAM533dgvR1qGc/vWzneFSqZXXANQ8HB/VTYfz6qq5hiHVEJctgOTG3 aQkUIbAW04THQHL3rDlB2+xydibEJa0jwt3G/yz7gYK5HNdWnQ== X-Google-Smtp-Source: ABdhPJyuFMJaPiMKGiyo6zV42iwGKjG7yJeFO13npBQ02k0gMbfe7Xu44ZN4u1Y0yXncfpilqQqELYvmCm/Rwbeit90= X-Received: by 2002:a05:6102:1263:: with SMTP id q3mr21808185vsg.156.1595404656732; Wed, 22 Jul 2020 00:57:36 -0700 (PDT) MIME-Version: 1.0 From: Hongtao Liu Date: Wed, 22 Jul 2020 15:57:56 +0800 Message-ID: Subject: [PATCH] Using gen_int_mode instead of GEN_INT to avoid ICE caused by type promotion. To: GCC Patches , Jakub Jelinek Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 22 Jul 2020 07:57:38 -0000 Bootstrap is ok, regression test is ok for i386 backend. gcc/ PR target/96262 * config/i386/i386-expand.c (ix86_expand_vec_shift_qihi_constant): Refine. gcc/testsuite/ * gcc.target/i386/pr96262-1.c: New test. --- gcc/config/i386/i386-expand.c | 6 +++--- gcc/testsuite/gcc.target/i386/pr96262-1.c | 11 +++++++++++ 2 files changed, 14 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr96262-1.c diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c index e194214804b..d57d043106a 100644 --- a/gcc/config/i386/i386-expand.c +++ b/gcc/config/i386/i386-expand.c @@ -19537,7 +19537,7 @@ bool ix86_expand_vec_shift_qihi_constant (enum rtx_code code, rtx dest, rtx op1, rtx op2) { machine_mode qimode, himode; - unsigned int and_constant, xor_constant; + HOST_WIDE_INT and_constant, xor_constant; HOST_WIDE_INT shift_amount; rtx vec_const_and, vec_const_xor; rtx tmp, op1_subreg; @@ -19612,7 +19612,7 @@ ix86_expand_vec_shift_qihi_constant (enum rtx_code code, rtx dest, rtx op1, rtx emit_move_insn (dest, simplify_gen_subreg (qimode, tmp, himode, 0)); emit_move_insn (vec_const_and, ix86_build_const_vector (qimode, true, - GEN_INT (and_constant))); + gen_int_mode (and_constant, QImode))); emit_insn (gen_and (dest, dest, vec_const_and)); /* For ASHIFTRT, perform extra operation like @@ -19623,7 +19623,7 @@ ix86_expand_vec_shift_qihi_constant (enum rtx_code code, rtx dest, rtx op1, rtx vec_const_xor = gen_reg_rtx (qimode); emit_move_insn (vec_const_xor, ix86_build_const_vector (qimode, true, - GEN_INT (xor_constant))); + gen_int_mode (xor_constant, QImode))); emit_insn (gen_xor (dest, dest, vec_const_xor)); emit_insn (gen_sub (dest, dest, vec_const_xor)); } diff --git a/gcc/testsuite/gcc.target/i386/pr96262-1.c b/gcc/testsuite/gcc.target/i386/pr96262-1.c new file mode 100644 index 00000000000..1825388072e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr96262-1.c @@ -0,0 +1,11 @@ +/* PR target/96262 */ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -O" } */ + +typedef char __attribute__ ((__vector_size__ (64))) V; + +V +foo (V v) +{ + return ~(v << 1); +} -- -- BR, Hongtao