* [PATCH] i386: add alias for f*mul_*ch intrinsics [not found] <20211116081652.12867-1-lingling.kong@intel.com> @ 2021-11-16 8:20 ` Kong, Lingling 2021-11-16 8:35 ` Hongtao Liu 0 siblings, 1 reply; 3+ messages in thread From: Kong, Lingling @ 2021-11-16 8:20 UTC (permalink / raw) To: Kong, Lingling; +Cc: Liu, Hongtao, gcc-patches Hi, This patch is to add alias for f*mul_*ch intrinsics. Ok for master? gcc/ChangeLog: * config/i386/avx512fp16intrin.h (_mm512_mul_pch): Add alias for _mm512_fmul_pch. (_mm512_mask_mul_pch): Likewise. (_mm512_maskz_mul_pch): Likewise. (_mm512_mul_round_pch): Likewise. (_mm512_mask_mul_round_pch): Likewise. (_mm512_maskz_mul_round_pch): Likewise. (_mm512_cmul_pch): Likewise. (_mm512_mask_cmul_pch): Likewise. (_mm512_maskz_cmul_pch): Likewise. (_mm512_cmul_round_pch): Likewise. (_mm512_mask_cmul_round_pch): Likewise. (_mm512_maskz_cmul_round_pch): Likewise. (_mm_mul_sch): Likewise. (_mm_mask_mul_sch): Likewise. (_mm_maskz_mul_sch): Likewise. (_mm_mul_round_sch): Likewise. (_mm_mask_mul_round_sch): Likewise. (_mm_maskz_mul_round_sch): Likewise. (_mm_cmul_sch): Likewise. (_mm_mask_cmul_sch): Likewise. (_mm_maskz_cmul_sch): Likewise. (_mm_cmul_round_sch): Likewise. (_mm_mask_cmul_round_sch): Likewise. (_mm_maskz_cmul_round_sch): Likewise. * config/i386/avx512fp16vlintrin.h (_mm_mul_pch): Likewise. (_mm_mask_mul_pch): Likewise. (_mm_maskz_mul_pch): Likewise. (_mm256_mul_pch): Likewise. (_mm256_mask_mul_pch): Likewise. (_mm256_maskz_mul_pch): Likewise. (_mm_cmul_pch): Likewise. (_mm_mask_cmul_pch): Likewise. (_mm_maskz_cmul_pch): Likewise. (_mm256_cmul_pch): Likewise. (_mm256_mask_cmul_pch): Likewise. (_mm256_maskz_cmul_pch): Likewise. gcc/testsuite/ChangeLog: * gcc.target/i386/avx512fp16-vfcmulcph-1a.c: Add new test for alias. * gcc.target/i386/avx512fp16-vfcmulcsh-1a.c: Likewise. * gcc.target/i386/avx512fp16-vfmulcph-1a.c: Likewise. * gcc.target/i386/avx512fp16-vfmulcsh-1a.c: Likewise. * gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c: Likewise. * gcc.target/i386/avx512fp16vl-vfmulcph-1a.c: Likewise. --- gcc/config/i386/avx512fp16intrin.h | 39 +++++++++++++++++++ gcc/config/i386/avx512fp16vlintrin.h | 17 ++++++++ .../gcc.target/i386/avx512fp16-vfcmulcph-1a.c | 19 ++++++--- .../gcc.target/i386/avx512fp16-vfcmulcsh-1a.c | 19 ++++++--- .../gcc.target/i386/avx512fp16-vfmulcph-1a.c | 19 ++++++--- .../gcc.target/i386/avx512fp16-vfmulcsh-1a.c | 19 ++++++--- .../i386/avx512fp16vl-vfcmulcph-1a.c | 20 +++++++--- .../i386/avx512fp16vl-vfmulcph-1a.c | 20 +++++++--- 8 files changed, 136 insertions(+), 36 deletions(-) diff --git a/gcc/config/i386/avx512fp16intrin.h b/gcc/config/i386/avx512fp16intrin.h index 44c5e24f234..fe73e693897 100644 --- a/gcc/config/i386/avx512fp16intrin.h +++ b/gcc/config/i386/avx512fp16intrin.h @@ -7162,6 +7162,45 @@ _mm512_set1_pch (_Float16 _Complex __A) return (__m512h) _mm512_set1_ps (u.b); } +// intrinsics below are alias for f*mul_*ch #define _mm512_mul_pch(A, +B) _mm512_fmul_pch ((A), (B)) +#define _mm512_mask_mul_pch(W, U, A, B) \ + _mm512_mask_fmul_pch ((W), (U), (A), (B)) #define +_mm512_maskz_mul_pch(U, A, B) _mm512_maskz_fmul_pch ((U), (A), (B)) +#define _mm512_mul_round_pch(A, B, R) _mm512_fmul_round_pch ((A), (B), (R)) +#define _mm512_mask_mul_round_pch(W, U, A, B, R) \ + _mm512_mask_fmul_round_pch ((W), (U), (A), (B), (R)) +#define _mm512_maskz_mul_round_pch(U, A, B, R) \ + _mm512_maskz_fmul_round_pch ((U), (A), (B), (R)) + +#define _mm512_cmul_pch(A, B) _mm512_fcmul_pch ((A), (B)) +#define _mm512_mask_cmul_pch(W, U, A, B) \ + _mm512_mask_fcmul_pch ((W), (U), (A), (B)) #define +_mm512_maskz_cmul_pch(U, A, B) _mm512_maskz_fcmul_pch ((U), (A), (B)) +#define _mm512_cmul_round_pch(A, B, R) _mm512_fcmul_round_pch ((A), (B), (R)) +#define _mm512_mask_cmul_round_pch(W, U, A, B, R) \ + _mm512_mask_fcmul_round_pch ((W), (U), (A), (B), (R)) +#define _mm512_maskz_cmul_round_pch(U, A, B, R) \ + _mm512_maskz_fcmul_round_pch ((U), (A), (B), (R)) + +#define _mm_mul_sch(A, B) _mm_fmul_sch ((A), (B)) #define +_mm_mask_mul_sch(W, U, A, B) _mm_mask_fmul_sch ((W), (U), (A), (B)) +#define _mm_maskz_mul_sch(U, A, B) _mm_maskz_fmul_sch ((U), (A), (B)) +#define _mm_mul_round_sch(A, B, R) _mm_fmul_round_sch ((A), (B), (R)) +#define _mm_mask_mul_round_sch(W, U, A, B, R) \ + _mm_mask_fmul_round_sch ((W), (U), (A), (B), (R)) +#define _mm_maskz_mul_round_sch(U, A, B, R) \ + _mm_maskz_fmul_round_sch ((U), (A), (B), (R)) + +#define _mm_cmul_sch(A, B) _mm_fcmul_sch ((A), (B)) #define +_mm_mask_cmul_sch(W, U, A, B) _mm_mask_fcmul_sch ((W), (U), (A), (B)) +#define _mm_maskz_cmul_sch(U, A, B) _mm_maskz_fcmul_sch ((U), (A), (B)) +#define _mm_cmul_round_sch(A, B, R) _mm_fcmul_round_sch ((A), (B), (R)) +#define _mm_mask_cmul_round_sch(W, U, A, B, R) \ + _mm_mask_fcmul_round_sch ((W), (U), (A), (B), (R)) +#define _mm_maskz_cmul_round_sch(U, A, B, R) \ + _mm_maskz_fcmul_round_sch ((U), (A), (B), (R)) + #ifdef __DISABLE_AVX512FP16__ #undef __DISABLE_AVX512FP16__ #pragma GCC pop_options diff --git a/gcc/config/i386/avx512fp16vlintrin.h b/gcc/config/i386/avx512fp16vlintrin.h index 11f34bb6778..fb6f6921631 100644 --- a/gcc/config/i386/avx512fp16vlintrin.h +++ b/gcc/config/i386/avx512fp16vlintrin.h @@ -3337,6 +3337,23 @@ _mm_set1_pch (_Float16 _Complex __A) return (__m128h) _mm_set1_ps (u.b); } +// intrinsics below are alias for f*mul_*ch #define _mm_mul_pch(A, B) +_mm_fmul_pch ((A), (B)) #define _mm_mask_mul_pch(W, U, A, B) +_mm_mask_fmul_pch ((W), (U), (A), (B)) #define _mm_maskz_mul_pch(U, A, +B) _mm_maskz_fmul_pch ((U), (A), (B)) #define _mm256_mul_pch(A, B) +_mm256_fmul_pch ((A), (B)) +#define _mm256_mask_mul_pch(W, U, A, B) \ + _mm256_mask_fmul_pch ((W), (U), (A), (B)) #define +_mm256_maskz_mul_pch(U, A, B) _mm256_maskz_fmul_pch ((U), (A), (B)) + +#define _mm_cmul_pch(A, B) _mm_fcmul_pch ((A), (B)) #define +_mm_mask_cmul_pch(W, U, A, B) _mm_mask_fcmul_pch ((W), (U), (A), (B)) +#define _mm_maskz_cmul_pch(U, A, B) _mm_maskz_fcmul_pch ((U), (A), (B)) +#define _mm256_cmul_pch(A, B) _mm256_fcmul_pch ((A), (B)) +#define _mm256_mask_cmul_pch(W, U, A, B) \ + _mm256_mask_fcmul_pch ((W), (U), (A), (B)) #define +_mm256_maskz_cmul_pch(U, A, B) _mm256_maskz_fcmul_pch((U), (A), (B)) + #ifdef __DISABLE_AVX512FP16VL__ #undef __DISABLE_AVX512FP16VL__ #pragma GCC pop_options diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcph-1a.c index ca2f14072ba..e228393b5f0 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcph-1a.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcph-1a.c @@ -1,11 +1,11 @@ /* { dg-do compile } */ /* { dg-options "-mavx512fp16 -O2" } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfcmulcph\[ +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+( +?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfcmulcph\[ +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\ +{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfcmulcph\[ +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\ +{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfcmulcph\[ +\\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm +m\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfcmulcph\[ +\\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm +m\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfcmulcph\[ +\\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm +m\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ #include <immintrin.h> @@ -22,4 +22,11 @@ avx512f_test (void) res = _mm512_fcmul_round_pch (x1, x2, 8); res1 = _mm512_mask_fcmul_round_pch (res1, m16, x1, x2, 8); res2 = _mm512_maskz_fcmul_round_pch (m16, x1, x2, 11); + + res = _mm512_cmul_pch (x1, x2); + res1 = _mm512_mask_cmul_pch (res1, m16, x1, x2); + res2 = _mm512_maskz_cmul_pch (m16, x1, x2); res = + _mm512_cmul_round_pch (x1, x2, 8); + res1 = _mm512_mask_cmul_round_pch (res1, m16, x1, x2, 8); + res2 = _mm512_maskz_cmul_round_pch (m16, x1, x2, 11); } diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1a.c index 872d91ac257..92f58c5ae94 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1a.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1a.c @@ -1,11 +1,11 @@ /* { dg-do compile } */ /* { dg-options "-mavx512fp16 -O2" } */ -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfcmulcsh\[ +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+( +?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfcmulcsh\[ +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\ +{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfcmulcsh\[ +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\ +{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfcmulcsh\[ +\\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm +m\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfcmulcsh\[ +\\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm +m\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfcmulcsh\[ +\\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm +m\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ #include <immintrin.h> @@ -22,4 +22,11 @@ avx512f_test (void) res = _mm_fcmul_round_sch (x1, x2, 8); res1 = _mm_mask_fcmul_round_sch (res1, m8, x1, x2, 8); res2 = _mm_maskz_fcmul_round_sch (m8, x1, x2, 11); + + res = _mm_cmul_sch (x1, x2); + res1 = _mm_mask_cmul_sch (res1, m8, x1, x2); + res2 = _mm_maskz_cmul_sch (m8, x1, x2); res = _mm_cmul_round_sch + (x1, x2, 8); + res1 = _mm_mask_cmul_round_sch (res1, m8, x1, x2, 8); + res2 = _mm_maskz_cmul_round_sch (m8, x1, x2, 11); } diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcph-1a.c index f31cbca368e..4135cd25070 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcph-1a.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcph-1a.c @@ -1,11 +1,11 @@ /* { dg-do compile } */ /* { dg-options "-mavx512fp16 -O2" } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfmulcph\[ +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+( +?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmulcph\[ +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\ +{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmulcph\[ +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\ +{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmulcph\[ +\\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm +m\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmulcph\[ +\\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm +m\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmulcph\[ +\\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm +m\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ #include <immintrin.h> @@ -22,4 +22,11 @@ avx512f_test (void) res = _mm512_fmul_round_pch (x1, x2, 8); res1 = _mm512_mask_fmul_round_pch (res1, m16, x1, x2, 8); res2 = _mm512_maskz_fmul_round_pch (m16, x1, x2, 11); + + res = _mm512_mul_pch (x1, x2); + res1 = _mm512_mask_mul_pch (res1, m16, x1, x2); + res2 = _mm512_maskz_mul_pch (m16, x1, x2); res = + _mm512_mul_round_pch (x1, x2, 8); + res1 = _mm512_mask_mul_round_pch (res1, m16, x1, x2, 8); + res2 = _mm512_maskz_mul_round_pch (m16, x1, x2, 11); } diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1a.c index 5d48874b760..cdca385e0f1 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1a.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1a.c @@ -1,11 +1,11 @@ /* { dg-do compile } */ /* { dg-options "-mavx512fp16 -O2" } */ -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfmulcsh\[ +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+( +?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmulcsh\[ +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\ +{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmulcsh\[ +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\ +{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmulcsh\[ +\\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm +m\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmulcsh\[ +\\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm +m\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmulcsh\[ +\\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm +m\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ #include <immintrin.h> @@ -22,4 +22,11 @@ avx512f_test (void) res = _mm_fmul_round_sch (x1, x2, 8); res1 = _mm_mask_fmul_round_sch (res1, m8, x1, x2, 8); res2 = _mm_maskz_fmul_round_sch (m8, x1, x2, 11); + + res = _mm_mul_sch (x1, x2); + res1 = _mm_mask_mul_sch (res1, m8, x1, x2); + res2 = _mm_maskz_mul_sch (m8, x1, x2); res = _mm_mul_round_sch (x1, + x2, 8); + res1 = _mm_mask_mul_round_sch (res1, m8, x1, x2, 8); + res2 = _mm_maskz_mul_round_sch (m8, x1, x2, 11); } diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c index 4e48e9c7f85..370f9ee76de 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c @@ -1,11 +1,11 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -mavx512fp16 -mavx512vl -O2" } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfcmulcph\[ +\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } +} */ +/* { dg-final { scan-assembler-times "vfcmulcph\[ +\\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\] +\}(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfcmulcph\[ +\\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\] +\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfcmulcph\[ +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ +\\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfcmulcph\[ +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\] +\}(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfcmulcph\[ +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\] +\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ #include <immintrin.h> @@ -25,4 +25,12 @@ avx512f_test (void) res2 = _mm_fcmul_pch (x4, x5); res2 = _mm_mask_fcmul_pch (res2, m8, x4, x5); res2 = _mm_maskz_fcmul_pch (m8, x4, x5); + + res1 = _mm256_cmul_pch (x1, x2); + res1 = _mm256_mask_cmul_pch (res1, m8, x1, x2); + res1 = _mm256_maskz_cmul_pch (m8, x1, x2); + + res2 = _mm_cmul_pch (x4, x5); + res2 = _mm_mask_cmul_pch (res2, m8, x4, x5); + res2 = _mm_maskz_cmul_pch (m8, x4, x5); } diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmulcph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmulcph-1a.c index 54e58c66edb..dce9088b748 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmulcph-1a.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmulcph-1a.c @@ -1,11 +1,11 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -mavx512fp16 -mavx512vl -O2" } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfmulcph\[ +\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } +} */ +/* { dg-final { scan-assembler-times "vfmulcph\[ +\\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\] +\}(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmulcph\[ +\\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\] +\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmulcph\[ +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ +\\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmulcph\[ +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\] +\}(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vfmulcph\[ +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\] +\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ #include <immintrin.h> @@ -25,4 +25,12 @@ avx512f_test (void) res2 = _mm_fmul_pch (x4, x5); res2 = _mm_mask_fmul_pch (res2, m8, x4, x5); res2 = _mm_maskz_fmul_pch (m8, x4, x5); + + res1 = _mm256_mul_pch (x1, x2); + res1 = _mm256_mask_mul_pch (res1, m8, x1, x2); + res1 = _mm256_maskz_mul_pch (m8, x1, x2); + + res2 = _mm_mul_pch (x4, x5); + res2 = _mm_mask_mul_pch (res2, m8, x4, x5); + res2 = _mm_maskz_mul_pch (m8, x4, x5); } -- 2.18.1 ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] i386: add alias for f*mul_*ch intrinsics 2021-11-16 8:20 ` [PATCH] i386: add alias for f*mul_*ch intrinsics Kong, Lingling @ 2021-11-16 8:35 ` Hongtao Liu 2021-11-18 3:11 ` Hongtao Liu 0 siblings, 1 reply; 3+ messages in thread From: Hongtao Liu @ 2021-11-16 8:35 UTC (permalink / raw) To: Kong, Lingling; +Cc: Liu, Hongtao, gcc-patches On Tue, Nov 16, 2021 at 4:23 PM Kong, Lingling via Gcc-patches <gcc-patches@gcc.gnu.org> wrote: > > Hi, > > This patch is to add alias for f*mul_*ch intrinsics. > > Ok for master? This patch just adds some macro definitions (new aliases for intrinsic) to the header file, and I think this should be low risk. And considering that the intel intrinsic guide has been updated with those aliases, it would be inconvenienced if they were not in the latest gcc, so I think we should install this. Ok if there's no other objections. > > gcc/ChangeLog: > > * config/i386/avx512fp16intrin.h (_mm512_mul_pch): Add alias for _mm512_fmul_pch. > (_mm512_mask_mul_pch): Likewise. > (_mm512_maskz_mul_pch): Likewise. > (_mm512_mul_round_pch): Likewise. > (_mm512_mask_mul_round_pch): Likewise. > (_mm512_maskz_mul_round_pch): Likewise. > (_mm512_cmul_pch): Likewise. > (_mm512_mask_cmul_pch): Likewise. > (_mm512_maskz_cmul_pch): Likewise. > (_mm512_cmul_round_pch): Likewise. > (_mm512_mask_cmul_round_pch): Likewise. > (_mm512_maskz_cmul_round_pch): Likewise. > (_mm_mul_sch): Likewise. > (_mm_mask_mul_sch): Likewise. > (_mm_maskz_mul_sch): Likewise. > (_mm_mul_round_sch): Likewise. > (_mm_mask_mul_round_sch): Likewise. > (_mm_maskz_mul_round_sch): Likewise. > (_mm_cmul_sch): Likewise. > (_mm_mask_cmul_sch): Likewise. > (_mm_maskz_cmul_sch): Likewise. > (_mm_cmul_round_sch): Likewise. > (_mm_mask_cmul_round_sch): Likewise. > (_mm_maskz_cmul_round_sch): Likewise. > * config/i386/avx512fp16vlintrin.h (_mm_mul_pch): Likewise. > (_mm_mask_mul_pch): Likewise. > (_mm_maskz_mul_pch): Likewise. > (_mm256_mul_pch): Likewise. > (_mm256_mask_mul_pch): Likewise. > (_mm256_maskz_mul_pch): Likewise. > (_mm_cmul_pch): Likewise. > (_mm_mask_cmul_pch): Likewise. > (_mm_maskz_cmul_pch): Likewise. > (_mm256_cmul_pch): Likewise. > (_mm256_mask_cmul_pch): Likewise. > (_mm256_maskz_cmul_pch): Likewise. > > gcc/testsuite/ChangeLog: > > * gcc.target/i386/avx512fp16-vfcmulcph-1a.c: Add new test for alias. > * gcc.target/i386/avx512fp16-vfcmulcsh-1a.c: Likewise. > * gcc.target/i386/avx512fp16-vfmulcph-1a.c: Likewise. > * gcc.target/i386/avx512fp16-vfmulcsh-1a.c: Likewise. > * gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c: Likewise. > * gcc.target/i386/avx512fp16vl-vfmulcph-1a.c: Likewise. > --- > gcc/config/i386/avx512fp16intrin.h | 39 +++++++++++++++++++ > gcc/config/i386/avx512fp16vlintrin.h | 17 ++++++++ > .../gcc.target/i386/avx512fp16-vfcmulcph-1a.c | 19 ++++++--- .../gcc.target/i386/avx512fp16-vfcmulcsh-1a.c | 19 ++++++--- .../gcc.target/i386/avx512fp16-vfmulcph-1a.c | 19 ++++++--- .../gcc.target/i386/avx512fp16-vfmulcsh-1a.c | 19 ++++++--- > .../i386/avx512fp16vl-vfcmulcph-1a.c | 20 +++++++--- > .../i386/avx512fp16vl-vfmulcph-1a.c | 20 +++++++--- > 8 files changed, 136 insertions(+), 36 deletions(-) > > diff --git a/gcc/config/i386/avx512fp16intrin.h b/gcc/config/i386/avx512fp16intrin.h > index 44c5e24f234..fe73e693897 100644 > --- a/gcc/config/i386/avx512fp16intrin.h > +++ b/gcc/config/i386/avx512fp16intrin.h > @@ -7162,6 +7162,45 @@ _mm512_set1_pch (_Float16 _Complex __A) > return (__m512h) _mm512_set1_ps (u.b); } > > +// intrinsics below are alias for f*mul_*ch #define _mm512_mul_pch(A, > +B) _mm512_fmul_pch ((A), (B)) > +#define _mm512_mask_mul_pch(W, U, A, B) \ > + _mm512_mask_fmul_pch ((W), (U), (A), (B)) #define > +_mm512_maskz_mul_pch(U, A, B) _mm512_maskz_fmul_pch ((U), (A), (B)) > +#define _mm512_mul_round_pch(A, B, R) _mm512_fmul_round_pch ((A), (B), (R)) > +#define _mm512_mask_mul_round_pch(W, U, A, B, R) \ > + _mm512_mask_fmul_round_pch ((W), (U), (A), (B), (R)) > +#define _mm512_maskz_mul_round_pch(U, A, B, R) \ > + _mm512_maskz_fmul_round_pch ((U), (A), (B), (R)) > + > +#define _mm512_cmul_pch(A, B) _mm512_fcmul_pch ((A), (B)) > +#define _mm512_mask_cmul_pch(W, U, A, B) \ > + _mm512_mask_fcmul_pch ((W), (U), (A), (B)) #define > +_mm512_maskz_cmul_pch(U, A, B) _mm512_maskz_fcmul_pch ((U), (A), (B)) > +#define _mm512_cmul_round_pch(A, B, R) _mm512_fcmul_round_pch ((A), (B), (R)) > +#define _mm512_mask_cmul_round_pch(W, U, A, B, R) \ > + _mm512_mask_fcmul_round_pch ((W), (U), (A), (B), (R)) > +#define _mm512_maskz_cmul_round_pch(U, A, B, R) \ > + _mm512_maskz_fcmul_round_pch ((U), (A), (B), (R)) > + > +#define _mm_mul_sch(A, B) _mm_fmul_sch ((A), (B)) #define > +_mm_mask_mul_sch(W, U, A, B) _mm_mask_fmul_sch ((W), (U), (A), (B)) > +#define _mm_maskz_mul_sch(U, A, B) _mm_maskz_fmul_sch ((U), (A), (B)) > +#define _mm_mul_round_sch(A, B, R) _mm_fmul_round_sch ((A), (B), (R)) > +#define _mm_mask_mul_round_sch(W, U, A, B, R) \ > + _mm_mask_fmul_round_sch ((W), (U), (A), (B), (R)) > +#define _mm_maskz_mul_round_sch(U, A, B, R) \ > + _mm_maskz_fmul_round_sch ((U), (A), (B), (R)) > + > +#define _mm_cmul_sch(A, B) _mm_fcmul_sch ((A), (B)) #define > +_mm_mask_cmul_sch(W, U, A, B) _mm_mask_fcmul_sch ((W), (U), (A), (B)) > +#define _mm_maskz_cmul_sch(U, A, B) _mm_maskz_fcmul_sch ((U), (A), (B)) > +#define _mm_cmul_round_sch(A, B, R) _mm_fcmul_round_sch ((A), (B), (R)) > +#define _mm_mask_cmul_round_sch(W, U, A, B, R) \ > + _mm_mask_fcmul_round_sch ((W), (U), (A), (B), (R)) > +#define _mm_maskz_cmul_round_sch(U, A, B, R) \ > + _mm_maskz_fcmul_round_sch ((U), (A), (B), (R)) > + > #ifdef __DISABLE_AVX512FP16__ > #undef __DISABLE_AVX512FP16__ > #pragma GCC pop_options > diff --git a/gcc/config/i386/avx512fp16vlintrin.h b/gcc/config/i386/avx512fp16vlintrin.h > index 11f34bb6778..fb6f6921631 100644 > --- a/gcc/config/i386/avx512fp16vlintrin.h > +++ b/gcc/config/i386/avx512fp16vlintrin.h > @@ -3337,6 +3337,23 @@ _mm_set1_pch (_Float16 _Complex __A) > return (__m128h) _mm_set1_ps (u.b); > } > > +// intrinsics below are alias for f*mul_*ch #define _mm_mul_pch(A, B) > +_mm_fmul_pch ((A), (B)) #define _mm_mask_mul_pch(W, U, A, B) > +_mm_mask_fmul_pch ((W), (U), (A), (B)) #define _mm_maskz_mul_pch(U, A, > +B) _mm_maskz_fmul_pch ((U), (A), (B)) #define _mm256_mul_pch(A, B) > +_mm256_fmul_pch ((A), (B)) > +#define _mm256_mask_mul_pch(W, U, A, B) \ > + _mm256_mask_fmul_pch ((W), (U), (A), (B)) #define > +_mm256_maskz_mul_pch(U, A, B) _mm256_maskz_fmul_pch ((U), (A), (B)) > + > +#define _mm_cmul_pch(A, B) _mm_fcmul_pch ((A), (B)) #define > +_mm_mask_cmul_pch(W, U, A, B) _mm_mask_fcmul_pch ((W), (U), (A), (B)) > +#define _mm_maskz_cmul_pch(U, A, B) _mm_maskz_fcmul_pch ((U), (A), (B)) > +#define _mm256_cmul_pch(A, B) _mm256_fcmul_pch ((A), (B)) > +#define _mm256_mask_cmul_pch(W, U, A, B) \ > + _mm256_mask_fcmul_pch ((W), (U), (A), (B)) #define > +_mm256_maskz_cmul_pch(U, A, B) _mm256_maskz_fcmul_pch((U), (A), (B)) > + > #ifdef __DISABLE_AVX512FP16VL__ > #undef __DISABLE_AVX512FP16VL__ > #pragma GCC pop_options > diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcph-1a.c > index ca2f14072ba..e228393b5f0 100644 > --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcph-1a.c > +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcph-1a.c > @@ -1,11 +1,11 @@ > /* { dg-do compile } */ > /* { dg-options "-mavx512fp16 -O2" } */ > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+( > +?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\ > +{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\ > +{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > +\\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm > +m\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > +\\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm > +m\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > +\\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm > +m\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > #include <immintrin.h> > > @@ -22,4 +22,11 @@ avx512f_test (void) > res = _mm512_fcmul_round_pch (x1, x2, 8); > res1 = _mm512_mask_fcmul_round_pch (res1, m16, x1, x2, 8); > res2 = _mm512_maskz_fcmul_round_pch (m16, x1, x2, 11); > + > + res = _mm512_cmul_pch (x1, x2); > + res1 = _mm512_mask_cmul_pch (res1, m16, x1, x2); > + res2 = _mm512_maskz_cmul_pch (m16, x1, x2); res = > + _mm512_cmul_round_pch (x1, x2, 8); > + res1 = _mm512_mask_cmul_round_pch (res1, m16, x1, x2, 8); > + res2 = _mm512_maskz_cmul_round_pch (m16, x1, x2, 11); > } > diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1a.c > index 872d91ac257..92f58c5ae94 100644 > --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1a.c > +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1a.c > @@ -1,11 +1,11 @@ > /* { dg-do compile } */ > /* { dg-options "-mavx512fp16 -O2" } */ > -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcsh\[ > +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+( > +?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcsh\[ > +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\ > +{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcsh\[ > +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\ > +{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcsh\[ > +\\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm > +m\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcsh\[ > +\\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm > +m\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcsh\[ > +\\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm > +m\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > #include <immintrin.h> > > @@ -22,4 +22,11 @@ avx512f_test (void) > res = _mm_fcmul_round_sch (x1, x2, 8); > res1 = _mm_mask_fcmul_round_sch (res1, m8, x1, x2, 8); > res2 = _mm_maskz_fcmul_round_sch (m8, x1, x2, 11); > + > + res = _mm_cmul_sch (x1, x2); > + res1 = _mm_mask_cmul_sch (res1, m8, x1, x2); > + res2 = _mm_maskz_cmul_sch (m8, x1, x2); res = _mm_cmul_round_sch > + (x1, x2, 8); > + res1 = _mm_mask_cmul_round_sch (res1, m8, x1, x2, 8); > + res2 = _mm_maskz_cmul_round_sch (m8, x1, x2, 11); > } > diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcph-1a.c > index f31cbca368e..4135cd25070 100644 > --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcph-1a.c > +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcph-1a.c > @@ -1,11 +1,11 @@ > /* { dg-do compile } */ > /* { dg-options "-mavx512fp16 -O2" } */ > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > +/* { dg-final { scan-assembler-times "vfmulcph\[ > +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+( > +?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfmulcph\[ > +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\ > +{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfmulcph\[ > +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\ > +{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfmulcph\[ > +\\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm > +m\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfmulcph\[ > +\\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm > +m\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfmulcph\[ > +\\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm > +m\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > #include <immintrin.h> > > @@ -22,4 +22,11 @@ avx512f_test (void) > res = _mm512_fmul_round_pch (x1, x2, 8); > res1 = _mm512_mask_fmul_round_pch (res1, m16, x1, x2, 8); > res2 = _mm512_maskz_fmul_round_pch (m16, x1, x2, 11); > + > + res = _mm512_mul_pch (x1, x2); > + res1 = _mm512_mask_mul_pch (res1, m16, x1, x2); > + res2 = _mm512_maskz_mul_pch (m16, x1, x2); res = > + _mm512_mul_round_pch (x1, x2, 8); > + res1 = _mm512_mask_mul_round_pch (res1, m16, x1, x2, 8); > + res2 = _mm512_maskz_mul_round_pch (m16, x1, x2, 11); > } > diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1a.c > index 5d48874b760..cdca385e0f1 100644 > --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1a.c > +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1a.c > @@ -1,11 +1,11 @@ > /* { dg-do compile } */ > /* { dg-options "-mavx512fp16 -O2" } */ > -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > +/* { dg-final { scan-assembler-times "vfmulcsh\[ > +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+( > +?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfmulcsh\[ > +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\ > +{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfmulcsh\[ > +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\ > +{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfmulcsh\[ > +\\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm > +m\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfmulcsh\[ > +\\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm > +m\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfmulcsh\[ > +\\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm > +m\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > #include <immintrin.h> > > @@ -22,4 +22,11 @@ avx512f_test (void) > res = _mm_fmul_round_sch (x1, x2, 8); > res1 = _mm_mask_fmul_round_sch (res1, m8, x1, x2, 8); > res2 = _mm_maskz_fmul_round_sch (m8, x1, x2, 11); > + > + res = _mm_mul_sch (x1, x2); > + res1 = _mm_mask_mul_sch (res1, m8, x1, x2); > + res2 = _mm_maskz_mul_sch (m8, x1, x2); res = _mm_mul_round_sch (x1, > + x2, 8); > + res1 = _mm_mask_mul_round_sch (res1, m8, x1, x2, 8); > + res2 = _mm_maskz_mul_round_sch (m8, x1, x2, 11); > } > diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c > index 4e48e9c7f85..370f9ee76de 100644 > --- a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c > +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c > @@ -1,11 +1,11 @@ > /* { dg-do compile } */ > /* { dg-options "-mavx512f -mavx512fp16 -mavx512vl -O2" } */ > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > +\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } > +} */ > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > +\\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\] > +\}(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > +\\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\] > +\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ > +\\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\] > +\}(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\] > +\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > #include <immintrin.h> > > @@ -25,4 +25,12 @@ avx512f_test (void) > res2 = _mm_fcmul_pch (x4, x5); > res2 = _mm_mask_fcmul_pch (res2, m8, x4, x5); > res2 = _mm_maskz_fcmul_pch (m8, x4, x5); > + > + res1 = _mm256_cmul_pch (x1, x2); > + res1 = _mm256_mask_cmul_pch (res1, m8, x1, x2); > + res1 = _mm256_maskz_cmul_pch (m8, x1, x2); > + > + res2 = _mm_cmul_pch (x4, x5); > + res2 = _mm_mask_cmul_pch (res2, m8, x4, x5); > + res2 = _mm_maskz_cmul_pch (m8, x4, x5); > } > diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmulcph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmulcph-1a.c > index 54e58c66edb..dce9088b748 100644 > --- a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmulcph-1a.c > +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmulcph-1a.c > @@ -1,11 +1,11 @@ > /* { dg-do compile } */ > /* { dg-options "-mavx512f -mavx512fp16 -mavx512vl -O2" } */ > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > +/* { dg-final { scan-assembler-times "vfmulcph\[ > +\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } > +} */ > +/* { dg-final { scan-assembler-times "vfmulcph\[ > +\\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\] > +\}(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfmulcph\[ > +\\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\] > +\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfmulcph\[ > +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ > +\\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfmulcph\[ > +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\] > +\}(?:\n|\[ \\t\]+#)" 2 } } */ > +/* { dg-final { scan-assembler-times "vfmulcph\[ > +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\] > +\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > #include <immintrin.h> > > @@ -25,4 +25,12 @@ avx512f_test (void) > res2 = _mm_fmul_pch (x4, x5); > res2 = _mm_mask_fmul_pch (res2, m8, x4, x5); > res2 = _mm_maskz_fmul_pch (m8, x4, x5); > + > + res1 = _mm256_mul_pch (x1, x2); > + res1 = _mm256_mask_mul_pch (res1, m8, x1, x2); > + res1 = _mm256_maskz_mul_pch (m8, x1, x2); > + > + res2 = _mm_mul_pch (x4, x5); > + res2 = _mm_mask_mul_pch (res2, m8, x4, x5); > + res2 = _mm_maskz_mul_pch (m8, x4, x5); > } > -- > 2.18.1 > -- BR, Hongtao ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] i386: add alias for f*mul_*ch intrinsics 2021-11-16 8:35 ` Hongtao Liu @ 2021-11-18 3:11 ` Hongtao Liu 0 siblings, 0 replies; 3+ messages in thread From: Hongtao Liu @ 2021-11-18 3:11 UTC (permalink / raw) To: Kong, Lingling; +Cc: Liu, Hongtao, gcc-patches On Tue, Nov 16, 2021 at 4:35 PM Hongtao Liu <crazylht@gmail.com> wrote: > > On Tue, Nov 16, 2021 at 4:23 PM Kong, Lingling via Gcc-patches > <gcc-patches@gcc.gnu.org> wrote: > > > > Hi, > > > > This patch is to add alias for f*mul_*ch intrinsics. > > > > Ok for master? > This patch just adds some macro definitions (new aliases for > intrinsic) to the header file, and I think this should be low risk. > And considering that the intel intrinsic guide has been updated with > those aliases, it would be inconvenienced if they were not in the > latest gcc, so I think we should install this. > Ok if there's no other objections. I've installed the patch. > > > > gcc/ChangeLog: > > > > * config/i386/avx512fp16intrin.h (_mm512_mul_pch): Add alias for _mm512_fmul_pch. > > (_mm512_mask_mul_pch): Likewise. > > (_mm512_maskz_mul_pch): Likewise. > > (_mm512_mul_round_pch): Likewise. > > (_mm512_mask_mul_round_pch): Likewise. > > (_mm512_maskz_mul_round_pch): Likewise. > > (_mm512_cmul_pch): Likewise. > > (_mm512_mask_cmul_pch): Likewise. > > (_mm512_maskz_cmul_pch): Likewise. > > (_mm512_cmul_round_pch): Likewise. > > (_mm512_mask_cmul_round_pch): Likewise. > > (_mm512_maskz_cmul_round_pch): Likewise. > > (_mm_mul_sch): Likewise. > > (_mm_mask_mul_sch): Likewise. > > (_mm_maskz_mul_sch): Likewise. > > (_mm_mul_round_sch): Likewise. > > (_mm_mask_mul_round_sch): Likewise. > > (_mm_maskz_mul_round_sch): Likewise. > > (_mm_cmul_sch): Likewise. > > (_mm_mask_cmul_sch): Likewise. > > (_mm_maskz_cmul_sch): Likewise. > > (_mm_cmul_round_sch): Likewise. > > (_mm_mask_cmul_round_sch): Likewise. > > (_mm_maskz_cmul_round_sch): Likewise. > > * config/i386/avx512fp16vlintrin.h (_mm_mul_pch): Likewise. > > (_mm_mask_mul_pch): Likewise. > > (_mm_maskz_mul_pch): Likewise. > > (_mm256_mul_pch): Likewise. > > (_mm256_mask_mul_pch): Likewise. > > (_mm256_maskz_mul_pch): Likewise. > > (_mm_cmul_pch): Likewise. > > (_mm_mask_cmul_pch): Likewise. > > (_mm_maskz_cmul_pch): Likewise. > > (_mm256_cmul_pch): Likewise. > > (_mm256_mask_cmul_pch): Likewise. > > (_mm256_maskz_cmul_pch): Likewise. > > > > gcc/testsuite/ChangeLog: > > > > * gcc.target/i386/avx512fp16-vfcmulcph-1a.c: Add new test for alias. > > * gcc.target/i386/avx512fp16-vfcmulcsh-1a.c: Likewise. > > * gcc.target/i386/avx512fp16-vfmulcph-1a.c: Likewise. > > * gcc.target/i386/avx512fp16-vfmulcsh-1a.c: Likewise. > > * gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c: Likewise. > > * gcc.target/i386/avx512fp16vl-vfmulcph-1a.c: Likewise. > > --- > > gcc/config/i386/avx512fp16intrin.h | 39 +++++++++++++++++++ > > gcc/config/i386/avx512fp16vlintrin.h | 17 ++++++++ > > .../gcc.target/i386/avx512fp16-vfcmulcph-1a.c | 19 ++++++--- .../gcc.target/i386/avx512fp16-vfcmulcsh-1a.c | 19 ++++++--- .../gcc.target/i386/avx512fp16-vfmulcph-1a.c | 19 ++++++--- .../gcc.target/i386/avx512fp16-vfmulcsh-1a.c | 19 ++++++--- > > .../i386/avx512fp16vl-vfcmulcph-1a.c | 20 +++++++--- > > .../i386/avx512fp16vl-vfmulcph-1a.c | 20 +++++++--- > > 8 files changed, 136 insertions(+), 36 deletions(-) > > > > diff --git a/gcc/config/i386/avx512fp16intrin.h b/gcc/config/i386/avx512fp16intrin.h > > index 44c5e24f234..fe73e693897 100644 > > --- a/gcc/config/i386/avx512fp16intrin.h > > +++ b/gcc/config/i386/avx512fp16intrin.h > > @@ -7162,6 +7162,45 @@ _mm512_set1_pch (_Float16 _Complex __A) > > return (__m512h) _mm512_set1_ps (u.b); } > > > > +// intrinsics below are alias for f*mul_*ch #define _mm512_mul_pch(A, > > +B) _mm512_fmul_pch ((A), (B)) > > +#define _mm512_mask_mul_pch(W, U, A, B) \ > > + _mm512_mask_fmul_pch ((W), (U), (A), (B)) #define > > +_mm512_maskz_mul_pch(U, A, B) _mm512_maskz_fmul_pch ((U), (A), (B)) > > +#define _mm512_mul_round_pch(A, B, R) _mm512_fmul_round_pch ((A), (B), (R)) > > +#define _mm512_mask_mul_round_pch(W, U, A, B, R) \ > > + _mm512_mask_fmul_round_pch ((W), (U), (A), (B), (R)) > > +#define _mm512_maskz_mul_round_pch(U, A, B, R) \ > > + _mm512_maskz_fmul_round_pch ((U), (A), (B), (R)) > > + > > +#define _mm512_cmul_pch(A, B) _mm512_fcmul_pch ((A), (B)) > > +#define _mm512_mask_cmul_pch(W, U, A, B) \ > > + _mm512_mask_fcmul_pch ((W), (U), (A), (B)) #define > > +_mm512_maskz_cmul_pch(U, A, B) _mm512_maskz_fcmul_pch ((U), (A), (B)) > > +#define _mm512_cmul_round_pch(A, B, R) _mm512_fcmul_round_pch ((A), (B), (R)) > > +#define _mm512_mask_cmul_round_pch(W, U, A, B, R) \ > > + _mm512_mask_fcmul_round_pch ((W), (U), (A), (B), (R)) > > +#define _mm512_maskz_cmul_round_pch(U, A, B, R) \ > > + _mm512_maskz_fcmul_round_pch ((U), (A), (B), (R)) > > + > > +#define _mm_mul_sch(A, B) _mm_fmul_sch ((A), (B)) #define > > +_mm_mask_mul_sch(W, U, A, B) _mm_mask_fmul_sch ((W), (U), (A), (B)) > > +#define _mm_maskz_mul_sch(U, A, B) _mm_maskz_fmul_sch ((U), (A), (B)) > > +#define _mm_mul_round_sch(A, B, R) _mm_fmul_round_sch ((A), (B), (R)) > > +#define _mm_mask_mul_round_sch(W, U, A, B, R) \ > > + _mm_mask_fmul_round_sch ((W), (U), (A), (B), (R)) > > +#define _mm_maskz_mul_round_sch(U, A, B, R) \ > > + _mm_maskz_fmul_round_sch ((U), (A), (B), (R)) > > + > > +#define _mm_cmul_sch(A, B) _mm_fcmul_sch ((A), (B)) #define > > +_mm_mask_cmul_sch(W, U, A, B) _mm_mask_fcmul_sch ((W), (U), (A), (B)) > > +#define _mm_maskz_cmul_sch(U, A, B) _mm_maskz_fcmul_sch ((U), (A), (B)) > > +#define _mm_cmul_round_sch(A, B, R) _mm_fcmul_round_sch ((A), (B), (R)) > > +#define _mm_mask_cmul_round_sch(W, U, A, B, R) \ > > + _mm_mask_fcmul_round_sch ((W), (U), (A), (B), (R)) > > +#define _mm_maskz_cmul_round_sch(U, A, B, R) \ > > + _mm_maskz_fcmul_round_sch ((U), (A), (B), (R)) > > + > > #ifdef __DISABLE_AVX512FP16__ > > #undef __DISABLE_AVX512FP16__ > > #pragma GCC pop_options > > diff --git a/gcc/config/i386/avx512fp16vlintrin.h b/gcc/config/i386/avx512fp16vlintrin.h > > index 11f34bb6778..fb6f6921631 100644 > > --- a/gcc/config/i386/avx512fp16vlintrin.h > > +++ b/gcc/config/i386/avx512fp16vlintrin.h > > @@ -3337,6 +3337,23 @@ _mm_set1_pch (_Float16 _Complex __A) > > return (__m128h) _mm_set1_ps (u.b); > > } > > > > +// intrinsics below are alias for f*mul_*ch #define _mm_mul_pch(A, B) > > +_mm_fmul_pch ((A), (B)) #define _mm_mask_mul_pch(W, U, A, B) > > +_mm_mask_fmul_pch ((W), (U), (A), (B)) #define _mm_maskz_mul_pch(U, A, > > +B) _mm_maskz_fmul_pch ((U), (A), (B)) #define _mm256_mul_pch(A, B) > > +_mm256_fmul_pch ((A), (B)) > > +#define _mm256_mask_mul_pch(W, U, A, B) \ > > + _mm256_mask_fmul_pch ((W), (U), (A), (B)) #define > > +_mm256_maskz_mul_pch(U, A, B) _mm256_maskz_fmul_pch ((U), (A), (B)) > > + > > +#define _mm_cmul_pch(A, B) _mm_fcmul_pch ((A), (B)) #define > > +_mm_mask_cmul_pch(W, U, A, B) _mm_mask_fcmul_pch ((W), (U), (A), (B)) > > +#define _mm_maskz_cmul_pch(U, A, B) _mm_maskz_fcmul_pch ((U), (A), (B)) > > +#define _mm256_cmul_pch(A, B) _mm256_fcmul_pch ((A), (B)) > > +#define _mm256_mask_cmul_pch(W, U, A, B) \ > > + _mm256_mask_fcmul_pch ((W), (U), (A), (B)) #define > > +_mm256_maskz_cmul_pch(U, A, B) _mm256_maskz_fcmul_pch((U), (A), (B)) > > + > > #ifdef __DISABLE_AVX512FP16VL__ > > #undef __DISABLE_AVX512FP16VL__ > > #pragma GCC pop_options > > diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcph-1a.c > > index ca2f14072ba..e228393b5f0 100644 > > --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcph-1a.c > > +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcph-1a.c > > @@ -1,11 +1,11 @@ > > /* { dg-do compile } */ > > /* { dg-options "-mavx512fp16 -O2" } */ > > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > > +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+( > > +?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > > +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\ > > +{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > > +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\ > > +{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > > +\\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm > > +m\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > > +\\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm > > +m\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > > +\\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm > > +m\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > > > #include <immintrin.h> > > > > @@ -22,4 +22,11 @@ avx512f_test (void) > > res = _mm512_fcmul_round_pch (x1, x2, 8); > > res1 = _mm512_mask_fcmul_round_pch (res1, m16, x1, x2, 8); > > res2 = _mm512_maskz_fcmul_round_pch (m16, x1, x2, 11); > > + > > + res = _mm512_cmul_pch (x1, x2); > > + res1 = _mm512_mask_cmul_pch (res1, m16, x1, x2); > > + res2 = _mm512_maskz_cmul_pch (m16, x1, x2); res = > > + _mm512_cmul_round_pch (x1, x2, 8); > > + res1 = _mm512_mask_cmul_round_pch (res1, m16, x1, x2, 8); > > + res2 = _mm512_maskz_cmul_round_pch (m16, x1, x2, 11); > > } > > diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1a.c > > index 872d91ac257..92f58c5ae94 100644 > > --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1a.c > > +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1a.c > > @@ -1,11 +1,11 @@ > > /* { dg-do compile } */ > > /* { dg-options "-mavx512fp16 -O2" } */ > > -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcsh\[ > > +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+( > > +?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcsh\[ > > +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\ > > +{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcsh\[ > > +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\ > > +{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcsh\[ > > +\\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm > > +m\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcsh\[ > > +\\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm > > +m\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcsh\[ > > +\\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm > > +m\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > > > #include <immintrin.h> > > > > @@ -22,4 +22,11 @@ avx512f_test (void) > > res = _mm_fcmul_round_sch (x1, x2, 8); > > res1 = _mm_mask_fcmul_round_sch (res1, m8, x1, x2, 8); > > res2 = _mm_maskz_fcmul_round_sch (m8, x1, x2, 11); > > + > > + res = _mm_cmul_sch (x1, x2); > > + res1 = _mm_mask_cmul_sch (res1, m8, x1, x2); > > + res2 = _mm_maskz_cmul_sch (m8, x1, x2); res = _mm_cmul_round_sch > > + (x1, x2, 8); > > + res1 = _mm_mask_cmul_round_sch (res1, m8, x1, x2, 8); > > + res2 = _mm_maskz_cmul_round_sch (m8, x1, x2, 11); > > } > > diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcph-1a.c > > index f31cbca368e..4135cd25070 100644 > > --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcph-1a.c > > +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcph-1a.c > > @@ -1,11 +1,11 @@ > > /* { dg-do compile } */ > > /* { dg-options "-mavx512fp16 -O2" } */ > > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcph\[ > > +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+( > > +?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcph\[ > > +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\ > > +{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcph\[ > > +\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\ > > +{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcph\[ > > +\\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm > > +m\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcph\[ > > +\\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm > > +m\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcph\[ > > +\\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zm > > +m\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > > > #include <immintrin.h> > > > > @@ -22,4 +22,11 @@ avx512f_test (void) > > res = _mm512_fmul_round_pch (x1, x2, 8); > > res1 = _mm512_mask_fmul_round_pch (res1, m16, x1, x2, 8); > > res2 = _mm512_maskz_fmul_round_pch (m16, x1, x2, 11); > > + > > + res = _mm512_mul_pch (x1, x2); > > + res1 = _mm512_mask_mul_pch (res1, m16, x1, x2); > > + res2 = _mm512_maskz_mul_pch (m16, x1, x2); res = > > + _mm512_mul_round_pch (x1, x2, 8); > > + res1 = _mm512_mask_mul_round_pch (res1, m16, x1, x2, 8); > > + res2 = _mm512_maskz_mul_round_pch (m16, x1, x2, 11); > > } > > diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1a.c > > index 5d48874b760..cdca385e0f1 100644 > > --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1a.c > > +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1a.c > > @@ -1,11 +1,11 @@ > > /* { dg-do compile } */ > > /* { dg-options "-mavx512fp16 -O2" } */ > > -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcsh\[ > > +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+( > > +?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcsh\[ > > +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\ > > +{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcsh\[ > > +\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\ > > +{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcsh\[ > > +\\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm > > +m\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcsh\[ > > +\\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm > > +m\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcsh\[ > > +\\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xm > > +m\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > > > #include <immintrin.h> > > > > @@ -22,4 +22,11 @@ avx512f_test (void) > > res = _mm_fmul_round_sch (x1, x2, 8); > > res1 = _mm_mask_fmul_round_sch (res1, m8, x1, x2, 8); > > res2 = _mm_maskz_fmul_round_sch (m8, x1, x2, 11); > > + > > + res = _mm_mul_sch (x1, x2); > > + res1 = _mm_mask_mul_sch (res1, m8, x1, x2); > > + res2 = _mm_maskz_mul_sch (m8, x1, x2); res = _mm_mul_round_sch (x1, > > + x2, 8); > > + res1 = _mm_mask_mul_round_sch (res1, m8, x1, x2, 8); > > + res2 = _mm_maskz_mul_round_sch (m8, x1, x2, 11); > > } > > diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c > > index 4e48e9c7f85..370f9ee76de 100644 > > --- a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c > > +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c > > @@ -1,11 +1,11 @@ > > /* { dg-do compile } */ > > /* { dg-options "-mavx512f -mavx512fp16 -mavx512vl -O2" } */ > > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > > +\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } > > +} */ > > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > > +\\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\] > > +\}(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > > +\\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\] > > +\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > > +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ > > +\\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > > +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\] > > +\}(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfcmulcph\[ > > +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\] > > +\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > > > #include <immintrin.h> > > > > @@ -25,4 +25,12 @@ avx512f_test (void) > > res2 = _mm_fcmul_pch (x4, x5); > > res2 = _mm_mask_fcmul_pch (res2, m8, x4, x5); > > res2 = _mm_maskz_fcmul_pch (m8, x4, x5); > > + > > + res1 = _mm256_cmul_pch (x1, x2); > > + res1 = _mm256_mask_cmul_pch (res1, m8, x1, x2); > > + res1 = _mm256_maskz_cmul_pch (m8, x1, x2); > > + > > + res2 = _mm_cmul_pch (x4, x5); > > + res2 = _mm_mask_cmul_pch (res2, m8, x4, x5); > > + res2 = _mm_maskz_cmul_pch (m8, x4, x5); > > } > > diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmulcph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmulcph-1a.c > > index 54e58c66edb..dce9088b748 100644 > > --- a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmulcph-1a.c > > +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfmulcph-1a.c > > @@ -1,11 +1,11 @@ > > /* { dg-do compile } */ > > /* { dg-options "-mavx512f -mavx512fp16 -mavx512vl -O2" } */ > > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ > > -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcph\[ > > +\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } > > +} */ > > +/* { dg-final { scan-assembler-times "vfmulcph\[ > > +\\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\] > > +\}(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcph\[ > > +\\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\] > > +\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcph\[ > > +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ > > +\\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcph\[ > > +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\] > > +\}(?:\n|\[ \\t\]+#)" 2 } } */ > > +/* { dg-final { scan-assembler-times "vfmulcph\[ > > +\\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\] > > +\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ > > > > #include <immintrin.h> > > > > @@ -25,4 +25,12 @@ avx512f_test (void) > > res2 = _mm_fmul_pch (x4, x5); > > res2 = _mm_mask_fmul_pch (res2, m8, x4, x5); > > res2 = _mm_maskz_fmul_pch (m8, x4, x5); > > + > > + res1 = _mm256_mul_pch (x1, x2); > > + res1 = _mm256_mask_mul_pch (res1, m8, x1, x2); > > + res1 = _mm256_maskz_mul_pch (m8, x1, x2); > > + > > + res2 = _mm_mul_pch (x4, x5); > > + res2 = _mm_mask_mul_pch (res2, m8, x4, x5); > > + res2 = _mm_maskz_mul_pch (m8, x4, x5); > > } > > -- > > 2.18.1 > > > > > -- > BR, > Hongtao -- BR, Hongtao ^ permalink raw reply [flat|nested] 3+ messages in thread
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[not found] <20211116081652.12867-1-lingling.kong@intel.com>
2021-11-16 8:20 ` [PATCH] i386: add alias for f*mul_*ch intrinsics Kong, Lingling
2021-11-16 8:35 ` Hongtao Liu
2021-11-18 3:11 ` Hongtao Liu
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