* [PATCH] [x86]Refine constraint "Bk" to define_special_memory_constraint.
@ 2024-07-24 7:57 liuhongt
2024-07-25 7:23 ` Hongtao Liu
0 siblings, 1 reply; 3+ messages in thread
From: liuhongt @ 2024-07-24 7:57 UTC (permalink / raw)
To: gcc-patches; +Cc: crazylht, hjl.tools
For below pattern, RA may still allocate r162 as v/k register, try to
reload for address with leaq __libc_tsd_CTYPE_B@gottpoff(%rip), %rsi
which result a linker error.
(set (reg:DI 162)
(mem/u/c:DI
(const:DI (unspec:DI
[(symbol_ref:DI ("a") [flags 0x60] <var_decl 0x7f621f6e1c60 a>)]
UNSPEC_GOTNTPOFF))
Quote from H.J for why linker issue an error.
>What do these do:
>
> leaq __libc_tsd_CTYPE_B@gottpoff(%rip), %rax
> vmovq (%rax), %xmm0
>
>From x86-64 TLS psABI:
>
>The assembler generates for the x@gottpoff(%rip) expressions a R X86
>64 GOTTPOFF relocation for the symbol x which requests the linker to
>generate a GOT entry with a R X86 64 TPOFF64 relocation. The offset of
>the GOT entry relative to the end of the instruction is then used in
>the instruction. The R X86 64 TPOFF64 relocation is pro- cessed at
>program startup time by the dynamic linker by looking up the symbol x
>in the modules loaded at that point. The offset is written in the GOT
>entry and later loaded by the addq instruction.
>
>The above code sequence looks wrong to me.
Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
Ok for trunk and backport?
gcc/ChangeLog:
PR target/116043
* config/i386/constraints.md (Bk): Refine to
define_special_memory_constraint.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr116043.c: New test.
---
gcc/config/i386/constraints.md | 2 +-
gcc/testsuite/gcc.target/i386/pr116043.c | 33 ++++++++++++++++++++++++
2 files changed, 34 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr116043.c
diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md
index 7508d7a58bd..b760e7c221a 100644
--- a/gcc/config/i386/constraints.md
+++ b/gcc/config/i386/constraints.md
@@ -187,7 +187,7 @@ (define_special_memory_constraint "Bm"
"@internal Vector memory operand."
(match_operand 0 "vector_memory_operand"))
-(define_memory_constraint "Bk"
+(define_special_memory_constraint "Bk"
"@internal TLS address that allows insn using non-integer registers."
(and (match_operand 0 "memory_operand")
(not (match_test "ix86_gpr_tls_address_pattern_p (op)"))))
diff --git a/gcc/testsuite/gcc.target/i386/pr116043.c b/gcc/testsuite/gcc.target/i386/pr116043.c
new file mode 100644
index 00000000000..76553496c10
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr116043.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bf16 -O3" } */
+/* { dg-final { scan-assembler-not {(?n)lea.*@gottpoff} } } */
+
+extern __thread int a, c, i, j, k, l;
+int *b;
+struct d {
+ int e;
+} f, g;
+char *h;
+
+void m(struct d *n) {
+ b = &k;
+ for (; n->e; b++, n--) {
+ i = b && a;
+ if (i)
+ j = c;
+ }
+}
+
+char *o(struct d *n) {
+ for (; n->e;)
+ return h;
+}
+
+int q() {
+ if (l)
+ return 1;
+ int p = *o(&g);
+ m(&f);
+ m(&g);
+ l = p;
+}
--
2.31.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] [x86]Refine constraint "Bk" to define_special_memory_constraint.
2024-07-24 7:57 [PATCH] [x86]Refine constraint "Bk" to define_special_memory_constraint liuhongt
@ 2024-07-25 7:23 ` Hongtao Liu
2024-07-29 2:42 ` Hongtao Liu
0 siblings, 1 reply; 3+ messages in thread
From: Hongtao Liu @ 2024-07-25 7:23 UTC (permalink / raw)
To: Uros Bizjak; +Cc: gcc-patches, hjl.tools
On Wed, Jul 24, 2024 at 3:57 PM liuhongt <hongtao.liu@intel.com> wrote:
>
> For below pattern, RA may still allocate r162 as v/k register, try to
> reload for address with leaq __libc_tsd_CTYPE_B@gottpoff(%rip), %rsi
> which result a linker error.
>
> (set (reg:DI 162)
> (mem/u/c:DI
> (const:DI (unspec:DI
> [(symbol_ref:DI ("a") [flags 0x60] <var_decl 0x7f621f6e1c60 a>)]
> UNSPEC_GOTNTPOFF))
>
> Quote from H.J for why linker issue an error.
> >What do these do:
> >
> > leaq __libc_tsd_CTYPE_B@gottpoff(%rip), %rax
> > vmovq (%rax), %xmm0
> >
> >From x86-64 TLS psABI:
> >
> >The assembler generates for the x@gottpoff(%rip) expressions a R X86
> >64 GOTTPOFF relocation for the symbol x which requests the linker to
> >generate a GOT entry with a R X86 64 TPOFF64 relocation. The offset of
> >the GOT entry relative to the end of the instruction is then used in
> >the instruction. The R X86 64 TPOFF64 relocation is pro- cessed at
> >program startup time by the dynamic linker by looking up the symbol x
> >in the modules loaded at that point. The offset is written in the GOT
> >entry and later loaded by the addq instruction.
> >
> >The above code sequence looks wrong to me.
>
> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> Ok for trunk and backport?
>
> gcc/ChangeLog:
>
> PR target/116043
> * config/i386/constraints.md (Bk): Refine to
> define_special_memory_constraint.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/i386/pr116043.c: New test.
> ---
> gcc/config/i386/constraints.md | 2 +-
> gcc/testsuite/gcc.target/i386/pr116043.c | 33 ++++++++++++++++++++++++
> 2 files changed, 34 insertions(+), 1 deletion(-)
> create mode 100644 gcc/testsuite/gcc.target/i386/pr116043.c
>
> diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md
> index 7508d7a58bd..b760e7c221a 100644
> --- a/gcc/config/i386/constraints.md
> +++ b/gcc/config/i386/constraints.md
> @@ -187,7 +187,7 @@ (define_special_memory_constraint "Bm"
> "@internal Vector memory operand."
> (match_operand 0 "vector_memory_operand"))
>
> -(define_memory_constraint "Bk"
> +(define_special_memory_constraint "Bk"
> "@internal TLS address that allows insn using non-integer registers."
> (and (match_operand 0 "memory_operand")
> (not (match_test "ix86_gpr_tls_address_pattern_p (op)"))))
> diff --git a/gcc/testsuite/gcc.target/i386/pr116043.c b/gcc/testsuite/gcc.target/i386/pr116043.c
> new file mode 100644
> index 00000000000..76553496c10
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr116043.c
> @@ -0,0 +1,33 @@
> +/* { dg-do compile } */
> +/* { dg-options "-mavx512bf16 -O3" } */
> +/* { dg-final { scan-assembler-not {(?n)lea.*@gottpoff} } } */
> +
> +extern __thread int a, c, i, j, k, l;
> +int *b;
> +struct d {
> + int e;
> +} f, g;
> +char *h;
> +
> +void m(struct d *n) {
> + b = &k;
> + for (; n->e; b++, n--) {
> + i = b && a;
> + if (i)
> + j = c;
> + }
> +}
> +
> +char *o(struct d *n) {
> + for (; n->e;)
> + return h;
> +}
> +
> +int q() {
> + if (l)
> + return 1;
> + int p = *o(&g);
> + m(&f);
> + m(&g);
> + l = p;
> +}
> --
> 2.31.1
>
--
BR,
Hongtao
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] [x86]Refine constraint "Bk" to define_special_memory_constraint.
2024-07-25 7:23 ` Hongtao Liu
@ 2024-07-29 2:42 ` Hongtao Liu
0 siblings, 0 replies; 3+ messages in thread
From: Hongtao Liu @ 2024-07-29 2:42 UTC (permalink / raw)
To: Uros Bizjak; +Cc: gcc-patches, hjl.tools
On Thu, Jul 25, 2024 at 3:23 PM Hongtao Liu <crazylht@gmail.com> wrote:
>
> On Wed, Jul 24, 2024 at 3:57 PM liuhongt <hongtao.liu@intel.com> wrote:
> >
> > For below pattern, RA may still allocate r162 as v/k register, try to
> > reload for address with leaq __libc_tsd_CTYPE_B@gottpoff(%rip), %rsi
> > which result a linker error.
> >
> > (set (reg:DI 162)
> > (mem/u/c:DI
> > (const:DI (unspec:DI
> > [(symbol_ref:DI ("a") [flags 0x60] <var_decl 0x7f621f6e1c60 a>)]
> > UNSPEC_GOTNTPOFF))
> >
> > Quote from H.J for why linker issue an error.
> > >What do these do:
> > >
> > > leaq __libc_tsd_CTYPE_B@gottpoff(%rip), %rax
> > > vmovq (%rax), %xmm0
> > >
> > >From x86-64 TLS psABI:
> > >
> > >The assembler generates for the x@gottpoff(%rip) expressions a R X86
> > >64 GOTTPOFF relocation for the symbol x which requests the linker to
> > >generate a GOT entry with a R X86 64 TPOFF64 relocation. The offset of
> > >the GOT entry relative to the end of the instruction is then used in
> > >the instruction. The R X86 64 TPOFF64 relocation is pro- cessed at
> > >program startup time by the dynamic linker by looking up the symbol x
> > >in the modules loaded at that point. The offset is written in the GOT
> > >entry and later loaded by the addq instruction.
> > >
> > >The above code sequence looks wrong to me.
> >
> > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> > Ok for trunk and backport?
Committed and will backport after gcc14.2 is released.
> >
> > gcc/ChangeLog:
> >
> > PR target/116043
> > * config/i386/constraints.md (Bk): Refine to
> > define_special_memory_constraint.
> >
> > gcc/testsuite/ChangeLog:
> >
> > * gcc.target/i386/pr116043.c: New test.
> > ---
> > gcc/config/i386/constraints.md | 2 +-
> > gcc/testsuite/gcc.target/i386/pr116043.c | 33 ++++++++++++++++++++++++
> > 2 files changed, 34 insertions(+), 1 deletion(-)
> > create mode 100644 gcc/testsuite/gcc.target/i386/pr116043.c
> >
> > diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md
> > index 7508d7a58bd..b760e7c221a 100644
> > --- a/gcc/config/i386/constraints.md
> > +++ b/gcc/config/i386/constraints.md
> > @@ -187,7 +187,7 @@ (define_special_memory_constraint "Bm"
> > "@internal Vector memory operand."
> > (match_operand 0 "vector_memory_operand"))
> >
> > -(define_memory_constraint "Bk"
> > +(define_special_memory_constraint "Bk"
> > "@internal TLS address that allows insn using non-integer registers."
> > (and (match_operand 0 "memory_operand")
> > (not (match_test "ix86_gpr_tls_address_pattern_p (op)"))))
> > diff --git a/gcc/testsuite/gcc.target/i386/pr116043.c b/gcc/testsuite/gcc.target/i386/pr116043.c
> > new file mode 100644
> > index 00000000000..76553496c10
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/i386/pr116043.c
> > @@ -0,0 +1,33 @@
> > +/* { dg-do compile } */
> > +/* { dg-options "-mavx512bf16 -O3" } */
> > +/* { dg-final { scan-assembler-not {(?n)lea.*@gottpoff} } } */
> > +
> > +extern __thread int a, c, i, j, k, l;
> > +int *b;
> > +struct d {
> > + int e;
> > +} f, g;
> > +char *h;
> > +
> > +void m(struct d *n) {
> > + b = &k;
> > + for (; n->e; b++, n--) {
> > + i = b && a;
> > + if (i)
> > + j = c;
> > + }
> > +}
> > +
> > +char *o(struct d *n) {
> > + for (; n->e;)
> > + return h;
> > +}
> > +
> > +int q() {
> > + if (l)
> > + return 1;
> > + int p = *o(&g);
> > + m(&f);
> > + m(&g);
> > + l = p;
> > +}
> > --
> > 2.31.1
> >
>
>
> --
> BR,
> Hongtao
--
BR,
Hongtao
^ permalink raw reply [flat|nested] 3+ messages in thread
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2024-07-24 7:57 [PATCH] [x86]Refine constraint "Bk" to define_special_memory_constraint liuhongt
2024-07-25 7:23 ` Hongtao Liu
2024-07-29 2:42 ` Hongtao Liu
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