From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yw1-x1132.google.com (mail-yw1-x1132.google.com [IPv6:2607:f8b0:4864:20::1132]) by sourceware.org (Postfix) with ESMTPS id 2F9893887F5B for ; Thu, 17 Nov 2022 02:31:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 2F9893887F5B Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-yw1-x1132.google.com with SMTP id 00721157ae682-3691e040abaso5959147b3.9 for ; Wed, 16 Nov 2022 18:31:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=kz4ItTKt7YEYqOYuACl2zx5uchL6LO/HkasWU8QCeYA=; b=EvrctUctpUtzmi7PciXNHOA0ZeAm0P9AUZVOkMBCoNSpt+qVumye/Y6b4hm/ewTV2m NNX2mOibnuSBt5OLMic/guNTbR+ldiJ7BJ1vAoXeyyDtvBJw+Q0/pkl8siDe1xel3By7 rD13fraWe1pmGQOHJZqQed0a2LvLl85x7zcIi65cTnoni9q5f3aJ8iJ+xXnVwbG4U5ZN bKa5VLufy0yD/ee1pO1UNahIUwoVPBHlbj+P/VhEPl0UxZDKbtc56+fjuUOyzO1FMu1P krUjLlytL63eTo7RZ6VU/HvPuazlPrP8tyXMo2wSfbshsXtmjhA39DNogzDTKgg6FSRW rK9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=kz4ItTKt7YEYqOYuACl2zx5uchL6LO/HkasWU8QCeYA=; b=JvlDT4cKWiKo0e3MbnQfmBkEgE8r6zPU1uJ8w3N0MivbNhe60KTaXMaKnA8KC51gRb aZeGHIrzt5I5EjprrUQK6SCMadEQzFkEtXU7dqnBV/9HwpFKteVsYnZ+EmQ3H1sRljC1 cMwPsFTHZ7X2LAozQ4QLgZJnPZ9EqrO/PZXexSbjAVqLBuNxefD93ckSc8HzrHgbLiTk q49XluIsRGOQfQp8sbU8oUPT86GW/7tcKdTHXPjrE6rgjNaMsKzig/NVi6zpcCp7GGhM j6hIpT8SPyUY392oHc6uLT7XpyCgCzyylNOWoslCHZGZDvqyghAUqi/8crRLivSIyGKi Mgxw== X-Gm-Message-State: ANoB5pkKs6cOYDsrCFwlXfEdRTsmUkehLhi5HRwGC4PofgXrgETjtTUy 1xELE+aSYQ8BCS/Xr5a9gBEkZ47RqXq+D4sFpOlwotDSRgQ= X-Google-Smtp-Source: AA0mqf6pkhbhvOS3+WmETO7Ecgly9kcDlvp65RkL7hYvP6maod2DIE/xwks/Mxr261WbGszUmISeYvUAzjXST3Lgzrw= X-Received: by 2002:a81:552:0:b0:367:b4b3:3952 with SMTP id 79-20020a810552000000b00367b4b33952mr208325ywf.508.1668652262509; Wed, 16 Nov 2022 18:31:02 -0800 (PST) MIME-Version: 1.0 References: <20221111090838.7194-1-lili.cui@intel.com> In-Reply-To: <20221111090838.7194-1-lili.cui@intel.com> From: Hongtao Liu Date: Thu, 17 Nov 2022 10:30:51 +0800 Message-ID: Subject: Re: [PATCH] x86: Enable 256 move by pieces for ALDERLAKE and AVX2. To: "Cui,Lili" Cc: gcc-patches@gcc.gnu.org, hongtao.liu@intel.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Fri, Nov 11, 2022 at 5:09 PM Cui,Lili via Gcc-patches wrote: > > From: Lili Cui > > Hi Hontao, > > This patch is to enable 256 move by pieces for ALDERLAKE and AVX2. > Bootstrap is ok, and no regressions for i386/x86-64 testsuite. > > OK for master? Ok. > > > gcc/Changelog: > > * config/i386/x86-tune.def > (X86_TUNE_AVX256_MOVE_BY_PIECES): Add alderlake and avx2. > (X86_TUNE_AVX256_STORE_BY_PIECES): Ditto. > > gcc/testsuite/ChangeLog: > > * gcc.target/i386/pieces-memset-50.c: New test. > --- > gcc/config/i386/x86-tune.def | 4 ++-- > gcc/testsuite/gcc.target/i386/pieces-memset-50.c | 12 ++++++++++++ > 2 files changed, 14 insertions(+), 2 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-50.c > > diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def > index 58e29e7806a..cd66f335113 100644 > --- a/gcc/config/i386/x86-tune.def > +++ b/gcc/config/i386/x86-tune.def > @@ -536,12 +536,12 @@ DEF_TUNE (X86_TUNE_AVX256_OPTIMAL, "avx256_optimal", m_CORE_AVX512) > /* X86_TUNE_AVX256_MOVE_BY_PIECES: Optimize move_by_pieces with 256-bit > AVX instructions. */ > DEF_TUNE (X86_TUNE_AVX256_MOVE_BY_PIECES, "avx256_move_by_pieces", > - m_CORE_AVX512) > + m_ALDERLAKE | m_CORE_AVX2) > > /* X86_TUNE_AVX256_STORE_BY_PIECES: Optimize store_by_pieces with 256-bit > AVX instructions. */ > DEF_TUNE (X86_TUNE_AVX256_STORE_BY_PIECES, "avx256_store_by_pieces", > - m_CORE_AVX512) > + m_ALDERLAKE | m_CORE_AVX2) > > /* X86_TUNE_AVX512_MOVE_BY_PIECES: Optimize move_by_pieces with 512-bit > AVX instructions. */ > diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-50.c b/gcc/testsuite/gcc.target/i386/pieces-memset-50.c > new file mode 100644 > index 00000000000..c09e7c3649c > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-50.c > @@ -0,0 +1,12 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -march=alderlake" } */ > + > +extern char *dst; > + > +void > +foo (int x) > +{ > + __builtin_memset (dst, x, 64); > +} > + > +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 2 } } */ > -- > 2.17.1 > > Thanks, > Lili. -- BR, Hongtao