From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vk1-xa31.google.com (mail-vk1-xa31.google.com [IPv6:2607:f8b0:4864:20::a31]) by sourceware.org (Postfix) with ESMTPS id 7085F3858D29 for ; Fri, 24 Sep 2021 01:58:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7085F3858D29 Received: by mail-vk1-xa31.google.com with SMTP id y74so3344734vky.12 for ; Thu, 23 Sep 2021 18:58:31 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Zg8bLgrbfESxAf8UFMu+PFoK4PQ1GEuCUNGKNrZMvlg=; b=m0SrXAOHAK/g+xsXURbkgxLqROGtUbXYiyw+x3M6lJ8M7tMsRnKBx6tVgJheXu5JBC kmeNwW/DkcXP3EXkik4rxKzebioYX7UweHW2Twi5ssnsGvQqmy3xF4B6XKM566k4wyvx oSGsERt2KtmvxAVLVJw0TuCDSwU/WLU9HH7EqsFjVIi82pOfMZ5zymb9yoX9MjOoBVy4 YYM50R5TiR+DeOrvJFJF+8wBXb0poC9+W71fX2wZdC2GDlNXwR8d4hbKbLNc9OGHOXBr 2gVjchuQ2f0obhaR6shTA5EgzfncI9/5Xf77fx69jRifxmAZzESJwrM8NKrzJvKj0OvY w8zQ== X-Gm-Message-State: AOAM530QvoDnSc+CtuBiaZkTlQ4i/VAatVGVekBw0Gelq3JaMTfhw/8B 9+nFQoQnGfQTgdHFP3ymzA6XGLKV566cfs/mJss= X-Google-Smtp-Source: ABdhPJweytwiUkE0wrmX0U4BAnGNkVTGRAI+QNZy5IBpqoLr7sGXL+jVHptWncyfOfnaqBEy0reEkfb8u00nzdcJR4Y= X-Received: by 2002:a05:6122:2187:: with SMTP id j7mr3825282vkd.0.1632448711017; Thu, 23 Sep 2021 18:58:31 -0700 (PDT) MIME-Version: 1.0 References: <20210924011730.97039-1-hongtao.liu@intel.com> In-Reply-To: From: Hongtao Liu Date: Fri, 24 Sep 2021 10:04:49 +0800 Message-ID: Subject: Re: [PATCH] [GCC12] Mention Intel AVX512-FP16 and _Float16 support. To: "H.J. Lu" Cc: liuhongt , GCC Patches Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 24 Sep 2021 01:58:32 -0000 On Fri, Sep 24, 2021 at 9:42 AM H.J. Lu wrote: > > On Thu, Sep 23, 2021 at 6:38 PM Hongtao Liu wrote: > > > > On Fri, Sep 24, 2021 at 9:20 AM H.J. Lu wrote: > > > > > > On Thu, Sep 23, 2021 at 6:17 PM liuhongt wrote: > > > > > > > > Updated, mention _Float16 support. > > > > > > > > --- > > > > htdocs/gcc-12/changes.html | 13 ++++++++++++- > > > > 1 file changed, 12 insertions(+), 1 deletion(-) > > > > > > > > diff --git a/htdocs/gcc-12/changes.html b/htdocs/gcc-12/changes.html > > > > index 81f62fe3..f19c6718 100644 > > > > --- a/htdocs/gcc-12/changes.html > > > > +++ b/htdocs/gcc-12/changes.html > > > > @@ -165,7 +165,18 @@ a work-in-progress.

> > > > > > > > > > > > > > > > - > > > > +

IA-32/x86-64

> > > > +
    > > > > +
  • New ISA extension support for Intel AVX512-FP16 was added to GCC. > > > > + AVX512FP16 intrinsics are available via the -mavx512fp16 > > > > + compiler switch. > > > > +
    • > > > > +
  • For both C and C++, The _Float16 type is supported on > > > > + x86 systems with SSE2 enabled. Without {-mavx512fp16}, > > > > + _Float16 type is storage only, all operations will be > > > > > > I don't think _Float16 is storage only without AVX512FP16. > > > > > I guess you're meaning that psABI is available for _Float16 even w/o > > AVX512-FP16. > > > > How about > > > > +
  • For both C and C++, The _Float16 type is supported on > > + x86 systems with SSE2 enabled. Without {-mavx512fp16}, > > + no real AVX512-FP16 instructions are generated, all operations will be > > No need for "no real AVX512-FP16 instructions are generated". Updated. - +

    IA-32/x86-64

    +
      +
    • New ISA extension support for Intel AVX512-FP16 was added to GCC. + AVX512FP16 intrinsics are available via the -mavx512fp16 + compiler switch. +
      • +
    • For both C and C++, The _Float16 type is supported on + x86 systems with SSE2 enabled. Without {-mavx512fp16}, + all operations will be emulated by software emulation and the + float instructions. +
      • +
    > > > + emulated by software emulation and the float instructions. > > +
    • > > > > > > + emulated by software emulation and the float instructions. > > > > + > > > > +
> > > > > > > > > > > > > > > > -- > > > > 2.18.1 > > > > > > > > > > > > > -- > > > H.J. > > > > > > > > -- > > BR, > > Hongtao > > > > -- > H.J. -- BR, Hongtao