From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ua1-x933.google.com (mail-ua1-x933.google.com [IPv6:2607:f8b0:4864:20::933]) by sourceware.org (Postfix) with ESMTPS id 22B153858417 for ; Mon, 29 Nov 2021 09:48:27 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 22B153858417 Received: by mail-ua1-x933.google.com with SMTP id i6so32656389uae.6 for ; Mon, 29 Nov 2021 01:48:27 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=nugbDFvVihTlDEpO6eY10dEP5onJAiMVuzcMGTvW/dE=; b=cL3pYorm4zCpB4XuCMb8SfIJuvKcTPSH9IhB9eMo01wk5z9e/MHoKrLj2oBJ1tk50j Pd0YZLdfGq4SAG4FWVatH+Q8Hnh+AOfkOPC8vpSh3IU06NVKQLKrZoyV8wZFtJlLbOuM k21CAzoBRHsNdBgOcxzd1UG1vLL9lxRkY8+HkzjJeIetlSN2oYqbFvDtSlOFG2h6eiIU hAW6iPibQff560ED0C6yJo4/ZqMfW04XabyFyVKelN7fV/BVvvGCYS4YnYVqMIyIB74x jYiHY43uMwrd1UDPq0rH7SC5YRz3vHTjBOgwvXvpuDfPLbPWT5HTn38Wq/bVUKjUSc0U 5NyQ== X-Gm-Message-State: AOAM530LUKkNgb26nqwKst1XdwXOSvVwQ2ckA5qW+60D9Cu9yY16DUhz B3vyqieQNu0M94+sDXBK9jtbYJO8D3dmbWpE7+w= X-Google-Smtp-Source: ABdhPJyBiGtZRaS5Ar8zaYK+OkcscWc4d1N4s6YkNvrtaCWfk9KwolcmDRaIWQkXu96LMJA9hPWalFaItvcbnZopAzU= X-Received: by 2002:ab0:14a7:: with SMTP id d36mr47492095uae.96.1638179306321; Mon, 29 Nov 2021 01:48:26 -0800 (PST) MIME-Version: 1.0 References: <20211129013246.77321-1-hongtao.liu@intel.com> In-Reply-To: From: Hongtao Liu Date: Mon, 29 Nov 2021 17:55:42 +0800 Message-ID: Subject: Re: [PATCH] Fix regression introduced by r12-5536. To: Uros Bizjak Cc: liuhongt , "gcc-patches@gcc.gnu.org" , "H. J. Lu" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-9.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 29 Nov 2021 09:48:29 -0000 On Mon, Nov 29, 2021 at 3:53 PM Uros Bizjak wrote: > > On Mon, Nov 29, 2021 at 2:32 AM liuhongt wrote: > > > > There're several failures reported in [1]: > > 1. unsupported instruction `pextrw` for "pextrw $0, %xmm31, 16(%rax)" > > %vpextrw should be used in output templates. > > 2. ICE in get_attr_memory for movhi_internal since some alternatives > > are marked as TYPE_SSELOG. > > Explicitly set memory_attr for those alternatives. > > > > Also this patch fixs a typo and some latent bugs which are related to > > moving HImode from/to sse register w/o TARGET_AVX512FP16. > > > > For optimization issues discussed in PR102811, I'll create another patch for > > it. > > [1] https://gcc.gnu.org/pipermail/gcc-regression/2021-November/075893.html > > > > > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,} and > > x86_64-pc-linux-gnu{-m32\ -march=cascadelake,\ -march=cascadelake} > > Ok for trunk? > > > > gcc/ChangeLog: > > > > * config/i386/i386.c (ix86_secondary_reload): Without > > TARGET_SSE4_1, General register is needed to move HImode from > > sse register to memory. > > * config/i386/sse.md (*vec_extrachf): Use %vpextrw instead of > > pextrw in output templates. > > * config/i386/i386.md (movhi_internal): Ditto, also fix typo of > > MEM_P (operands[1]) and adjust memory/mode/prefix/type > > attribute for alternatives related to sse register. > > OK, but please use sselog1 type instead so you don't need to introduce > the memory attribute. Changed, committed as r12-5573 thanks for the review. > > Thanks, > Uros. > > > --- > > gcc/config/i386/i386.c | 2 +- > > gcc/config/i386/i386.md | 44 ++++++++++++++++++++++++++++++----------- > > gcc/config/i386/sse.md | 6 +++--- > > 3 files changed, 36 insertions(+), 16 deletions(-) > > > > diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c > > index 3dedf522c42..7cf599f57f7 100644 > > --- a/gcc/config/i386/i386.c > > +++ b/gcc/config/i386/i386.c > > @@ -19277,7 +19277,7 @@ ix86_secondary_reload (bool in_p, rtx x, reg_class_t rclass, > > } > > > > /* Require movement to gpr, and then store to memory. */ > > - if (mode == HFmode > > + if ((mode == HFmode || mode == HImode) > > && !TARGET_SSE4_1 > > && SSE_CLASS_P (rclass) > > && !in_p && MEM_P (x)) > > diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md > > index 68606e57e60..2cb3e727588 100644 > > --- a/gcc/config/i386/i386.md > > +++ b/gcc/config/i386/i386.md > > @@ -2528,12 +2528,12 @@ (define_insn "*movhi_internal" > > case TYPE_SSELOG: > > if (SSE_REG_P (operands[0])) > > return MEM_P (operands[1]) > > - ? "pinsrw\t{$0, %1, %0|%0, %1, 0}" > > - : "pinsrw\t{$0, %k1, %0|%0, %k1, 0}"; > > + ? "%vpinsrw\t{$0, %1, %0|%0, %1, 0}" > > + : "%vpinsrw\t{$0, %k1, %0|%0, %k1, 0}"; > > else > > - return MEM_P (operands[1]) > > - ? "pextrw\t{$0, %1, %0|%0, %1, 0}" > > - : "pextrw\t{$0, %1, %k0|%k0, %k1, 0}"; > > + return MEM_P (operands[0]) > > + ? "%vpextrw\t{$0, %1, %0|%0, %1, 0}" > > + : "%vpextrw\t{$0, %1, %k0|%k0, %1, 0}"; > > > > case TYPE_MSKLOG: > > if (operands[1] == const0_rtx) > > @@ -2557,12 +2557,14 @@ (define_insn "*movhi_internal" > > ] > > (const_string "*"))) > > (set (attr "type") > > - (cond [(eq_attr "alternative" "9,10,11,12,13") > > + (cond [(eq_attr "alternative" "9,10,12,13") > > (if_then_else (match_test "TARGET_AVX512FP16") > > (const_string "ssemov") > > (const_string "sselog")) > > (eq_attr "alternative" "4,5,6,7") > > (const_string "mskmov") > > + (eq_attr "alternative" "11") > > + (const_string "ssemov") > > (eq_attr "alternative" "8") > > (const_string "msklog") > > (match_test "optimize_function_for_size_p (cfun)") > > @@ -2579,15 +2581,33 @@ (define_insn "*movhi_internal" > > (const_string "imovx") > > ] > > (const_string "imov"))) > > + (set (attr "memory") > > + (cond [(eq_attr "alternative" "9,10") > > + (const_string "none") > > + (eq_attr "alternative" "12") > > + (const_string "load") > > + (eq_attr "alternative" "13") > > + (const_string "store") > > + ] > > + (const_string "*"))) > > Please use sselog1 type instead, and the memory attribute will be > calculated correctly. > > > (set (attr "prefix") > > - (if_then_else (eq_attr "alternative" "4,5,6,7,8") > > - (const_string "vex") > > - (const_string "orig"))) > > + (cond [(eq_attr "alternative" "9,10,11,12,13") > > + (const_string "maybe_evex") > > + (eq_attr "alternative" "4,5,6,7,8") > > + (const_string "vex") > > + ] > > + (const_string "orig"))) > > (set (attr "mode") > > (cond [(eq_attr "type" "imovx") > > (const_string "SI") > > + (eq_attr "alternative" "9,10,12,13") > > + (if_then_else (match_test "TARGET_AVX512FP16") > > + (const_string "HI") > > + (const_string "TI")) > > (eq_attr "alternative" "11") > > - (const_string "HF") > > + (if_then_else (match_test "TARGET_AVX512FP16") > > + (const_string "HF") > > + (const_string "SF")) > > (and (eq_attr "alternative" "1,2") > > (match_operand:HI 1 "aligned_operand")) > > (const_string "SI") > > @@ -3791,9 +3811,9 @@ (define_insn "*movhf_internal" > > ? "pinsrw\t{$0, %1, %0|%0, %1, 0}" > > : "pinsrw\t{$0, %k1, %0|%0, %k1, 0}"; > > else > > - return MEM_P (operands[1]) > > + return MEM_P (operands[0]) > > ? "pextrw\t{$0, %1, %0|%0, %1, 0}" > > - : "pextrw\t{$0, %1, %k0|%k0, %k1, 0}"; > > + : "pextrw\t{$0, %1, %k0|%k0, %1, 0}"; > > > > default: > > gcc_unreachable (); > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > > index b109c2aa8fa..5229b23af98 100644 > > --- a/gcc/config/i386/sse.md > > +++ b/gcc/config/i386/sse.md > > @@ -11315,9 +11315,9 @@ (define_insn "*vec_extracthf" > > switch (which_alternative) > > { > > case 0: > > - return "vpextrw\t{%2, %1, %k0|%k0, %1, %2}"; > > + return "%vpextrw\t{%2, %1, %k0|%k0, %1, %2}"; > > case 1: > > - return "vpextrw\t{%2, %1, %0|%0, %1, %2}"; > > + return "%vpextrw\t{%2, %1, %0|%0, %1, %2}"; > > > > case 2: > > operands[2] = GEN_INT (INTVAL (operands[2]) * 2); > > @@ -11330,7 +11330,7 @@ (define_insn "*vec_extracthf" > > gcc_unreachable (); > > } > > } > > - [(set_attr "isa" "*,*,noavx,avx") > > + [(set_attr "isa" "*,sse4,noavx,avx") > > (set_attr "type" "sselog1,sselog1,sseishft1,sseishft1") > > (set_attr "prefix" "maybe_evex") > > (set_attr "mode" "TI")]) > > -- > > 2.18.1 > > -- BR, Hongtao