From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qt1-x82f.google.com (mail-qt1-x82f.google.com [IPv6:2607:f8b0:4864:20::82f]) by sourceware.org (Postfix) with ESMTPS id 540573959C96 for ; Mon, 3 Jun 2024 06:49:30 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 540573959C96 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 540573959C96 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::82f ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1717397372; cv=none; b=HqfOQBbNBSMI1zRpwvAQnXjBSxBCMkT3hT0ZG4q8bDjtY6dAHEg/Dssiwx2tTM3VwZC35OQxf3ZEXBlUdo3vc6YNZ8F9MsGGltINVFHVJJOy7N709KpiD7bl41CQXo5OqtxVxGe67iUOnTv8dnNZjCR6vaKY8QjI25tTcP1smyo= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1717397372; c=relaxed/simple; bh=xaVlbHD0XTXdltd5mCzYn7JcNEeilVv1u0lUagUBJNo=; h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To; b=aCiVlyxzusSq+1bcXAPXORaAq6gLfl68ga+DRoFn3wISQCE/JYi+1gmSzF/dgZDPGCdaSv9Xc+C79MZc5HSuNMOAZqri9XEP1h4hgPeuxTKYZJAmvXqiTpSNkD1Z/Py5300chp7qj/Hs83lgrIBXnlckZsKBZ5HpxHHE3Yg2neA= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-qt1-x82f.google.com with SMTP id d75a77b69052e-43fdb114e07so15386251cf.2 for ; Sun, 02 Jun 2024 23:49:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1717397369; x=1718002169; darn=gcc.gnu.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=J90VthUzk58wNAmNGuHy/7qz2dyIl817lituX/jCRs4=; b=BTntK+saiUBXS9MgWd5OimocX9N2/xO1ZapgIoATxzm2RrzOUMUOeqOdwcIXsLy4Na SE1NvUjL6gLZj+pRId8MpZcrI3oNc3LIFSR6siKdYpgf7pua3ro1aTMWF0sk/0gNbAMc LJFeHlh1CzFHWGUqe3HNeIaHtArf4Ct7vevwPLqvkAU20tUw353Uca7f9qCV46wwz/pX VkI+8+H0+JmWESp7/M2DzZvHZMwJh7GjKISXbBSfb/gV13QLHMpIMgFhmgXpfqrkLJHJ 7ZSNFJTNuN5nfi8LbwRrFo9r6AdnGBo0sxB3vRLJOyrodf4LhPd+YS9ludZEwc27NeSo goeg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717397369; x=1718002169; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=J90VthUzk58wNAmNGuHy/7qz2dyIl817lituX/jCRs4=; b=W5urvy0tgYiddvYc77Tw5fP9Oe3dzaYjeLic7y96lYOgbO2tM8QSjAaR/53sIa6PVX XG1rTTDRhzP4e5cl07cDcBSt1gjFs9vB9J+y/HpRWJHNK8fOZlHyP0CDgllZuc0R62lu DlwtUVLJBdlxVFUYfKxUwbDj9mRfUN4hwm46PVKAbQQByMCKOgyaXcskC49GH17c286c wyNrxwQT/K6QVp4DgvaqoLrsfhDMEObemkisv/GTK7I4WCPY6rVpLCyo9nD9HpoJ9Lcr Y4zfHHlztQlkFxHm7jLKQkuWJSNsKwUjHz1uE8OopOhVol8Ir+QpF076B14kWrVq3jQo hitw== X-Gm-Message-State: AOJu0YziPmGe6ouuQVbR1uKVrKF6OqNUQi5+x0tRj8YD8V8Jl4pLlSuv qo9A8qFPLpqKn3US8jZypOWdqCaZ8Ztf53mSggBZ+3cxqqcmeSyYGOllxdR89VIAS9aoJwm858U F0EDKXuvFOcUYdZx5q7pW2Q34VeM= X-Google-Smtp-Source: AGHT+IF7CriHbwgbZpKKGVZvHINoZ5ZWYbkFB2tbpLcnDGktmpJ2AfDJWbga6wfjhvQ2CdzJFlMqLGb7OivtU9m2QOk= X-Received: by 2002:a05:6214:242f:b0:6ae:d615:b82 with SMTP id 6a1803df08f44-6aed6151230mr111536686d6.7.1717397369562; Sun, 02 Jun 2024 23:49:29 -0700 (PDT) MIME-Version: 1.0 References: <20240529030459.4015833-1-haochen.jiang@intel.com> In-Reply-To: <20240529030459.4015833-1-haochen.jiang@intel.com> From: Hongtao Liu Date: Mon, 3 Jun 2024 14:49:18 +0800 Message-ID: Subject: Re: [PATCH] Add AVX10.1 target_clones support To: Haochen Jiang Cc: gcc-patches@gcc.gnu.org, hongtao.liu@intel.com, ubizjak@gmail.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Wed, May 29, 2024 at 11:05=E2=80=AFAM Haochen Jiang wrote: > > Hi all, > > Since AVX10 is the first major ISA introduced after AVX-512, we propose > to add target_clones support for it. > > Although AVX10.1-256 won't cover 512-bit part of AVX512F, but since > it is only for priority but not for implication, it won't be an issue. > > Bootstrapped and regtested on x86_64-pc-linux-gnu. Ok for trunk and backp= ort > to GCC14? Ok. > > Thx, > hAOCHEN > > gcc/ChangeLog: > > * common/config/i386/i386-common.cc: Change Granite Rapids > series CPU type to P_PROC_AVX10_1_512. > * common/config/i386/i386-cpuinfo.h (enum feature_priority): > Revise comment part. Add P_AVX10_1_256, P_AVX10_1_512, > P_PROC_AVX10_1_512. > * common/config/i386/i386-isas.h: Link to avx10.1-256, avx10.1-51= 2. > > gcc/testsuite/ChangeLog: > > * gcc.target/i386/avx10_1-25.c: New test. > * gcc.target/i386/avx10_1-26.c: Ditto. > --- > gcc/common/config/i386/i386-common.cc | 4 ++-- > gcc/common/config/i386/i386-cpuinfo.h | 5 ++++- > gcc/common/config/i386/i386-isas.h | 4 ++-- > gcc/testsuite/gcc.target/i386/avx10_1-25.c | 9 +++++++++ > gcc/testsuite/gcc.target/i386/avx10_1-26.c | 9 +++++++++ > 5 files changed, 26 insertions(+), 5 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-25.c > create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-26.c > > diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i3= 86/i386-common.cc > index 77b154663bc..d578918dfb7 100644 > --- a/gcc/common/config/i386/i386-common.cc > +++ b/gcc/common/config/i386/i386-common.cc > @@ -2273,10 +2273,10 @@ const pta processor_alias_table[] =3D > {"meteorlake", PROCESSOR_ALDERLAKE, CPU_HASWELL, PTA_ALDERLAKE, > M_CPU_SUBTYPE (INTEL_COREI7_ALDERLAKE), P_PROC_AVX2}, > {"graniterapids", PROCESSOR_GRANITERAPIDS, CPU_HASWELL, PTA_GRANITERAP= IDS, > - M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS), P_PROC_AVX512F}, > + M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS), P_PROC_AVX10_1_512}, > {"graniterapids-d", PROCESSOR_GRANITERAPIDS_D, CPU_HASWELL, > PTA_GRANITERAPIDS_D, M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS_D), > - P_PROC_AVX512F}, > + P_PROC_AVX10_1_512}, > {"arrowlake", PROCESSOR_ARROWLAKE, CPU_HASWELL, PTA_ARROWLAKE, > M_CPU_SUBTYPE (INTEL_COREI7_ARROWLAKE), P_PROC_AVX2}, > {"arrowlake-s", PROCESSOR_ARROWLAKE_S, CPU_HASWELL, PTA_ARROWLAKE_S, > diff --git a/gcc/common/config/i386/i386-cpuinfo.h b/gcc/common/config/i3= 86/i386-cpuinfo.h > index 73131657eab..be52ad2c60d 100644 > --- a/gcc/common/config/i386/i386-cpuinfo.h > +++ b/gcc/common/config/i386/i386-cpuinfo.h > @@ -112,7 +112,7 @@ enum processor_subtypes > /* Priority of i386 features, greater value is higher priority. This i= s > used to decide the order in which function dispatch must happen. For > instance, a version specialized for SSE4.2 should be checked for disp= atch > - before a version for SSE3, as SSE4.2 implies SSE3. */ > + before a version for SSE3. */ > enum feature_priority > { > P_NONE =3D 0, > @@ -148,6 +148,9 @@ enum feature_priority > P_AVX512F, > P_PROC_AVX512F, > P_X86_64_V4, > + P_AVX10_1_256, > + P_AVX10_1_512, > + P_PROC_AVX10_1_512, > P_PROC_DYNAMIC > }; > > diff --git a/gcc/common/config/i386/i386-isas.h b/gcc/common/config/i386/= i386-isas.h > index d6deb9a1522..9c2179a3dd8 100644 > --- a/gcc/common/config/i386/i386-isas.h > +++ b/gcc/common/config/i386/i386-isas.h > @@ -194,6 +194,6 @@ ISA_NAMES_TABLE_START > ISA_NAMES_TABLE_ENTRY("apxf", FEATURE_APX_F, P_NONE, "-mapxf") > ISA_NAMES_TABLE_ENTRY("usermsr", FEATURE_USER_MSR, P_NONE, "-musermsr"= ) > ISA_NAMES_TABLE_ENTRY("avx10.1", FEATURE_AVX10_1_256, P_NONE, "-mavx10= .1") > - ISA_NAMES_TABLE_ENTRY("avx10.1-256", FEATURE_AVX10_1_256, P_NONE, "-ma= vx10.1-256") > - ISA_NAMES_TABLE_ENTRY("avx10.1-512", FEATURE_AVX10_1_512, P_NONE, "-ma= vx10.1-512") > + ISA_NAMES_TABLE_ENTRY("avx10.1-256", FEATURE_AVX10_1_256, P_AVX10_1_25= 6, "-mavx10.1-256") > + ISA_NAMES_TABLE_ENTRY("avx10.1-512", FEATURE_AVX10_1_512, P_AVX10_1_51= 2, "-mavx10.1-512") > ISA_NAMES_TABLE_END > diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-25.c b/gcc/testsuite/g= cc.target/i386/avx10_1-25.c > new file mode 100644 > index 00000000000..73f1b724560 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/avx10_1-25.c > @@ -0,0 +1,9 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -mavx" } */ > + > +#include > +__attribute__((target_clones ("default","avx10.1-256"))) > +__m256d foo(__m256d a, __m256d b) > +{ > + return a + b; > +} > diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-26.c b/gcc/testsuite/g= cc.target/i386/avx10_1-26.c > new file mode 100644 > index 00000000000..514ab57a406 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/avx10_1-26.c > @@ -0,0 +1,9 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -mavx512f" } */ > + > +#include > +__attribute__((target_clones ("default","avx10.1-512"))) > +__m512d foo(__m512d a, __m512d b) > +{ > + return a + b; > +} > -- > 2.31.1 > --=20 BR, Hongtao