From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yb1-xb2c.google.com (mail-yb1-xb2c.google.com [IPv6:2607:f8b0:4864:20::b2c]) by sourceware.org (Postfix) with ESMTPS id 6EF693858426 for ; Mon, 14 Nov 2022 02:14:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6EF693858426 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-yb1-xb2c.google.com with SMTP id e68so9120376ybh.2 for ; Sun, 13 Nov 2022 18:14:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=JAkEICvJb4Up6qjoZG8xy5dreBKyLTDs1kalr9l1fjo=; b=ZiFLQhAl3w4jlSxpIudOQkcO/uR0jpLP3ZfZ2GYz9SFrxfpLNN1/Hp0p8RbZsxodyE udtji/1NWHw0JawxUvegKlroH41XmJGlRakNwtzXXViadCJ7NaeQ+ZqYy7drJ4tJ5u8K /PIol3Ep9OT5ZEwz/fxhHspUdIGBMhrUE/7j6TmUCDmIVZxu9EWEAwNkDzZYZ4IVS3BS Z3YBKbJzz1dEJtyLaN73TELI8dZGUXPxJTc7BAs5POpzbsSQPyogyr5ZT8VYQqVpN9ug /drHpKXkH3+pgeGAmdQ0SVyXLg4snRczaax9y3h6Ny1vQ+dSymX1S8lBRBkC88FZEBdI fLIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=JAkEICvJb4Up6qjoZG8xy5dreBKyLTDs1kalr9l1fjo=; b=3Abcmyh+1l3ylTHX20VuKbws6cIsKFOg9dw3NCwgG7Uxx2e0UEOg9cdiERcWKqbhft GGc5Z2dKyBOl56VH/OKhuQO44XkcCJghkbxONqRtDLmIZvUFZXoojqA+lTVYKmj1cS88 7TgNP5HGuq8bc/ytG8n3RPCPVRMIGten2thWfnMmsq9890bk/NMtwT5gEr5fyq3981L7 8P0uQoAO7+EpqLqOIm9nvAodcr+iYTzMgo/Gelv1bCbSnFneHGCK4JNVNVeLgTtzKHjN sOHx7E5GoDADApjZOd0rae79itC5nBOjR3RaUVecGLEXTExgY8nifAV2ToT384W9cDo4 c1QQ== X-Gm-Message-State: ANoB5pkGl+5yTvbYcyZV0C5Lzvdsi4q+4OSkM64FPobFi9x8HvsJNFq0 R7IS3YXVqNZNc/WYn5IP+iSSNs987cC4+n7kdV4= X-Google-Smtp-Source: AA0mqf4rWS2Fda3NcvtyzVwaACFnjxh6M37MlJ2O6cZI7LAoactRoqN8rMR1Q00vokRJoxkhQi5M5/FU7sithEL4Tyo= X-Received: by 2002:a25:b109:0:b0:6dd:b9a3:7ad4 with SMTP id g9-20020a25b109000000b006ddb9a37ad4mr10922233ybj.611.1668392070811; Sun, 13 Nov 2022 18:14:30 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Hongtao Liu Date: Mon, 14 Nov 2022 10:14:19 +0800 Message-ID: Subject: Re: [PATCH][i386]: Update ix86_can_change_mode_class target hook to accept QImode conversions To: Tamar Christina Cc: gcc-patches@gcc.gnu.org, nd@arm.com, hubicka@ucw.cz, ubizjak@gmail.com, kirill.yukhin@gmail.com, hongtao.liu@intel.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Fri, Nov 11, 2022 at 10:47 PM Tamar Christina via Gcc-patches wrote: > > Hi All, > > The current i386 implementation of the TARGET_CAN_CHANGE_MODE_CLASS is currently > not useful before re-alloc. > > In particular before regalloc optimization passes query the hook using ALL_REGS, > but because of the > > if (MAYBE_FLOAT_CLASS_P (regclass)) > return false; > > The hook returns false for all modes, even integer ones because ALL_REGS > overlaps with floating point regs. > > The vector permute fallback cases used to unconditionally convert vector integer > permutes to vector QImode ones as a fallback plan. This is incorrect and can > result in incorrect code if the target doesn't support this conversion. > > To fix this some more checks were added, however that ended up introducing ICEs > in the i386 backend because e.g. the hook would reject conversions between modes > like V2TImode and V32QImode. > > My understanding is that for x87 we don't want to allow floating point > conversions, but integers are fine. So I have modified the check such that it > also checks the modes, not just the register class groups. > > The second part of the code is needed because now that integer modes aren't > uniformly rejected the i386 backend trigger further optimizations. However the > backend lacks instructions to deal with canonical RTL representations of > certain instructions. for instance the back-end seems to prefer vec_select 0 > instead of subregs. > > So to prevent the canonicalization I reject integer modes when the sizes of to > and from don't match and when we would have exited with false previously. > > This fixes all the ICEs and codegen regressions, but perhaps an x86 maintainer > should take a deeper look at this hook implementation. > > Bootstrapped Regtested on x86_64-pc-linux-gnu and no issues. > > Ok for master? > > Thanks, > Tamar > > gcc/ChangeLog: > > * config/i386/i386.cc (ix86_can_change_mode_class): Update the target > hook. > > --- inline copy of patch -- > diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc > index c4d0e36e9c0a2256f5dde1f4dc021c0328aa0cba..477dd007ea80272680751b61e35cc3eec79b66c3 100644 > --- a/gcc/config/i386/i386.cc > +++ b/gcc/config/i386/i386.cc > @@ -19682,7 +19682,15 @@ ix86_can_change_mode_class (machine_mode from, machine_mode to, > > /* x87 registers can't do subreg at all, as all values are reformatted > to extended precision. */ > - if (MAYBE_FLOAT_CLASS_P (regclass)) > + if (MAYBE_FLOAT_CLASS_P (regclass) > + && VALID_FP_MODE_P (from) > + && VALID_FP_MODE_P (to)) > + return false; This change looks reasonable since only VALID_FP_MODE_P will be allocated to FLOAT_CLASS. > + > + /* Reject integer modes if the sizes aren't the same. It would have > + normally exited above. */ > + if (MAYBE_FLOAT_CLASS_P (regclass) > + && GET_MODE_SIZE (from) != GET_MODE_SIZE (to)) > return false; Do you have a case(or a patch so I can reproduce the regression myself) to indicate the regression, so I can have a deep look. > > if (MAYBE_SSE_CLASS_P (regclass) || MAYBE_MMX_CLASS_P (regclass)) > > > > > -- -- BR, Hongtao