From: Hongtao Liu <crazylht@gmail.com>
To: Uros Bizjak <ubizjak@gmail.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH]Don't use pinsr for struct initialization.
Date: Tue, 18 Aug 2020 10:24:05 +0800 [thread overview]
Message-ID: <CAMZc-bzdFfOp1nLCY3cH78WZr1DXdvqMqg6bVycw__FPioRBHA@mail.gmail.com> (raw)
In-Reply-To: <CAFULd4bPLk+J4O=JTWHkGANV2W6c929HbKg6ihoReNUeoFpy6g@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 996 bytes --]
On Fri, Aug 14, 2020 at 5:57 PM Uros Bizjak <ubizjak@gmail.com> wrote:
>
> On Fri, Aug 14, 2020 at 8:03 AM Hongtao Liu <crazylht@gmail.com> wrote:
> >
> > Hi:
> > For struct initialization, when it fits in a TImode, gcc will use
> > pinsr insn which causes poor codegen described in PR93897 and PR96562.
>
> You should probably remove TImode handling also from ix86_expand_pextr.
>
Yes, but i failed to construct a testcase to cover this part.
Anyway, the regression test for i386/x86-64 backend is ok, bootstrap is ok.
I also run the patch on SPEC2017, no big impact.
> Uros.
>
> > Bootstrap is ok, regression test is ok for i386/x86-64 backend.
> > Ok for trunk?
> >
> > ChangeLog
> > gcc/
> > PR target/96562
> > PR target/93897
> > * config/i386/i386-expand.c (ix86_expand_pinsr): Don't use
> > pinsr for TImode.
> >
> > gcc/testsuite/
> > * gcc.target/i386/pr96562-1.c: New test.
> >
> > --
> > BR,
> > Hongtao
Update patch.
--
BR,
Hongtao
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From 12e879c481ca7ff9c3477beb3dfd3b615dbe8f60 Mon Sep 17 00:00:00 2001
From: liuhongt <hongtao.liu@intel.com>
Date: Wed, 12 Aug 2020 10:48:17 +0800
Subject: [PATCH] Don't use pinsr/pextr for struct initialization/extraction.
gcc/
PR target/96562
PR target/93897
* config/i386/i386-expand.c (ix86_expand_pinsr): Don't use
pinsr for TImode.
(ix86_expand_pextr): Don't use pextr for TImode.
gcc/testsuite/
* gcc.target/i386/pr96562-1.c: New test.
---
gcc/config/i386/i386-expand.c | 2 -
gcc/testsuite/gcc.target/i386/pr96562-1.c | 81 +++++++++++++++++++++++
2 files changed, 81 insertions(+), 2 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr96562-1.c
diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c
index e194214804b..9b585c8cc8c 100644
--- a/gcc/config/i386/i386-expand.c
+++ b/gcc/config/i386/i386-expand.c
@@ -20237,7 +20237,6 @@ ix86_expand_pextr (rtx *operands)
case E_V4SImode:
case E_V2DImode:
case E_V1TImode:
- case E_TImode:
{
machine_mode srcmode, dstmode;
rtx d, pat;
@@ -20333,7 +20332,6 @@ ix86_expand_pinsr (rtx *operands)
case E_V4SImode:
case E_V2DImode:
case E_V1TImode:
- case E_TImode:
{
machine_mode srcmode, dstmode;
rtx (*pinsr)(rtx, rtx, rtx, rtx);
diff --git a/gcc/testsuite/gcc.target/i386/pr96562-1.c b/gcc/testsuite/gcc.target/i386/pr96562-1.c
new file mode 100644
index 00000000000..6ebeeb1fb17
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr96562-1.c
@@ -0,0 +1,81 @@
+/* { dg-do compile} */
+/* { dg-options "-msse4.1 -O2" } */
+/* { dg-final { scan-assembler-not "pinsr" } } */
+
+typedef struct
+{
+ long long a;
+ int b;
+} st1;
+
+typedef struct
+{
+ long long a;
+ int b;
+ short c;
+} st2;
+
+typedef struct
+{
+ long long a;
+ int b;
+ short c;
+ char d;
+} st3;
+
+typedef struct
+{
+ int b;
+ long long a;
+} st4;
+
+typedef struct
+{
+ short c;
+ int b;
+ long long a;
+} st5;
+
+typedef struct
+{
+ char d;
+ short c;
+ int b;
+ long long a;
+} st6;
+
+st1
+foo1 (long long a, int b)
+{
+ return (st1){a, b};
+}
+
+st2
+foo2 (long long a, int b, short c)
+{
+ return (st2){a, b, c};
+}
+
+st3
+foo3 (long long a, int b, short c, char d)
+{
+ return (st3){a, b, c, d};
+}
+
+st4
+foo4 (long long a, int b)
+{
+ return (st4){b, a};
+}
+
+st5
+foo5 (long long a, int b, short c)
+{
+ return (st5){c, b, a};
+}
+
+st6
+foo6 (long long a, int b, short c, char d)
+{
+ return (st6){d, c, b, a};
+}
--
2.18.1
next prev parent reply other threads:[~2020-08-18 2:23 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-14 6:03 Hongtao Liu
2020-08-14 9:57 ` Uros Bizjak
2020-08-18 2:24 ` Hongtao Liu [this message]
2020-08-18 6:09 ` Uros Bizjak
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