From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yb1-xb35.google.com (mail-yb1-xb35.google.com [IPv6:2607:f8b0:4864:20::b35]) by sourceware.org (Postfix) with ESMTPS id 44E66385842A for ; Mon, 14 Nov 2022 05:49:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 44E66385842A Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-yb1-xb35.google.com with SMTP id o70so12251620yba.7 for ; Sun, 13 Nov 2022 21:49:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=2kAjscGN8o9UZjR/LQZaZl5xoUiHLdSMJvKUCrbi+5Y=; b=bE1p2AyebPM0VS7yXZvrlz2Z9VjeaL/p1stYrF7Quprpt1MvTLDrOKwDirfDipiEas njHbAfKKNyS6yhy8RyfyrDZ161AaCr51NKRkt578VpD6jboNh2+cp9PGkrWsb9ggu6+N U07jrzlZtm4vWwCDeW2tThWW9Ka9b4JBzaSRiyspxATiNnpSXXzttM42fVXH34uyXv9T 0vY3525UMwhXWCvcC1zG5S4rPEWXkh5tr+2CGxDX3HDbeKqYRTDV64nebkxVOhHPAjIG OVJoURMmjCU7bAf8osDw8uoPucLg0coNm7GDKdLjPe2Asj/99ArtMwfWraNy8aTWepet dNvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=2kAjscGN8o9UZjR/LQZaZl5xoUiHLdSMJvKUCrbi+5Y=; b=nyBp36V5b5aNQxH4G9a3hIGZOQD9jMu1IuRVjrnGADxAuBXnAsfzMuM3VVoAxS3OFW SRyNJmcZWWqGgN4+34eIiBuBgqHDzOB97ukuKkPPfpNNYXNIlrINGHQ6IBB3Z7ywAbp6 XO0Un8FKbNLrHdEi0ArbzqOLQ3lIECx8afZN4vxlam7p6gSsiiNmKFP/CyPmMR8WSIGW VhGenLWNYtHfdm/4QGJ2BWD0kZ8ZKCSOqCDFWnb8dU20D8WLe7idteLq9BWjp01fF0RQ Qm67Rcc9NT6uK0Lqo2hnsTOWYXfuuDL9Z7yx5ZaLaMM83dFeKbOluWh66Ho32KdlJbM3 LlbQ== X-Gm-Message-State: ANoB5pliBU44tQtZeGHoZAQQ873hFir2YbyG+F9avAMH+Pvs72R9s3Dn jR+kxz73pla6d3r965NXYrx/T5nwdeasL78D0HY= X-Google-Smtp-Source: AA0mqf6vLOO7s3KG55A6iYX++zckaZQOPRzwcnXsRiFHSx1S4o8IPJRdzwHYjdBZ35yhMb6mvUaP98Xb5KWZ6Cl39MY= X-Received: by 2002:a25:ac81:0:b0:6df:927f:38c9 with SMTP id x1-20020a25ac81000000b006df927f38c9mr7855535ybi.92.1668404964603; Sun, 13 Nov 2022 21:49:24 -0800 (PST) MIME-Version: 1.0 References: <20221111024330.87663-1-haochen.jiang@intel.com> In-Reply-To: <20221111024330.87663-1-haochen.jiang@intel.com> From: Hongtao Liu Date: Mon, 14 Nov 2022 13:49:13 +0800 Message-ID: Subject: Re: [PATCH] i386: Add AMX-TILE dependency for AMX related ISAs To: Haochen Jiang Cc: gcc-patches@gcc.gnu.org, ubizjak@gmail.com, hongtao.liu@intel.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Fri, Nov 11, 2022 at 10:45 AM Haochen Jiang via Gcc-patches wrote: > > Hi all, > > For all AMX related ISAs, we have a potential dependency on AMX-TILE > or we even won't have the basic support on AMX. > > This patch added those dependency. Ok for trunk? Ok. > > BRs, > Haochen > > gcc/ChangeLog: > > * common/config/i386/i386-common.cc > (OPTION_MASK_ISA2_AMX_INT8_SET): Add AMX-TILE dependency. > (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto. > (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto. > (OPTION_MASK_ISA2_AMX_TILE_UNSET): Disable AMX_{INT8, > BF16, FP16} when disable AMX_TILE. > > gcc/testsuite/ChangeLog: > > * gcc.target/i386/amxbf16-dpbf16ps-2.c: Remove -amx-tile. > * gcc.target/i386/amxfp16-dpfp16ps-2.c: Ditto. > * gcc.target/i386/amxint8-dpbssd-2.c: Ditto. > * gcc.target/i386/amxint8-dpbsud-2.c: Ditto. > * gcc.target/i386/amxint8-dpbusd-2.c: Ditto. > * gcc.target/i386/amxint8-dpbuud-2.c: Ditto. > --- > gcc/common/config/i386/i386-common.cc | 13 +++++++++---- > gcc/testsuite/gcc.target/i386/amxbf16-dpbf16ps-2.c | 3 +-- > gcc/testsuite/gcc.target/i386/amxfp16-dpfp16ps-2.c | 3 +-- > gcc/testsuite/gcc.target/i386/amxint8-dpbssd-2.c | 3 +-- > gcc/testsuite/gcc.target/i386/amxint8-dpbsud-2.c | 3 +-- > gcc/testsuite/gcc.target/i386/amxint8-dpbusd-2.c | 3 +-- > gcc/testsuite/gcc.target/i386/amxint8-dpbuud-2.c | 3 +-- > 7 files changed, 15 insertions(+), 16 deletions(-) > > diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc > index 431fd0d3ad1..5e6d3da0306 100644 > --- a/gcc/common/config/i386/i386-common.cc > +++ b/gcc/common/config/i386/i386-common.cc > @@ -106,12 +106,15 @@ along with GCC; see the file COPYING3. If not see > #define OPTION_MASK_ISA_CLWB_SET OPTION_MASK_ISA_CLWB > #define OPTION_MASK_ISA2_AVX512VP2INTERSECT_SET OPTION_MASK_ISA2_AVX512VP2INTERSECT > #define OPTION_MASK_ISA2_AMX_TILE_SET OPTION_MASK_ISA2_AMX_TILE > -#define OPTION_MASK_ISA2_AMX_INT8_SET OPTION_MASK_ISA2_AMX_INT8 > -#define OPTION_MASK_ISA2_AMX_BF16_SET OPTION_MASK_ISA2_AMX_BF16 > +#define OPTION_MASK_ISA2_AMX_INT8_SET \ > + (OPTION_MASK_ISA2_AMX_TILE | OPTION_MASK_ISA2_AMX_INT8) > +#define OPTION_MASK_ISA2_AMX_BF16_SET \ > + (OPTION_MASK_ISA2_AMX_TILE | OPTION_MASK_ISA2_AMX_BF16) > #define OPTION_MASK_ISA2_AVXVNNIINT8_SET OPTION_MASK_ISA2_AVXVNNIINT8 > #define OPTION_MASK_ISA2_AVXNECONVERT_SET OPTION_MASK_ISA2_AVXNECONVERT > #define OPTION_MASK_ISA2_CMPCCXADD_SET OPTION_MASK_ISA2_CMPCCXADD > -#define OPTION_MASK_ISA2_AMX_FP16_SET OPTION_MASK_ISA2_AMX_FP16 > +#define OPTION_MASK_ISA2_AMX_FP16_SET \ > + (OPTION_MASK_ISA2_AMX_TILE | OPTION_MASK_ISA2_AMX_FP16) > #define OPTION_MASK_ISA2_PREFETCHI_SET OPTION_MASK_ISA2_PREFETCHI > #define OPTION_MASK_ISA2_RAOINT_SET OPTION_MASK_ISA2_RAOINT > > @@ -277,7 +280,9 @@ along with GCC; see the file COPYING3. If not see > #define OPTION_MASK_ISA2_SERIALIZE_UNSET OPTION_MASK_ISA2_SERIALIZE > #define OPTION_MASK_ISA2_AVX512VP2INTERSECT_UNSET OPTION_MASK_ISA2_AVX512VP2INTERSECT > #define OPTION_MASK_ISA2_TSXLDTRK_UNSET OPTION_MASK_ISA2_TSXLDTRK > -#define OPTION_MASK_ISA2_AMX_TILE_UNSET OPTION_MASK_ISA2_AMX_TILE > +#define OPTION_MASK_ISA2_AMX_TILE_UNSET \ > + (OPTION_MASK_ISA2_AMX_TILE | OPTION_MASK_ISA2_AMX_INT8_UNSET \ > + | OPTION_MASK_ISA2_AMX_BF16_UNSET | OPTION_MASK_ISA2_AMX_FP16_UNSET) > #define OPTION_MASK_ISA2_AMX_INT8_UNSET OPTION_MASK_ISA2_AMX_INT8 > #define OPTION_MASK_ISA2_AMX_BF16_UNSET OPTION_MASK_ISA2_AMX_BF16 > #define OPTION_MASK_ISA2_UINTR_UNSET OPTION_MASK_ISA2_UINTR > diff --git a/gcc/testsuite/gcc.target/i386/amxbf16-dpbf16ps-2.c b/gcc/testsuite/gcc.target/i386/amxbf16-dpbf16ps-2.c > index b00bc13ec78..35881e7682a 100644 > --- a/gcc/testsuite/gcc.target/i386/amxbf16-dpbf16ps-2.c > +++ b/gcc/testsuite/gcc.target/i386/amxbf16-dpbf16ps-2.c > @@ -1,7 +1,6 @@ > /* { dg-do run { target { ! ia32 } } } */ > -/* { dg-require-effective-target amx_tile } */ > /* { dg-require-effective-target amx_bf16 } */ > -/* { dg-options "-O2 -mamx-tile -mamx-bf16" } */ > +/* { dg-options "-O2 -mamx-bf16" } */ > #include > > #define AMX_BF16 > diff --git a/gcc/testsuite/gcc.target/i386/amxfp16-dpfp16ps-2.c b/gcc/testsuite/gcc.target/i386/amxfp16-dpfp16ps-2.c > index 2d359a689ea..a1fafbcbfeb 100644 > --- a/gcc/testsuite/gcc.target/i386/amxfp16-dpfp16ps-2.c > +++ b/gcc/testsuite/gcc.target/i386/amxfp16-dpfp16ps-2.c > @@ -1,8 +1,7 @@ > /* { dg-do run { target { ! ia32 } } } */ > -/* { dg-require-effective-target amx_tile } */ > /* { dg-require-effective-target amx_fp16 } */ > /* { dg-require-effective-target avx512fp16 } */ > -/* { dg-options "-O2 -mamx-tile -mamx-fp16 -mavx512fp16" } */ > +/* { dg-options "-O2 -mamx-fp16 -mavx512fp16" } */ > #define AMX_FP16 > #define DO_TEST test_amx_fp16_dpfp16ps > void test_amx_fp16_dpfp16ps (); > diff --git a/gcc/testsuite/gcc.target/i386/amxint8-dpbssd-2.c b/gcc/testsuite/gcc.target/i386/amxint8-dpbssd-2.c > index 74ad71be5c5..d7efb3d20c2 100644 > --- a/gcc/testsuite/gcc.target/i386/amxint8-dpbssd-2.c > +++ b/gcc/testsuite/gcc.target/i386/amxint8-dpbssd-2.c > @@ -1,7 +1,6 @@ > /* { dg-do run { target { ! ia32 } } } */ > -/* { dg-require-effective-target amx_tile } */ > /* { dg-require-effective-target amx_int8 } */ > -/* { dg-options "-O2 -mamx-tile -mamx-int8" } */ > +/* { dg-options "-O2 -mamx-int8" } */ > #include > > #define AMX_INT8 > diff --git a/gcc/testsuite/gcc.target/i386/amxint8-dpbsud-2.c b/gcc/testsuite/gcc.target/i386/amxint8-dpbsud-2.c > index e7241bdd860..c8bf89d738b 100644 > --- a/gcc/testsuite/gcc.target/i386/amxint8-dpbsud-2.c > +++ b/gcc/testsuite/gcc.target/i386/amxint8-dpbsud-2.c > @@ -1,7 +1,6 @@ > /* { dg-do run { target { ! ia32 } } } */ > -/* { dg-require-effective-target amx_tile } */ > /* { dg-require-effective-target amx_int8 } */ > -/* { dg-options "-O2 -mamx-tile -mamx-int8" } */ > +/* { dg-options "-O2 -mamx-int8" } */ > #include > > #define AMX_INT8 > diff --git a/gcc/testsuite/gcc.target/i386/amxint8-dpbusd-2.c b/gcc/testsuite/gcc.target/i386/amxint8-dpbusd-2.c > index f0b9f97aec9..bb8777d920a 100644 > --- a/gcc/testsuite/gcc.target/i386/amxint8-dpbusd-2.c > +++ b/gcc/testsuite/gcc.target/i386/amxint8-dpbusd-2.c > @@ -1,7 +1,6 @@ > /* { dg-do run { target { ! ia32 } } } */ > -/* { dg-require-effective-target amx_tile } */ > /* { dg-require-effective-target amx_int8 } */ > -/* { dg-options "-O2 -mamx-tile -mamx-int8" } */ > +/* { dg-options "-O2 -mamx-int8" } */ > #include > > #define AMX_INT8 > diff --git a/gcc/testsuite/gcc.target/i386/amxint8-dpbuud-2.c b/gcc/testsuite/gcc.target/i386/amxint8-dpbuud-2.c > index eb70b2f9259..d30f46d8de3 100644 > --- a/gcc/testsuite/gcc.target/i386/amxint8-dpbuud-2.c > +++ b/gcc/testsuite/gcc.target/i386/amxint8-dpbuud-2.c > @@ -1,7 +1,6 @@ > /* { dg-do run { target { ! ia32 } } } */ > -/* { dg-require-effective-target amx_tile } */ > /* { dg-require-effective-target amx_int8 } */ > -/* { dg-options "-O2 -mamx-tile -mamx-int8" } */ > +/* { dg-options "-O2 -mamx-int8" } */ > #include > > #define AMX_INT8 > -- > 2.18.1 > -- BR, Hongtao