From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) by sourceware.org (Postfix) with ESMTPS id 765833858C51 for ; Wed, 18 May 2022 03:05:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 765833858C51 Received: by mail-ed1-x529.google.com with SMTP id c12so1261425eds.10 for ; Tue, 17 May 2022 20:05:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=LIq5JP5nI953O97ee66KyoCZdTUjdMAi1ifN4vL+zFc=; b=evfF5WfX81LfvtWoPR6XBrD9VtV5J9mbHdQe8nUunyi+5tjP98r7SqQeebAcLriUm3 JjNcb1+yvS8N3hk49CgzByAG///OwFVurjvTNvip12C4msuPu4qTvssS5jFZpSBwtrlV 3gAAY36f2nXKcDOXTC8bciRo3/6AqW+qRDWNnHb4VftwXUeI+DaElmBMZjjM8af5ih+s V6mteyCq9Ktmq1Wek08DH2DDwODvZ6sXbKPLLrgR2uNtQp/P1wB35z8OOYfyWQgtBW6e iF/CWor8piNeTfAC+eP2zP8mvOo/zjeWIgksmKgR2EUpGwroHMVIJjOfZtK+tSgwPM40 YZwQ== X-Gm-Message-State: AOAM530BoeIi94im3kFCOGlvL57aGPqa6TgsYe310OX+btywa0Gq35kp 0DmjgmPRQOnnOoY6AtudJgeVDmKdjZ3nQKDL7WY= X-Google-Smtp-Source: ABdhPJyhXKoWX2YuaEVL/EaUOgE7AXkhyCazUDac/kgrR0TpbZ/hhfd0SFXSCm24n5kP5kregop4douFs79fcd+3q9A= X-Received: by 2002:aa7:c25a:0:b0:42a:a4f6:4f84 with SMTP id y26-20020aa7c25a000000b0042aa4f64f84mr18713128edo.420.1652843119892; Tue, 17 May 2022 20:05:19 -0700 (PDT) MIME-Version: 1.0 References: <20220517030625.21971-1-hongtao.liu@intel.com> In-Reply-To: From: Hongtao Liu Date: Wed, 18 May 2022 11:05:07 +0800 Message-ID: Subject: Re: [PATCH] [i386] recognize bzhi pattern when there's zero_extendsidi. To: Uros Bizjak Cc: liuhongt , "gcc-patches@gcc.gnu.org" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 18 May 2022 03:05:23 -0000 On Tue, May 17, 2022 at 6:07 PM Uros Bizjak via Gcc-patches wrote: > > On Tue, May 17, 2022 at 5:06 AM liuhongt wrote: > > > > backend has > > > > 16550(define_insn "*bmi2_bzhi_3_2" > > 16551 [(set (match_operand:SWI48 0 "register_operand" "=r") > > 16552 (and:SWI48 > > 16553 (plus:SWI48 > > 16554 (ashift:SWI48 (const_int 1) > > 16555 (match_operand:QI 2 "register_operand" "r")) > > 16556 (const_int -1)) > > 16557 (match_operand:SWI48 1 "nonimmediate_operand" "rm"))) > > 16558 (clobber (reg:CC FLAGS_REG))] > > 16559 "TARGET_BMI2" > > 16560 "bzhi\t{%2, %1, %0|%0, %1, %2}" > > 16561 [(set_attr "type" "bitmanip") > > 16562 (set_attr "prefix" "vex") > > 16563 (set_attr "mode" "")]) > > > > But there's extra zero_extend in pattern match. > > > > 424Failed to match this instruction: > > 425(parallel [ > > 426 (set (reg:DI 90) > > 427 (zero_extend:DI (and:SI (plus:SI (ashift:SI (const_int 1 [0x1]) > > 428 (subreg:QI (reg:SI 98) 0)) > > 429 (const_int -1 [0xffffffffffffffff])) > > 430 (subreg:SI (reg:DI 95) 0)))) > > 431 (clobber (reg:CC 17 flags)) > > 432 ]) > > > > Add new define_insn for it. > > > > > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.. > > Ok for trunk? > > > > gcc/ChangeLog: > > > > PR target/104375 > > * config/i386/i386.md (*bmi2_bzhi_zero_extendsidi_4): New > > define_insn. > > > > gcc/testsuite/ChangeLog: > > > > * gcc.target/i386/pr104375.c: New test. > > OK with a nit below. Thanks for the review, changed and committed. > > Thanks, > Uros. > > > --- > > gcc/config/i386/i386.md | 16 ++++++++++++++++ > > gcc/testsuite/gcc.target/i386/pr104375.c | 9 +++++++++ > > 2 files changed, 25 insertions(+) > > create mode 100644 gcc/testsuite/gcc.target/i386/pr104375.c > > > > diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md > > index f9c06ff302a..ec7bdd04947 100644 > > --- a/gcc/config/i386/i386.md > > +++ b/gcc/config/i386/i386.md > > @@ -16636,6 +16636,22 @@ (define_insn "*bmi2_bzhi_3_3" > > (set_attr "prefix" "vex") > > (set_attr "mode" "")]) > > > > +(define_insn "*bmi2_bzhi_zero_extendsidi_4" > > + [(set (match_operand:DI 0 "register_operand" "=r") > > + (zero_extend:DI > > + (and:SI > > + (plus:SI > > + (ashift:SI (const_int 1) > > + (match_operand:QI 2 "register_operand" "r")) > > + (const_int -1)) > > + (match_operand:SI 1 "nonimmediate_operand" "rm")))) > > + (clobber (reg:CC FLAGS_REG))] > > + "TARGET_BMI2 && TARGET_64BIT" > > Please put TARGET_64BIT first here. > > > + "bzhi\t{%q2, %q1, %q0|%q0, %q1, %q2}" > > + [(set_attr "type" "bitmanip") > > + (set_attr "prefix" "vex") > > + (set_attr "mode" "DI")]) > > + > > (define_insn "bmi2_pdep_3" > > [(set (match_operand:SWI48 0 "register_operand" "=r") > > (unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r") > > diff --git a/gcc/testsuite/gcc.target/i386/pr104375.c b/gcc/testsuite/gcc.target/i386/pr104375.c > > new file mode 100644 > > index 00000000000..5c9f511da5c > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/i386/pr104375.c > > @@ -0,0 +1,9 @@ > > +#/* { dg-do compile { target { ! ia32 } } } */ > > +/* { dg-options "-mbmi2 -O2" } */ > > +/* { dg-final { scan-assembler-times {(?n)shrx[\t ]+} 1 } } */ > > +/* { dg-final { scan-assembler-times {(?n)bzhi[\t ]+} 1 } } */ > > + > > +unsigned long long bextr_u64(unsigned long long w, unsigned off, unsigned int len) > > +{ > > + return (w >> off) & ((1U << len) - 1U); > > +} > > -- > > 2.18.1 > > -- BR, Hongtao