From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oa1-x2a.google.com (mail-oa1-x2a.google.com [IPv6:2001:4860:4864:20::2a]) by sourceware.org (Postfix) with ESMTPS id 0156A385734C for ; Mon, 6 Jun 2022 18:54:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0156A385734C Received: by mail-oa1-x2a.google.com with SMTP id 586e51a60fabf-fb1ae0cd9cso9655572fac.13 for ; Mon, 06 Jun 2022 11:54:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=+HatkC0jpawLvmDfKRIsBIBOTp6y0hmxJfrGE+tBlEU=; b=zShrM9gDS9HpzIcgpY/ciLfTI+bVJmNT/lchcr6SPab6Ms5f2mMi3Ao9M+hFGKKMVZ BjS5rtMRxULETeToKeA5IhX30DnzP2iGCeURNkG7F0z2ebsJeqAyg9OoV3iKPJuSWU6Q NKRc++kMiCp/hdpf5xuPpeeMfyTbIa7W99nOEDhNZOIeZEpiRXwUdgc9O9IYS/EOvgeJ mA0AnfrO11i4noQTJdiUkLaSTDx5lc80GkoFXtuNrrdsfztmFxAjQqXDeztZ9xJ2meqn NhAIvxnZP8FWMDQ24fhn2z7gs9rvgSRoSG0IP+pppeMXRwp/IV60uq+0TozAEiRCNvtt e4BQ== X-Gm-Message-State: AOAM531UegxhkiNxUjo9TioJQu1sYaRmiRL0qV1Qz6P5sI4jdeeYO1Ft aaTd7Fm2Tcl2FRNDq3h5MFXzi/LxLyuOPAywiF+IHD1Y X-Google-Smtp-Source: ABdhPJzXelGFTjkd4SAmx4SXFqQasz2zxbNk1wbk1pFNQ6DJDP4QIBqCZreRKfhVqFE1cN+iFixHntqkcm/ebXELaLA= X-Received: by 2002:a17:90a:4897:b0:1c7:5fce:cbcd with SMTP id b23-20020a17090a489700b001c75fcecbcdmr63306979pjh.45.1654541645910; Mon, 06 Jun 2022 11:54:05 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: "H.J. Lu" Date: Mon, 6 Jun 2022 11:53:30 -0700 Message-ID: Subject: Re: [PATCH] x86: harmonize __builtin_ia32_psadbw*() types To: Hongtao Liu Cc: Uros Bizjak , Hongtao Liu , "gcc-patches@gcc.gnu.org" , "hubicka@ucw.cz" , Jan Beulich Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3018.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Jun 2022 18:54:19 -0000 On Sun, Jun 5, 2022 at 7:27 PM Hongtao Liu via Gcc-patches wrote: > > On Mon, Jun 6, 2022 at 3:17 AM Uros Bizjak via Gcc-patches > wrote: > > > > On Thu, Jun 2, 2022 at 5:04 PM Jan Beulich wrote: > > > > > > The 64-bit, 128-bit, and 512-bit variants have VDI return type, in > > > line with instruction behavior. Make the 256-bit builtin match, thus > > > also making it match the insn it expands to (using VI8_AVX2_AVX512BW). > > > > > > gcc/ > > > > > > * config/i386/i386-builtin.def (__builtin_ia32_psadbw256): > > > Change type. > > > * config/i386/i386-builtin-types.def: New function type > > > (V4DI, V32QI, V32QI). > > > * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle > > > V4DI_FTYPE_V32QI_V32QI. > > > > LGTM, but please let HJ have the final approval. > I think it was just a typo and not intentional, so Ok for the trunk. LGTM too. Thanks. > > > > Uros. > > > > > > > > --- a/gcc/config/i386/i386-builtin.def > > > +++ b/gcc/config/i386/i386-builtin.def > > > @@ -1217,7 +1217,7 @@ BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR > > > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_mulv8si3, "__builtin_ia32_pmulld256" , IX86_BUILTIN_PMULLD256 , UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI) > > > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_vec_widen_umult_even_v8si, "__builtin_ia32_pmuludq256", IX86_BUILTIN_PMULUDQ256, UNKNOWN, (int) V4DI_FTYPE_V8SI_V8SI) > > > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_iorv4di3, "__builtin_ia32_por256", IX86_BUILTIN_POR256, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI) > > > -BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_psadbw, "__builtin_ia32_psadbw256", IX86_BUILTIN_PSADBW256, UNKNOWN, (int) V16HI_FTYPE_V32QI_V32QI) > > > +BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_psadbw, "__builtin_ia32_psadbw256", IX86_BUILTIN_PSADBW256, UNKNOWN, (int) V4DI_FTYPE_V32QI_V32QI) > > > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_pshufbv32qi3, "__builtin_ia32_pshufb256", IX86_BUILTIN_PSHUFB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) > > > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_pshufdv3, "__builtin_ia32_pshufd256", IX86_BUILTIN_PSHUFD256, UNKNOWN, (int) V8SI_FTYPE_V8SI_INT) > > > BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_pshufhwv3, "__builtin_ia32_pshufhw256", IX86_BUILTIN_PSHUFHW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_INT) > > > --- a/gcc/config/i386/i386-builtin-types.def > > > +++ b/gcc/config/i386/i386-builtin-types.def > > > @@ -516,6 +516,7 @@ DEF_FUNCTION_TYPE (V8DI, V8DI, V2DI, INT > > > DEF_FUNCTION_TYPE (V8DI, V8DI, V2DI, INT, V8DI, UQI) > > > DEF_FUNCTION_TYPE (V8DI, V8DI, V4DI, INT, V8DI, UQI) > > > DEF_FUNCTION_TYPE (V4DI, V8SI, V8SI) > > > +DEF_FUNCTION_TYPE (V4DI, V32QI, V32QI) > > > DEF_FUNCTION_TYPE (V8DI, V64QI, V64QI) > > > DEF_FUNCTION_TYPE (V4DI, V4DI, V2DI) > > > DEF_FUNCTION_TYPE (V4DI, PCV4DI, V4DI) > > > --- a/gcc/config/i386/i386-expand.cc > > > +++ b/gcc/config/i386/i386-expand.cc > > > @@ -10359,6 +10359,7 @@ ix86_expand_args_builtin (const struct b > > > case V8SI_FTYPE_V16HI_V16HI: > > > case V4DI_FTYPE_V4DI_V4DI: > > > case V4DI_FTYPE_V8SI_V8SI: > > > + case V4DI_FTYPE_V32QI_V32QI: > > > case V8DI_FTYPE_V64QI_V64QI: > > > if (comparison == UNKNOWN) > > > return ix86_expand_binop_builtin (icode, exp, target); > > > > > > > -- > BR, > Hongtao -- H.J.