Re: PATCH: PR target/49600: Bad SSE2 int->float split in i386.md

["H.J. Lu" <hjl.tools@gmail.com>]

On Sun, Jul 3, 2011 at 4:27 AM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Fri, Jul 1, 2011 at 12:50 AM, H.J. Lu <hongjiu.lu@intel.com> wrote:
>> In one SSE2 int->float split, when TARGET_USE_VECTOR_CONVERTS is true,
>> TARGET_INTER_UNIT_MOVES is false and GENERAL_REG_P (op1) is true. we
>> will get gcc_unreachable.  This patch removes TARGET_INTER_UNIT_MOVES
>> check.  OK for trunk?
>
> This will result in register allocation failure. Operand 0 of
> sse2_loadld pattern has conditional constraint Yi that depends on
> TARGET_INTER_UNIT_MOVES, so we can't blindly generate sse2_loadld
> after reload.  I'm testing attached patch.
>
> BTW: Do you perhaps have a testcase for this problem?

I have a testcase. But it needs a new x86 optimization we are working on it.

> 2011-07-03  Uros Bizjak  <ubizjak@gmail.com>
>
>        PR target/49600
>        * config/i386/i386.md (SSE2 int->float split): Push operand 1 in
>        general register to memory for !TARGET_INTER_UNIT_MOVES.
>

I will give it a try.

Thanks.

-- 
H.J.