From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 11760 invoked by alias); 4 Jul 2011 04:27:58 -0000 Received: (qmail 11752 invoked by uid 22791); 4 Jul 2011 04:27:56 -0000 X-SWARE-Spam-Status: No, hits=0.3 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MEDICAL_SUBJECT,RCVD_IN_DNSWL_LOW,TW_ZJ X-Spam-Check-By: sourceware.org Received: from mail-qy0-f175.google.com (HELO mail-qy0-f175.google.com) (209.85.216.175) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 04 Jul 2011 04:27:42 +0000 Received: by qyk30 with SMTP id 30so817895qyk.20 for ; Sun, 03 Jul 2011 21:27:41 -0700 (PDT) MIME-Version: 1.0 Received: by 10.229.63.69 with SMTP id a5mr4384013qci.94.1309753661783; Sun, 03 Jul 2011 21:27:41 -0700 (PDT) Received: by 10.229.214.83 with HTTP; Sun, 3 Jul 2011 21:27:41 -0700 (PDT) In-Reply-To: References: <20110630225005.GA1839@intel.com> Date: Mon, 04 Jul 2011 04:27:00 -0000 Message-ID: Subject: Re: PATCH: PR target/49600: Bad SSE2 int->float split in i386.md From: "H.J. Lu" To: Uros Bizjak Cc: gcc-patches@gcc.gnu.org Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-07/txt/msg00160.txt.bz2 On Sun, Jul 3, 2011 at 4:27 AM, Uros Bizjak wrote: > On Fri, Jul 1, 2011 at 12:50 AM, H.J. Lu wrote: >> In one SSE2 int->float split, when TARGET_USE_VECTOR_CONVERTS is true, >> TARGET_INTER_UNIT_MOVES is false and GENERAL_REG_P (op1) is true. we >> will get gcc_unreachable. =A0This patch removes TARGET_INTER_UNIT_MOVES >> check. =A0OK for trunk? > > This will result in register allocation failure. Operand 0 of > sse2_loadld pattern has conditional constraint Yi that depends on > TARGET_INTER_UNIT_MOVES, so we can't blindly generate sse2_loadld > after reload. =A0I'm testing attached patch. > > BTW: Do you perhaps have a testcase for this problem? I have a testcase. But it needs a new x86 optimization we are working on it. > 2011-07-03 =A0Uros Bizjak =A0 > > =A0 =A0 =A0 =A0PR target/49600 > =A0 =A0 =A0 =A0* config/i386/i386.md (SSE2 int->float split): Push operan= d 1 in > =A0 =A0 =A0 =A0general register to memory for !TARGET_INTER_UNIT_MOVES. > I will give it a try. Thanks. --=20 H.J.