From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg1-x52a.google.com (mail-pg1-x52a.google.com [IPv6:2607:f8b0:4864:20::52a]) by sourceware.org (Postfix) with ESMTPS id CAA0B3858409 for ; Wed, 17 Nov 2021 20:02:28 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org CAA0B3858409 Received: by mail-pg1-x52a.google.com with SMTP id p17so3238417pgj.2 for ; Wed, 17 Nov 2021 12:02:28 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=yIjEOgwaOn7gQxiFK4ZliZk6d7T4wbQASxIIG324EzY=; b=uQXzTOIxmTIqFUvSUqLJzUV3Wp0C8a3F08P7Tf9/b0o2eiqSmKcck/EBXcxcKq4zBf inC2EmsbxnB7qV5p5YfGVUKArQeYZscUIzyr8ONfEMB0QKf0AV0jNpd1AKtzdPRmRfNt G0GiZtzadxHTpWlYz2bA00E7lQ7/VkdXKBOkYcZcbNmlZ7lOAlVDK67Em/VOQcwJGvSZ VdmAmrfYBHWOuglXMiHph7gQhmaxSL1Q6i07uZfvcsRPUObPEysqpVCyljF37gA/hnVj W9l4JBIcnYCoT0uGYO2Sbx0/sbgYhPu5sL1/H3YTsmptbC9CRGo/7MtaQodDkXis8Thq 1SHA== X-Gm-Message-State: AOAM532TgD5AogRm5MqnShy7doVGT32xsJ8XVB8kGmSnI4gMu08YD14K AmSme+HeT3qWb+MmcfOgvww9t8WTacmZDNvDMfs= X-Google-Smtp-Source: ABdhPJyQxPEtJa/2h+mmf7jZ/CwWKaDxxUgFvwmjVOq/4+T4RmnT6OxuOWl4ASeRitxe6ucsM1RdZ7NuQxoZfuFlKgk= X-Received: by 2002:a05:6a00:8cd:b0:4a2:82d7:1703 with SMTP id s13-20020a056a0008cd00b004a282d71703mr9787957pfu.43.1637179347375; Wed, 17 Nov 2021 12:02:27 -0800 (PST) MIME-Version: 1.0 References: <20211117153522.230700-1-hjl.tools@gmail.com> In-Reply-To: From: "H.J. Lu" Date: Wed, 17 Nov 2021 12:01:51 -0800 Message-ID: Subject: [PATCH v3] x86: Add -mharden-sls=[none|all|return|indirect-branch] To: Uros Bizjak Cc: "gcc-patches@gcc.gnu.org" Content-Type: multipart/mixed; boundary="0000000000006f2c3105d101855c" X-Spam-Status: No, score=-3029.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Nov 2021 20:02:31 -0000 --0000000000006f2c3105d101855c Content-Type: text/plain; charset="UTF-8" On Wed, Nov 17, 2021 at 7:53 AM Uros Bizjak wrote: > > On Wed, Nov 17, 2021 at 4:35 PM H.J. Lu wrote: > > > > Add -mharden-sls= to mitigate against straight line speculation (SLS) > > for function return and indirect branch by adding an INT3 instruction > > after function return and indirect branch. > > > > gcc/ > > > > PR target/102952 > > * config/i386/i386-opts.h (harden_sls): New enum. > > * config/i386/i386.c (output_indirect_thunk): Mitigate against > > SLS for function return. > > (ix86_output_function_return): Likewise. > > (ix86_output_jmp_thunk_or_indirect): Mitigate against indirect > > branch. > > (ix86_output_indirect_jmp): Likewise. > > (ix86_output_call_insn): Likewise. > > * config/i386/i386.opt: Add -mharden-sls=. > > * doc/invoke.texi: Document -mharden-sls=. > > > > gcc/testsuite/ > > > > PR target/102952 > > * gcc.target/i386/harden-sls-1.c: New test. > > * gcc.target/i386/harden-sls-2.c: Likewise. > > * gcc.target/i386/harden-sls-3.c: Likewise. > > * gcc.target/i386/harden-sls-4.c: Likewise. > > * gcc.target/i386/harden-sls-5.c: Likewise. > > --- > > gcc/config/i386/i386-opts.h | 7 ++++++ > > gcc/config/i386/i386.c | 23 ++++++++++++++------ > > gcc/config/i386/i386.opt | 20 +++++++++++++++++ > > gcc/doc/invoke.texi | 10 ++++++++- > > gcc/testsuite/gcc.target/i386/harden-sls-1.c | 14 ++++++++++++ > > gcc/testsuite/gcc.target/i386/harden-sls-2.c | 14 ++++++++++++ > > gcc/testsuite/gcc.target/i386/harden-sls-3.c | 14 ++++++++++++ > > gcc/testsuite/gcc.target/i386/harden-sls-4.c | 16 ++++++++++++++ > > gcc/testsuite/gcc.target/i386/harden-sls-5.c | 17 +++++++++++++++ > > 9 files changed, 127 insertions(+), 8 deletions(-) > > create mode 100644 gcc/testsuite/gcc.target/i386/harden-sls-1.c > > create mode 100644 gcc/testsuite/gcc.target/i386/harden-sls-2.c > > create mode 100644 gcc/testsuite/gcc.target/i386/harden-sls-3.c > > create mode 100644 gcc/testsuite/gcc.target/i386/harden-sls-4.c > > create mode 100644 gcc/testsuite/gcc.target/i386/harden-sls-5.c > > > > diff --git a/gcc/config/i386/i386-opts.h b/gcc/config/i386/i386-opts.h > > index 04e4ad608fb..171d3106d0a 100644 > > --- a/gcc/config/i386/i386-opts.h > > +++ b/gcc/config/i386/i386-opts.h > > @@ -121,4 +121,11 @@ enum instrument_return { > > instrument_return_nop5 > > }; > > > > +enum harden_sls { > > + harden_sls_none = 0, > > + harden_sls_return = 1 << 0, > > + harden_sls_indirect_branch = 1 << 1, > > + harden_sls_all = harden_sls_return | harden_sls_indirect_branch > > +}; > > + > > #endif > > diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c > > index 73c4d5115bb..8bbf6ae9875 100644 > > --- a/gcc/config/i386/i386.c > > +++ b/gcc/config/i386/i386.c > > @@ -5914,6 +5914,8 @@ output_indirect_thunk (unsigned int regno) > > } > > > > fputs ("\tret\n", asm_out_file); > > + if ((ix86_harden_sls & harden_sls_return)) > > + fputs ("\tint3\n", asm_out_file); > > } > > > > /* Output a funtion with a call and return thunk for indirect branch. > > @@ -15984,6 +15986,8 @@ ix86_output_jmp_thunk_or_indirect (const char *thunk_name, const int regno) > > fprintf (asm_out_file, "\tjmp\t"); > > assemble_name (asm_out_file, thunk_name); > > putc ('\n', asm_out_file); > > + if ((ix86_harden_sls & harden_sls_indirect_branch)) > > + fputs ("\tint3\n", asm_out_file); > > } > > else > > output_indirect_thunk (regno); > > @@ -16206,10 +16210,10 @@ ix86_output_indirect_jmp (rtx call_op) > > gcc_unreachable (); > > > > ix86_output_indirect_branch (call_op, "%0", true); > > - return ""; > > } > > else > > - return "%!jmp\t%A0"; > > + output_asm_insn ("%!jmp\t%A0", &call_op); > > + return (ix86_harden_sls & harden_sls_indirect_branch) ? "int3" : ""; > > } > > > > /* Output return instrumentation for current function if needed. */ > > @@ -16277,10 +16281,10 @@ ix86_output_function_return (bool long_p) > > return ""; > > } > > > > - if (!long_p) > > - return "%!ret"; > > - > > - return "rep%; ret"; > > + if ((ix86_harden_sls & harden_sls_return)) > > + long_p = false; > > Is the above really needed? This will change "rep ret" to a "[notrack] > ret" when SLS hardening is in effect, with a conditional [notrack] > prefix, even when long ret was requested. Fixed in the v3 patch. > On a related note, "notrack ret" does not assemble for me, the > assembler reports: > > notrack.s:1: Error: expecting indirect branch instruction after `notrack' > > Can you please clarify the above change? I opened: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103307 Here is the v3 patch. -- H.J. --0000000000006f2c3105d101855c Content-Type: text/x-patch; charset="US-ASCII"; name="v3-0001-x86-Add-mharden-sls-none-all-return-indirect-bran.patch" Content-Disposition: attachment; filename="v3-0001-x86-Add-mharden-sls-none-all-return-indirect-bran.patch" Content-Transfer-Encoding: base64 Content-ID: X-Attachment-Id: f_kw3y6omx0 RnJvbSBlZDVlNGEwNmIwNDg4YmZmMWZjZGYyMThkOTNiNTRlMGFiZjdmZjNiIE1vbiBTZXAgMTcg MDA6MDA6MDAgMjAwMQpGcm9tOiAiSC5KLiBMdSIgPGhqbC50b29sc0BnbWFpbC5jb20+CkRhdGU6 IFdlZCwgMjcgT2N0IDIwMjEgMDc6NDg6NTQgLTA3MDAKU3ViamVjdDogW1BBVENIIHYzXSB4ODY6 IEFkZCAtbWhhcmRlbi1zbHM9W25vbmV8YWxsfHJldHVybnxpbmRpcmVjdC1icmFuY2hdCgpBZGQg LW1oYXJkZW4tc2xzPSB0byBtaXRpZ2F0ZSBhZ2FpbnN0IHN0cmFpZ2h0IGxpbmUgc3BlY3VsYXRp b24gKFNMUykKZm9yIGZ1bmN0aW9uIHJldHVybiBhbmQgaW5kaXJlY3QgYnJhbmNoIGJ5IGFkZGlu ZyBhbiBJTlQzIGluc3RydWN0aW9uCmFmdGVyIGZ1bmN0aW9uIHJldHVybiBhbmQgaW5kaXJlY3Qg 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