From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by sourceware.org (Postfix) with ESMTPS id 004253857C74 for ; Thu, 24 Jun 2021 12:42:30 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 004253857C74 Received: by mail-pf1-x42a.google.com with SMTP id s14so3789302pfg.0 for ; Thu, 24 Jun 2021 05:42:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=6a9aqElZwBjvP11KVw2I1tpAnVtHwz0OZ0zpOxp1OVU=; b=oTLVTBbq+hjqMTUIe7LDhIQK5MgS9JEIanQtEgLL8D18Dvy3WRSOvXcJbgUGYBgtsw dZZm44b4jARIE6GAhjhkAG2US3iIFEUtcI/VDBOdTaLDF4gIO9oApQOUTshfwRQoL6Zt ar2IpUmJoPXgHIlhEAERtKsRDyF+88mgCkN22kE3GGQpEpyDTjoxyDMyBEwc0Yo2BR4e UJCgmvS9MGWh2LxZ1XsAWkEHCsCrr3lwL82vg6olBggBouVVZiGCvJo+R0dmqsRvGXiC kQ4IfuKcByIHr5ID0oNBD9tmq/Z8yKge+ouBqc94dCYrwzKlmgFraD2V4ZGwXcoWlGnF LW3A== X-Gm-Message-State: AOAM533V75eOVdfhvo23M5+U4PctyQpdw5LF6m5mH5iWURGbP9bsg0NK UuZeHd/g7M59z0Pz/hpsVOAUmLRIpU+6a5DP4Mw= X-Google-Smtp-Source: ABdhPJy7JHiSPhK7EreCls3ynWMaL/84yYrVkqviQhQLhYuuUrdsxAPXSraqAFwjVXoO8MjYgIcTj+skG2r71UnEclE= X-Received: by 2002:a65:478d:: with SMTP id e13mr4638492pgs.37.1624538549632; Thu, 24 Jun 2021 05:42:29 -0700 (PDT) MIME-Version: 1.0 References: <20210624121213.3469943-1-hjl.tools@gmail.com> In-Reply-To: From: "H.J. Lu" Date: Thu, 24 Jun 2021 05:41:53 -0700 Message-ID: Subject: Re: [PATCH] x86: Compile CPUID functions with -mgeneral-regs-only To: Richard Biener Cc: GCC Patches , Hongtao Liu Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3032.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Jun 2021 12:42:33 -0000 On Thu, Jun 24, 2021 at 5:35 AM Richard Biener wrote: > > On Thu, Jun 24, 2021 at 2:13 PM H.J. Lu via Gcc-patches > wrote: > > > > CPUID functions are used to detect CPU features. If vector ISAs > > are enabled, compiler is free to use them in these functions. Add > > __attribute__ ((target("general-regs-only"))) to CPUID functions > > to avoid vector instructions. > > But there are GPR instructions not in x86_64, so shouldn't > we use target("march=x86_64") or so? Note doing either will > of course prevent inlining of those "inlines". Does -march=x86_64, which enables CMOV and other GPR ISAs, work for -m32? > So I'm not sure how much of a fix this is ... the error will almost > always be visible in the caller as well. I think _attribute__ ((target("general-regs-only"))) is a step forward. > > gcc/ > > > > PR target/101185 > > * config/i386/cpuid.h (__get_cpuid_max): Add > > __attribute__ ((target("general-regs-only"))). > > (__get_cpuid): Likewise. > > (__get_cpuid_count): Likewise. > > (__cpuidex): Likewise. > > > > gcc/testsuite/ > > > > PR target/101185 > > * gcc.target/i386/avx512-check.h (check_osxsave): Add > > __attribute__ ((target("general-regs-only"))). > > (main): Likewise. > > --- > > gcc/config/i386/cpuid.h | 4 ++++ > > gcc/testsuite/gcc.target/i386/avx512-check.h | 2 ++ > > 2 files changed, 6 insertions(+) > > > > diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h > > index aebc17c6827..74881ee91e5 100644 > > --- a/gcc/config/i386/cpuid.h > > +++ b/gcc/config/i386/cpuid.h > > @@ -243,6 +243,7 @@ > > pointer is non-null, then first four bytes of the signature > > (as found in ebx register) are returned in location pointed by sig. */ > > > > +__attribute__ ((target("general-regs-only"))) > > static __inline unsigned int > > __get_cpuid_max (unsigned int __ext, unsigned int *__sig) > > { > > @@ -298,6 +299,7 @@ __get_cpuid_max (unsigned int __ext, unsigned int *__sig) > > supported and returns 1 for valid cpuid information or 0 for > > unsupported cpuid leaf. All pointers are required to be non-null. */ > > > > +__attribute__ ((target("general-regs-only"))) > > static __inline int > > __get_cpuid (unsigned int __leaf, > > unsigned int *__eax, unsigned int *__ebx, > > @@ -315,6 +317,7 @@ __get_cpuid (unsigned int __leaf, > > > > /* Same as above, but sub-leaf can be specified. */ > > > > +__attribute__ ((target("general-regs-only"))) > > static __inline int > > __get_cpuid_count (unsigned int __leaf, unsigned int __subleaf, > > unsigned int *__eax, unsigned int *__ebx, > > @@ -330,6 +333,7 @@ __get_cpuid_count (unsigned int __leaf, unsigned int __subleaf, > > return 1; > > } > > > > +__attribute__ ((target("general-regs-only"))) > > static __inline void > > __cpuidex (int __cpuid_info[4], int __leaf, int __subleaf) > > { > > diff --git a/gcc/testsuite/gcc.target/i386/avx512-check.h b/gcc/testsuite/gcc.target/i386/avx512-check.h > > index 0a377dba1d5..406faf8fe03 100644 > > --- a/gcc/testsuite/gcc.target/i386/avx512-check.h > > +++ b/gcc/testsuite/gcc.target/i386/avx512-check.h > > @@ -25,6 +25,7 @@ do_test (void) > > } > > #endif > > > > +__attribute__ ((target("general-regs-only"))) > > static int > > check_osxsave (void) > > { > > @@ -34,6 +35,7 @@ check_osxsave (void) > > return (ecx & bit_OSXSAVE) != 0; > > } > > > > +__attribute__ ((target("general-regs-only"))) > > int > > main () > > { > > -- > > 2.31.1 > > -- H.J.