From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qv1-xf2a.google.com (mail-qv1-xf2a.google.com [IPv6:2607:f8b0:4864:20::f2a]) by sourceware.org (Postfix) with ESMTPS id 5B6983858D32 for ; Tue, 18 Oct 2022 23:49:51 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 5B6983858D32 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-qv1-xf2a.google.com with SMTP id mx8so10350569qvb.8 for ; Tue, 18 Oct 2022 16:49:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=qNVdC7hn5n/U1oVljRfuipk/+KDJHwYLnJFJcLLjDWA=; b=oF2FvMVWWZtWIf0K5tZMoVCKa+DuiztjJAqetSbz+x1J/CD4BYc/ukWve1Q9w4g/3E maBI7O2DedTW6BdcYJpfhsuRMqdWZB7LSUHFOZg1SGwZGSjdzMOG4enWyut28ovLpbq+ S10DLcGUkgEwimJ2rG2qyVzJiP1vOy788cdqEv83PxPQtUKD2KUCCmB+FXQxuAjCuR+5 XgIeI+i7byAaNFUBRiFHTET09LvrSX1hNy4zBywMJzCD3GZGXdykrPOoJ/3j0x8/Y2lQ QBbb7is5Po4TGNVKFh6eCpQMkMAw66dpjsVJ7ko8166g+EZoKWbZv4GYWqxAftM8Zw51 eSZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=qNVdC7hn5n/U1oVljRfuipk/+KDJHwYLnJFJcLLjDWA=; b=IHZm6U4NyLFgKxWRY7r7g3Sv5l65DQh7flzgZnFwC8/tWcnXt1GSnGcoXFKVJSxqcM YY+zpfmc6NjSgHi2rFy0hUaNIJk8guAHclhYKukPFtOhgiRFKyNa625Ji1iX384ingCU uRF5iJsVUm6IgKoJgVEPA8zaQn4BmrYb+fKIBTxK+Nlots4vzmoJhIIqAynZ8KJfd9cn 72Gb2g9hoTUiKQs1anSy+2Euyx7PJVLmCO5Jgh3zXPVGCNicFQg08WcDCidjqfANtlvo sobiXPo9YC+AZVcsv/FOFoH64aq0W1iy6ZQ65bibsePvaB9hbZVkXpvVCjg7GxHAyFyz o3LQ== X-Gm-Message-State: ACrzQf3sqJQeC3SWHpmBvDUDs8rGkdPboVYg73/Qc1gZ3aB9zo5MwhvX Ra28ui55D5jSw2BdExb6GIJGFp/4nKu8kZCS+/E= X-Google-Smtp-Source: AMsMyM711W10tA9jG4NJzmynpLblPtOAUb+2jrH/AwMm9/R7k33yg+b1eJnoGBZNCLOed6qxkMtlAqQ9xlqwFi0zpw4= X-Received: by 2002:a05:6214:d6b:b0:4b1:c4de:5b3e with SMTP id 11-20020a0562140d6b00b004b1c4de5b3emr4375512qvs.128.1666136989726; Tue, 18 Oct 2022 16:49:49 -0700 (PDT) MIME-Version: 1.0 References: <20221018232301.264776-1-hongtao.liu@intel.com> In-Reply-To: <20221018232301.264776-1-hongtao.liu@intel.com> From: "H.J. Lu" Date: Tue, 18 Oct 2022 16:49:13 -0700 Message-ID: Subject: Re: [PATCH] Canonicalize vec_perm index to make the first index come from the first vector. To: liuhongt Cc: gcc-patches@gcc.gnu.org, crazylht@gmail.com, ubizjak@gmail.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3023.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Tue, Oct 18, 2022 at 4:25 PM liuhongt wrote: > > Fix unexpected non-canon form from gimple vector selector. > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. > Ok for trunk? > > gcc/ChangeLog: > > PR target/107271 > * config/i386/i386-expand.cc (ix86_vec_perm_index_canon): New. > (expand_vec_perm_shufps_shufps): Call > ix86_vec_perm_index_canon > > gcc/testsuite/ChangeLog: > > * gcc.target/i386/pr107271.c: New test. > --- > gcc/config/i386/i386-expand.cc | 17 +++++++++++++++++ > gcc/testsuite/gcc.target/i386/pr107271.c | 16 ++++++++++++++++ > 2 files changed, 33 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/i386/pr107271.c > > diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc > index 6baff6d0e61..4f121516091 100644 > --- a/gcc/config/i386/i386-expand.cc > +++ b/gcc/config/i386/i386-expand.cc > @@ -19604,6 +19604,22 @@ expand_vec_perm_1 (struct expand_vec_perm_d *d) > return false; > } > > +/* Canonicalize vec_perm index to make the first index > + always comes from the first index. */ vector? > +static void > +ix86_vec_perm_index_canon (struct expand_vec_perm_d *d) > +{ > + unsigned nelt = d->nelt; > + if (d->perm[0] < nelt) > + return; > + > + for (unsigned i = 0; i != nelt; i++) > + d->perm[i] = (d->perm[i] + nelt) % (2 * nelt); > + > + std::swap (d->op0, d->op1); > + return; > +} > + > /* A subroutine of ix86_expand_vec_perm_const_1. Try to implement D > in terms of a pair of shufps+ shufps/pshufd instructions. */ > static bool > @@ -19621,6 +19637,7 @@ expand_vec_perm_shufps_shufps (struct expand_vec_perm_d *d) > if (d->testing_p) > return true; > > + ix86_vec_perm_index_canon (d); > for (i = 0; i < 4; ++i) > count += d->perm[i] > 3 ? 1 : 0; > > diff --git a/gcc/testsuite/gcc.target/i386/pr107271.c b/gcc/testsuite/gcc.target/i386/pr107271.c > new file mode 100644 > index 00000000000..fe89c9a5bef > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/pr107271.c > @@ -0,0 +1,16 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O0" } */ > + > +typedef int __attribute__((__vector_size__ (16))) V; > + > +static inline __attribute__((__always_inline__)) V > +bar (V v128u32_0) > +{ > + return __builtin_shuffle ((V){}, v128u32_0, v128u32_0); > +} > + > +V > +foo (void) > +{ > + return bar ((V){7, 4, 4}); > +} > -- > 2.27.0 > -- H.J.