From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 41146 invoked by alias); 20 May 2015 12:36:03 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 41130 invoked by uid 89); 20 May 2015 12:36:01 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.7 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-ob0-f178.google.com Received: from mail-ob0-f178.google.com (HELO mail-ob0-f178.google.com) (209.85.214.178) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 20 May 2015 12:36:00 +0000 Received: by obbea2 with SMTP id ea2so736122obb.3 for ; Wed, 20 May 2015 05:35:59 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.202.106.197 with SMTP id f188mr27195962oic.128.1432125358961; Wed, 20 May 2015 05:35:58 -0700 (PDT) Received: by 10.76.160.68 with HTTP; Wed, 20 May 2015 05:35:58 -0700 (PDT) In-Reply-To: References: <20150515194824.GB14415@kam.mff.cuni.cz> <20150515202319.GE17573@brightrain.aerifal.cx> <20150515204237.GF17573@brightrain.aerifal.cx> <20150515230810.GA73210@kam.mff.cuni.cz> <20150515234403.GG17573@brightrain.aerifal.cx> <20150519180659.GG17573@brightrain.aerifal.cx> <555B87F4.30908@redhat.com> Date: Wed, 20 May 2015 12:40:00 -0000 Message-ID: Subject: Re: [PATCH i386] Allow sibcalls in no-PLT PIC From: "H.J. Lu" To: Michael Matz Cc: Richard Henderson , Rich Felker , Jan Hubicka , Alexander Monakov , GCC Patches , Uros Bizjak Content-Type: text/plain; charset=UTF-8 X-IsSubscribed: yes X-SW-Source: 2015-05/txt/msg01822.txt.bz2 On Wed, May 20, 2015 at 5:10 AM, Michael Matz wrote: > Hi, > > On Tue, 19 May 2015, Richard Henderson wrote: > >> It is. The relaxation that HJ is working on requires that the reads >> from the got not be hoisted. I'm not especially convinced that what >> he's working on is a win. >> >> With LTO, the compiler can do the same job that he's attempting in the >> linker, without an extra nop. Without LTO, leaving it to the linker >> means that you can't hoist the load and hide the memory latency. > > Well, hoisting always needs a register, and if hoisted out of a loop > (which you all seem to be after) that register is live through the whole > loop body. You need a register for each different called function in such > loop, trading the one GOT pointer with N other registers. For > register-starved machines this is a real problem, even x86-64 doesn't have > that many. I.e. I'm not convinced that this hoisting will really be much > of a win that often, outside toy examples. Sure, the compiler can hoist > function addresses trivially, but I think it will lead to spilling more > often than not, or alternatively the hoisting will be undone by the > register allocators rematerialization. Of course, this would have to be > measured for real not hand-waved, but, well, I'd be surprised if it's not > so. > We should replace "call/jmp *foo@GOTPCREL(%rip)" with "call/jmp *foo@GOTRELAX(%rip)". As an option, we apply -fno-plt to both PIC and non-PIC codes, if foo is externally defined. It will save one indirect branch if GCC is right. If GCC is wrong and foo is defined locally, we get a nop prefix/suffix. We have nothing to lose. -- H.J.