From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ot1-x32b.google.com (mail-ot1-x32b.google.com [IPv6:2607:f8b0:4864:20::32b]) by sourceware.org (Postfix) with ESMTPS id 69D7B3851C1C for ; Thu, 15 Apr 2021 17:36:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 69D7B3851C1C Received: by mail-ot1-x32b.google.com with SMTP id k14-20020a9d7dce0000b02901b866632f29so23307816otn.1 for ; Thu, 15 Apr 2021 10:36:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=y51PpYsTgG93iTLO1jYjSyEKHKecOH1eT3sCb+gSDkI=; b=JCo6M4+nZ33w39q0quUbuis2CvoW95a9aq+mo5ywHxrILjvvvcuslRdRcC1Yk2DnA4 bdzzThscOzu7SLkiHooU/05WHL9IWrVTFJV1RrvtRPlhFCqEaWb64lEFkwZW4f9AcMua 1LG8C3IA2kV/00+OMKO23nlp8MVHV9ZhYxPHNeiKgpCa3SVgP3n3qiZRMl1vFNmAtO1I e8R1+NqCvHRs50AzPjAjr+YAhS+zsmbwgm+FV9Vn0zwqV3IgfJbfOnCgk8jjhUOt4RyY nEYY/uyg+A0zbmIoT4l2Io+Rs/UTeDgws6o2Gn8Q8TJ87Hwh0A3jkmbCHVo8fbhI9gKI HmKw== X-Gm-Message-State: AOAM533tstdWdo+LMGAiDuJSdsRSbo18Hj4atwNxC+Y7l3YxSVBFGI2K VbziVF2CQVTSPv6UaL8kC6OUYHs99XTBsNgA6nA= X-Google-Smtp-Source: ABdhPJxyddlHSSQUi7wfo8ix7QOkr4xUoKtNOTNRriuMC95b/xpgQkiYo7PwrYqkbGR+Cu2Zbwn8cdxE/NXwdzP3PVg= X-Received: by 2002:a05:6830:90c:: with SMTP id v12mr299102ott.179.1618508159793; Thu, 15 Apr 2021 10:35:59 -0700 (PDT) MIME-Version: 1.0 References: <20210415151144.439294-1-hjl.tools@gmail.com> In-Reply-To: From: "H.J. Lu" Date: Thu, 15 Apr 2021 10:35:23 -0700 Message-ID: Subject: Re: [PATCH v2] x86: Use crc32 target option for CRC32 intrinsics To: Uros Bizjak Cc: "gcc-patches@gcc.gnu.org" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3028.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 Apr 2021 17:36:01 -0000 On Thu, Apr 15, 2021 at 9:53 AM Uros Bizjak wrote: > > On Thu, Apr 15, 2021 at 6:51 PM H.J. Lu wrote: > > > > On Thu, Apr 15, 2021 at 9:34 AM Uros Bizjak wrote: > > > > > > On Thu, Apr 15, 2021 at 6:26 PM H.J. Lu wrote: > > > > > > > > On Thu, Apr 15, 2021 at 9:14 AM Uros Bizjak wrote: > > > > > > > > > > On Thu, Apr 15, 2021 at 5:11 PM H.J. Lu wrote: > > > > > > > > > > > > Use crc32 target option for CRC32 intrinsics to support CRC32 intrinsics > > > > > > without enabling SSE vector instructions. > > > > > > > > > > There is no CRC32 ISA. crc32 is part of SSE4.2 [1] and current > > > > > situation reflects that correctly. > > > > > > > > CRC32 is similar to POPCNT which was originally in SSE4.2. Now POPCNT > > > > > > It is not similar, POPCNT has its own CPUID flag and can be enabled > > > independently of SSE4.2. > > > > > > > is a separate feature which is also enabled by SSE4.2. Enable CRC32 only > > > > with SSE4.2 makes it impossible to use CRC32 with -mgeneral-regs-only. This > > > > patch addresses this issue the same way as POPCNT. > > > > > > CRC32 doesn't have its own CPUID flag, so PTA_CRC32 is pointless. > > > > PTA_CRC32 shouldn't be added. > > > > > OTOH, the situation is similar with MONITOR and MWAIT. These are > > > > There are no intrinsics for MONITOR nor MWAIT. > > pmmintrin.h: > > extern __inline void __attribute__((__gnu_inline__, __always_inline__, > __artificial__)) > _mm_monitor (void const * __P, unsigned int __E, unsigned int __H) > { > __builtin_ia32_monitor (__P, __E, __H); > } > > extern __inline void __attribute__((__gnu_inline__, __always_inline__, > __artificial__)) > _mm_mwait (unsigned int __E, unsigned int __H) > { > __builtin_ia32_mwait (__E, __H); > } They can be moved to mwaitintrin.h with -mmwait. > > > > > enabled with SSE3 and don't use XMM registers. Also somewhat similar > > > is FISTTP, but there is no intrinsic for this insn. > > > > True. > > > > Here is the v2 patch without PTA_CRC32. > > > > -- > > H.J. -- H.J.