Re: [PATCH, PR tree-optimization/PR68305] Support masked COND_EXPR in SLP

["H.J. Lu" <hjl.tools@gmail.com>]

On Thu, Nov 12, 2015 at 4:03 AM, Ilya Enkovich <enkovich.gnu@gmail.com> wrote:
> Hi,
>
> This patch fixes a way operand is chosen by its num for COND_EXPR.  Bootstrapped and regtested on x86_64-unknown-linux-gnu.  OK for trunk?
>
> Thanks,
> Ilya
> --
> gcc/
>
> 2015-11-12  Ilya Enkovich  <enkovich.gnu@gmail.com>
>
>         PR tree-optimization/68305
>         * tree-vect-slp.c (vect_get_constant_vectors): Support
>         COND_EXPR with SSA_NAME as a condition.
>
> gcc/testsuite/
>
> 2015-11-12  Ilya Enkovich  <enkovich.gnu@gmail.com>
>
>         PR tree-optimization/68305
>         * gcc.dg/vect/pr68305.c: New test.
>
>
> diff --git a/gcc/testsuite/gcc.dg/vect/pr68305.c b/gcc/testsuite/gcc.dg/vect/pr68305.c
> new file mode 100644
> index 0000000..fde3db7
> --- /dev/null
> +++ b/gcc/testsuite/gcc.dg/vect/pr68305.c
> @@ -0,0 +1,13 @@
> +/* { dg-do compile } */
> +/* { dg-additional-options "-O3" } */
> +/* { dg-additional-options "-mavx2" { target avx_runtime } } */
> +
>

Since this is a compile test, there is no need for AVX run-time.
I checked in this as an obvious fix.

-- 
H.J.
---
Index: ChangeLog
===================================================================
--- ChangeLog (revision 231819)
+++ ChangeLog (working copy)
@@ -1,3 +1,8 @@
+2015-12-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+ * gcc.dg/vect/pr68305.c (dg-additional-options): Add -mavx2
+ for x86 target.
+
 2015-12-18  Nathan Sidwell  <nathan@acm.org>

  * c-c++-common/attr-simd-3.c: Requires pthreads.
Index: gcc.dg/vect/pr68305.c
===================================================================
--- gcc.dg/vect/pr68305.c (revision 231819)
+++ gcc.dg/vect/pr68305.c (working copy)
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* { dg-additional-options "-O3" } */
-/* { dg-additional-options "-mavx2" { target avx_runtime } } */
+/* { dg-additional-options "-mavx2" { target { i?86-*-* x86_64-*-* } } } */

 int a, b;