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From: "H.J. Lu" <hjl.tools@gmail.com>
To: Uros Bizjak <ubizjak@gmail.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH 37/40] i386: Allow MMX intrinsic emulation with SSE
Date: Thu, 14 Feb 2019 23:13:00 -0000	[thread overview]
Message-ID: <CAMe9rOpgzCZHap06PRC6LU8FXcMFKGF6muVEDwmnVomKw6xY3A@mail.gmail.com> (raw)
In-Reply-To: <CAFULd4Zen0uujyz+_NDLu6sQH+D8On6dAFfrG-fVH8QQM0YmHg@mail.gmail.com>

On Thu, Feb 14, 2019 at 2:57 PM Uros Bizjak <ubizjak@gmail.com> wrote:
>
> On Thu, Feb 14, 2019 at 10:02 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> > > > > > gcc/
> > > > > >
> > > > > >         PR target/89021
> > > > > >         * config/i386/i386-builtin.def: Enable MMX intrinsics with
> > > > > >         SSE/SSE2/SSSE3.
> > > > > >         * config/i386/i386.c (ix86_option_override_internal): Don't
> > > > > >         enable MMX ISA with TARGET_MMX_WITH_SSE by default.
> > > > > >         (ix86_init_mmx_sse_builtins): Enable MMX intrinsics with
> > > > > >         SSE/SSE2/SSSE3.
> > > > > >         (ix86_expand_builtin): Allow SSE/SSE2/SSSE3 to emulate MMX
> > > > > >         intrinsics with TARGET_MMX_WITH_SSE.
> > > > > >         * config/i386/mmintrin.h: Don't require MMX in 64-bit mode.
> > > > > >
> > > >
> > > > >
> > > > > > diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> > > > > > index a9abbe8706b..1d417e08734 100644
> > > > > > --- a/gcc/config/i386/i386.c
> > > > > > +++ b/gcc/config/i386/i386.c
> > > > > > @@ -4165,12 +4165,15 @@ ix86_option_override_internal (bool main_args_p,
> > > > > >        opts->x_target_flags
> > > > > >         |= TARGET_SUBTARGET64_DEFAULT & ~opts_set->x_target_flags;
> > > > > >
> > > > > > -      /* Enable by default the SSE and MMX builtins.  Do allow the user to
> > > > > > -        explicitly disable any of these.  In particular, disabling SSE and
> > > > > > -        MMX for kernel code is extremely useful.  */
> > > > > > +      /* Enable the SSE and MMX builtins by default.  Don't enable MMX
> > > > > > +         ISA with TARGET_MMX_WITH_SSE by default.  Do allow the user to
> > > > > > +        explicitly disable any of these.  In particular, disabling SSE
> > > > > > +        and MMX for kernel code is extremely useful.  */
> > > > > >        if (!ix86_arch_specified)
> > > > > >        opts->x_ix86_isa_flags
> > > > > > -       |= ((OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_MMX
> > > > > > +       |= ((OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE
> > > > > > +            | (TARGET_MMX_WITH_SSE_P (opts->x_ix86_isa_flags)
> > > > > > +               ? 0 : OPTION_MASK_ISA_MMX)
> > > > > >              | TARGET_SUBTARGET64_ISA_DEFAULT)
> > > > > >              & ~opts->x_ix86_isa_flags_explicit);
> > > > >
> > > > > Please split the above into two clauses, the first that sets SSE and
> > > > > MMX by default, and the second to or with
> > > > >
> > > > > opts->x_ix86_isa_flags
> > > > >      |= TARGET_SUBTARGET64_ISA_DEFAULT & ~opts->x_ix86_isa_flags_explicit
> > > > >
> > > >
> > > > Like this?
> > >
> > > Yes, but also split the comment.
> >
> > I will go with
> >
> >      /* Enable by default the SSE and MMX builtins.  Do allow the user to
> >          explicitly disable any of these.  In particular, disabling SSE and
> >          MMX for kernel code is extremely useful.  */
> >       if (!ix86_arch_specified)
> >         {
> >           /* Don't enable MMX ISA with TARGET_MMX_WITH_SSE.  */
> >           opts->x_ix86_isa_flags
> >             |= ((OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE
> >                  | (TARGET_MMX_WITH_SSE_P (opts->x_ix86_isa_flags)
> >                     ? 0 : OPTION_MASK_ISA_MMX))
> >                 & ~opts->x_ix86_isa_flags_explicit);
> >           opts->x_ix86_isa_flags
> >             |= (TARGET_SUBTARGET64_ISA_DEFAULT
> >                 & ~opts->x_ix86_isa_flags_explicit);
> >         }
>
> I'll commit the following patch that finally defines
> TARGET_SUBTARGET64_ISA_DEFAULT. You could then simply clear the MMX
> bit from x_i86_isa_flags, like:
>
>       if (!ix86_arch_specified)
>     opts->x_ix86_isa_flags
>       |= TARGET_SUBTARGET64_ISA_DEFAULT & ~opts->x_ix86_isa_flags_explicit;
>
>       /* Don't enable MMX ISA with TARGET_MMX_WITH_SSE.  */
>       if (TARGET_MMX_WITH_SSE_P (opts->x_ix86_isa_flags))
>     opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MMX;

I think it should be:

          /* Don't enable MMX ISA with TARGET_MMX_WITH_SSE.  */
          if (!(opts->x_ix86_isa_flags & OPTION_MASK_ISA_MMX)
              && TARGET_MMX_WITH_SSE_P (opts->x_ix86_isa_flags))
            opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MMX;

Thanks.

-- 
H.J.

  reply	other threads:[~2019-02-14 23:13 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-14 12:31 [PATCH 00/40] V5: Emulate MMX intrinsics " H.J. Lu
2019-02-14 12:31 ` [PATCH 02/40] i386: Emulate MMX packsswb/packssdw/packuswb with SSE2 H.J. Lu
2019-02-14 12:31 ` [PATCH 05/40] i386: Emulate MMX mulv4hi3 with SSE H.J. Lu
2019-02-14 12:31 ` [PATCH 13/40] i386: Emulate MMX pshufw " H.J. Lu
2019-02-14 12:31 ` [PATCH 20/40] i386: Emulate MMX mmx_umulv4hi3_highpart " H.J. Lu
2019-02-14 12:31 ` [PATCH 35/40] i386: Allow MMXMODE moves with TARGET_MMX_WITH_SSE H.J. Lu
2019-02-14 12:31 ` [PATCH 23/40] i386: Emulate MMX mmx_uavgv4hi3 with SSE H.J. Lu
2019-02-14 12:31 ` [PATCH 31/40] i386: Emulate MMX pshufb with SSE version H.J. Lu
2019-02-14 14:21   ` Uros Bizjak
2019-02-14 12:31 ` [PATCH 06/40] i386: Emulate MMX smulv4hi3_highpart with SSE H.J. Lu
2019-02-14 12:31 ` [PATCH 17/40] i386: Emulate MMX mmx_pinsrw " H.J. Lu
2019-02-14 12:31 ` [PATCH 08/40] i386: Emulate MMX ashr<mode>3/<shift_insn><mode>3 " H.J. Lu
2019-02-14 14:04   ` Uros Bizjak
2019-02-14 12:31 ` [PATCH 14/40] i386: Emulate MMX sse_cvtps2pi/sse_cvttps2pi " H.J. Lu
2019-02-14 12:31 ` [PATCH 10/40] i386: Emulate MMX mmx_andnot<mode>3 " H.J. Lu
2019-02-14 12:31 ` [PATCH 03/40] i386: Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX H.J. Lu
2019-02-14 12:31 ` [PATCH 07/40] i386: Emulate MMX mmx_pmaddwd with SSE H.J. Lu
2019-02-14 12:31 ` [PATCH 04/40] i386: Emulate MMX plusminus/sat_plusminus " H.J. Lu
2019-02-14 12:31 ` [PATCH 40/40] i386: Also enable SSSE3 __m64 tests in 64-bit mode H.J. Lu
2019-02-14 20:21   ` Uros Bizjak
2019-02-14 20:43     ` Uros Bizjak
2019-02-14 20:56       ` H.J. Lu
2019-02-14 21:57         ` [PATCH, testsuite]: Re-enable 64-bit form in gcc.target/i386/ssse3-*.c on AVX targets Uros Bizjak
2019-02-14 12:31 ` [PATCH 16/40] i386: Emulate MMX mmx_pextrw with SSE H.J. Lu
2019-02-14 12:31 ` [PATCH 12/40] i386: Emulate MMX vec_dupv2si " H.J. Lu
2019-02-14 12:33 ` [PATCH 30/40] i386: Emulate MMX ssse3_pmulhrswv4hi3 " H.J. Lu
2019-02-14 12:33 ` [PATCH 09/40] i386: Emulate MMX <any_logic><mode>3 " H.J. Lu
2019-02-14 12:33 ` [PATCH 34/40] i386: Emulate MMX abs<mode>2 " H.J. Lu
2019-02-14 12:33 ` [PATCH 26/40] i386: Emulate MMX umulv1siv1di3 with SSE2 H.J. Lu
2019-02-14 12:33 ` [PATCH 25/40] i386: Emulate MMX movntq with SSE2 movntidi H.J. Lu
2019-02-14 14:17   ` Uros Bizjak
2019-02-14 12:33 ` [PATCH 38/40] i386: Enable TM MMX intrinsics with SSE2 H.J. Lu
2019-02-14 12:33 ` [PATCH 24/40] i386: Emulate MMX mmx_psadbw with SSE H.J. Lu
2019-02-14 12:33 ` [PATCH 27/40] i386: Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 " H.J. Lu
2019-02-14 12:33 ` [PATCH 11/40] i386: Emulate MMX mmx_eq/mmx_gt<mode>3 " H.J. Lu
2019-02-14 12:33 ` [PATCH 01/40] i386: Allow MMX register modes in SSE registers H.J. Lu
2019-02-14 12:33 ` [PATCH 28/40] i386: Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE H.J. Lu
2019-02-14 12:33 ` [PATCH 22/40] i386: Emulate MMX mmx_uavgv8qi3 " H.J. Lu
2019-02-14 12:33 ` [PATCH 19/40] i386: Emulate MMX mmx_pmovmskb " H.J. Lu
2019-02-14 12:33 ` [PATCH 33/40] i386: Emulate MMX ssse3_palignrdi " H.J. Lu
2019-02-14 12:33 ` [PATCH 37/40] i386: Allow MMX intrinsic emulation " H.J. Lu
2019-02-14 20:07   ` Uros Bizjak
2019-02-14 20:50     ` H.J. Lu
2019-02-14 20:54       ` Uros Bizjak
2019-02-14 21:02         ` H.J. Lu
2019-02-14 22:57           ` Uros Bizjak
2019-02-14 23:13             ` H.J. Lu [this message]
2019-02-14 23:14               ` H.J. Lu
2019-02-14 23:21                 ` Uros Bizjak
2019-02-14 23:24                   ` H.J. Lu
2019-02-15 12:04   ` Uros Bizjak
2019-02-14 12:33 ` [PATCH 32/40] i386: Emulate MMX ssse3_psign<mode>3 " H.J. Lu
2019-02-14 12:33 ` [PATCH 18/40] i386: Emulate MMX V4HI smaxmin/V8QI umaxmin " H.J. Lu
2019-02-14 12:33 ` [PATCH 21/40] i386: Emulate MMX maskmovq with SSE2 maskmovdqu H.J. Lu
2019-02-14 12:33 ` [PATCH 36/40] i386: Allow MMX vector expanders with TARGET_MMX_WITH_SSE H.J. Lu
2019-02-14 12:33 ` [PATCH 39/40] i386: Add tests for MMX intrinsic emulations with SSE H.J. Lu
2019-02-15 12:21   ` Uros Bizjak
2019-02-14 12:33 ` [PATCH 29/40] i386: Emulate MMX ssse3_pmaddubsw " H.J. Lu
2019-02-14 12:33 ` [PATCH 15/40] i386: Emulate MMX sse_cvtpi2ps " H.J. Lu
2019-02-14 14:14   ` Uros Bizjak
2019-02-14 18:18 ` [PATCH 41/40] Prevent allocation of MMX registers with TARGET_MMX_WITH_SSE Uros Bizjak
  -- strict thread matches above, loose matches on Subject: below --
2019-02-11 22:56 [PATCH 00/40] V4: Emulate MMX intrinsics with SSE H.J. Lu
2019-02-11 22:57 ` [PATCH 37/40] i386: Allow MMX intrinsic emulation " H.J. Lu
2019-02-12 12:07   ` Uros Bizjak
2019-02-13 20:21     ` H.J. Lu
2019-02-13 22:51       ` Uros Bizjak
2019-02-13 23:03         ` H.J. Lu
2019-02-14  8:16           ` Uros Bizjak
2019-02-14  9:44             ` Richard Biener
2019-02-14 10:14               ` Uros Bizjak

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