From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by sourceware.org (Postfix) with ESMTPS id 52200385842B for ; Sat, 26 Mar 2022 02:08:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 52200385842B Received: by mail-pj1-x102d.google.com with SMTP id mp6-20020a17090b190600b001c6841b8a52so13796063pjb.5 for ; Fri, 25 Mar 2022 19:08:42 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=GPn13zpZq9JJVthWrfCBd1d2Ej6HqPEM+LxZJlUEDP4=; b=hD1OT06eU7P6L3AjDK+SehSSrXzUU8gIjqdTGZK3PLHogYBfZ45nWoTEKbGEkNsNit ASTqnB09Urxak3qYBj+QGRuLEveFnb2HSPwGlV/vJeTxOEvZnv47MpbXwEp04bUIXOar ERabTmBVfiTYQnj3wi4J/M4TPkMotRKsYhBVH0vXoSQKFZyQEGR+86Ec0ZIaL3FfB8uj umT8xeHTfis5Tm+dKuMBsG1u57OLG9Fk1Wo0c5ea3HfwQQAv3EoabXYEMYiqjUFKU/AL L0TDWuEgec1hLxP8L+mdosnD3tYs/x+Fg+NLqi+AwOown1dKhPIMnqZiECRSJsWAEWqp FHSw== X-Gm-Message-State: AOAM532cZGpyv1aCIitrMg2vDmRHhyrXpMo+i5s7GImpROHlGFWemggw 0uyyTFQaddWfFZHMI3lb7KI0ym0rMDD3Zd81s0Q= X-Google-Smtp-Source: ABdhPJz4Loc2pQHCo67NfwvYfY2gX9pXBXQPnZNO47LZE54I6Ydbwyaf0AXZxZJDVai6Mr3joB8hYXzT1UTX/2PrC7o= X-Received: by 2002:a17:90b:1c02:b0:1c8:da30:5ed7 with SMTP id oc2-20020a17090b1c0200b001c8da305ed7mr5221435pjb.28.1648260521282; Fri, 25 Mar 2022 19:08:41 -0700 (PDT) MIME-Version: 1.0 References: <20220325205014.32895-1-hjl.tools@gmail.com> In-Reply-To: From: "H.J. Lu" Date: Fri, 25 Mar 2022 19:08:05 -0700 Message-ID: Subject: Re: [PATCH] x86: Use x constraint on KL patterns To: Hongyu Wang Cc: GCC Patches , liuhongt Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-3024.7 required=5.0 tests=BAYES_00, BODY_8BITS, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 26 Mar 2022 02:08:45 -0000 On Fri, Mar 25, 2022 at 7:04 PM Hongyu Wang wrote: > > > > Is it possible to create a test case that gas would throw an error fo= r > > > invalid operands? > > > > You can use -ffix-xmmN to disable XMM0-15. > > I mean can we create an intrinsic test for this PR that produces xmm16-31= ? > And the -ffix-xmmN is an option for assembler or compiler? I didn't > find it in document. You can add -march=3Dskylake-avx512 -ffix-xmm0 ... -ffix-xmm15 to force XMM16-XMM31. > H.J. Lu =E4=BA=8E2022=E5=B9=B43=E6=9C=8826=E6=97=A5= =E5=91=A8=E5=85=AD 09:22=E5=86=99=E9=81=93=EF=BC=9A > > > > On Fri, Mar 25, 2022 at 6:08 PM Hongyu Wang wr= ote: > > > > > > Is it possible to create a test case that gas would throw an error fo= r > > > invalid operands? > > > > You can use -ffix-xmmN to disable XMM0-15. > > > > > H.J. Lu via Gcc-patches =E4=BA=8E2022=E5=B9= =B43=E6=9C=8826=E6=97=A5=E5=91=A8=E5=85=AD 04:50=E5=86=99=E9=81=93=EF=BC=9A > > > > > > > > Since KL instructions have no AVX512 version, replace the "v" regis= ter > > > > constraint with the "x" register constraint. > > > > > > > > PR target/105058 > > > > * config/i386/sse.md (loadiwkey): Replace "v" with "x". > > > > (aesu8): Likewise. > > > > --- > > > > gcc/config/i386/sse.md | 6 +++--- > > > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > > > > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > > > > index 29802d00ce6..33bd2c4768a 100644 > > > > --- a/gcc/config/i386/sse.md > > > > +++ b/gcc/config/i386/sse.md > > > > @@ -28364,8 +28364,8 @@ (define_insn "avx512f_dpbf16ps__mask" > > > > > > > > ;; KEYLOCKER > > > > (define_insn "loadiwkey" > > > > - [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand"= "v") > > > > - (match_operand:V2DI 1 "register_operand" = "v") > > > > + [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand"= "x") > > > > + (match_operand:V2DI 1 "register_operand" = "x") > > > > (match_operand:V2DI 2 "register_operand" = "Yz") > > > > (match_operand:SI 3 "register_operand" = "a")] > > > > UNSPECV_LOADIWKEY) > > > > @@ -28498,7 +28498,7 @@ (define_int_attr aesklvariant > > > > (UNSPECV_AESENC256KLU8 "enc256kl")]) > > > > > > > > (define_insn "aesu8" > > > > - [(set (match_operand:V2DI 0 "register_operand" "=3Dv") > > > > + [(set (match_operand:V2DI 0 "register_operand" "=3Dx") > > > > (unspec_volatile:V2DI [(match_operand:V2DI 1 "register_oper= and" "0") > > > > (match_operand:BLK 2 "memory_opera= nd" "m")] > > > > AESDECENCKL)) > > > > -- > > > > 2.35.1 > > > > > > > > > > > > -- > > H.J. --=20 H.J.