From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 2407 invoked by alias); 16 Aug 2011 21:07:09 -0000 Received: (qmail 2398 invoked by uid 22791); 16 Aug 2011 21:07:08 -0000 X-SWARE-Spam-Status: No, hits=-2.4 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from mail-qy0-f175.google.com (HELO mail-qy0-f175.google.com) (209.85.216.175) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 16 Aug 2011 21:06:52 +0000 Received: by qyk4 with SMTP id 4so1738929qyk.20 for ; Tue, 16 Aug 2011 14:06:51 -0700 (PDT) MIME-Version: 1.0 Received: by 10.224.190.132 with SMTP id di4mr195398qab.155.1313528811165; Tue, 16 Aug 2011 14:06:51 -0700 (PDT) Received: by 10.229.29.7 with HTTP; Tue, 16 Aug 2011 14:06:51 -0700 (PDT) In-Reply-To: <20110816205046.44176B21AC@azwildcat.mtv.corp.google.com> References: <20110816205046.44176B21AC@azwildcat.mtv.corp.google.com> Date: Tue, 16 Aug 2011 21:27:00 -0000 Message-ID: Subject: Re: [4.7][google]Support for getting CPU type and feature information at run-time. (issue4893046) From: "H.J. Lu" To: Sriraman Tallam Cc: reply@codereview.appspotmail.com, gcc-patches@gcc.gnu.org Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-08/txt/msg01363.txt.bz2 On Tue, Aug 16, 2011 at 1:50 PM, Sriraman Tallam wrot= e: > Support for getting CPU type and feature information at run-time. > > The following patch provides support for finding the platform type at run= -time, like cpu type and features supported. The multi-versioning framework= will use the builtins added to dispatch the right function version. Please= refer to http://gcc.gnu.org/ml/gcc/2011-08/msg00298.html for details on fu= nction multi-versioning usability. > > =A0 =A0 =A0 =A0* tree-pass.h (pass_tree_fold_builtin_target): New pass. > =A0 =A0 =A0 =A0* builtins.def (BUILT_IN_TARGET_SUPPORTS_CMOV): New builti= n. > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_SUPPORTS_MMX): New builtin. > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_SUPPORTS_POPCOUNT): New builtin. > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_SUPPORTS_SSE): New builtin. > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_SUPPORTS_SSE2): New builtin. > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_SUPPORTS_SSE3): New builtin. > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_SUPPORTS_SSSE3): New builtin. > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_SUPPORTS_SSE4_1): New builtin. > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_SUPPORTS_SSE4_2): New builtin. > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_IS_AMD): New builtin. > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_IS_INTEL): New builtin. > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_IS_COREI7_NEHALEM): New builtin. > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_IS_COREI7_WESTMERE): New builtin. > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_IS_COREI7_SANDYBRIDGE): New builtin. Can you add Intel Atom? > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_IS_AMDFAM10_BARCELONA): New builtin. > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_IS_AMDFAM10_SHANGHAI): New builtin. > =A0 =A0 =A0 =A0(BUILT_IN_TARGET_IS_AMDFAM10_ISTANBUL): New builtin. > =A0 =A0 =A0 =A0* mversn-dispatch.c (do_fold_builtin_target): New function. > =A0 =A0 =A0 =A0(gate_fold_builtin_target): New function. > =A0 =A0 =A0 =A0(pass_tree_fold_builtin_target): New pass. > =A0 =A0 =A0 =A0* timevar.def (TV_FOLD_BUILTIN_TARGET): New var. > =A0 =A0 =A0 =A0* passes.c (init_optimization_passes): Add new pass to pas= s list. > =A0 =A0 =A0 =A0* config/i386/i386.c (build_struct_with_one_bit_fields): N= ew function. > =A0 =A0 =A0 =A0(make_var_decl): New function. > =A0 =A0 =A0 =A0(get_field_from_struct): New function. > =A0 =A0 =A0 =A0(make_constructor_to_get_target_type): New function. > =A0 =A0 =A0 =A0(fold_builtin_target): New function. > =A0 =A0 =A0 =A0(ix86_fold_builtin): New function. > =A0 =A0 =A0 =A0(TARGET_FOLD_BUILTIN): New macro. > > =A0 =A0 =A0 =A0* gcc.dg/builtin_target.c: New test. > > =A0 =A0 =A0 =A0* config/i386/i386-cpuinfo.c: New file. > =A0 =A0 =A0 =A0* config/i386/t-cpuinfo: New file. > =A0 =A0 =A0 =A0* config.host: Add t-cpuinfo to link i386-cpuinfo.o with l= ibgcc > > +static void > +get_intel_cpu (unsigned int family, unsigned int model, unsigned int bra= nd_id) > +{ > + =A0/* Parse family and model only if brand ID is 0. */ > + =A0if (brand_id =3D=3D 0) > + =A0 =A0{ > + =A0 =A0 =A0switch (family) > + =A0 =A0 =A0 { > + =A0 =A0 =A0 case 0x5: > + =A0 =A0 =A0 =A0 __cpu_type =3D PROCESSOR_PENTIUM; > + =A0 =A0 =A0 =A0 break; > + =A0 =A0 =A0 case 0x6: > + =A0 =A0 =A0 =A0 switch (model) > + =A0 =A0 =A0 =A0 =A0 { > + =A0 =A0 =A0 =A0 =A0 case 0x1a: > + =A0 =A0 =A0 =A0 =A0 case 0x1e: > + =A0 =A0 =A0 =A0 =A0 case 0x1f: > + =A0 =A0 =A0 =A0 =A0 case 0x2e: > + =A0 =A0 =A0 =A0 =A0 =A0 /* Nehalem. =A0*/ > + =A0 =A0 =A0 =A0 =A0 =A0 __cpu_type =3D PROCESSOR_COREI7_NEHALEM; > + =A0 =A0 =A0 =A0 =A0 =A0 __cpu_model.__cpu_is_corei7_nehalem =3D 1; > + =A0 =A0 =A0 =A0 =A0 =A0 break; > + =A0 =A0 =A0 =A0 =A0 case 0x25: > + =A0 =A0 =A0 =A0 =A0 case 0x2c: > + =A0 =A0 =A0 =A0 =A0 case 0x2f: > + =A0 =A0 =A0 =A0 =A0 =A0 /* Westmere. =A0*/ > + =A0 =A0 =A0 =A0 =A0 =A0 __cpu_type =3D PROCESSOR_COREI7_WESTMERE; > + =A0 =A0 =A0 =A0 =A0 =A0 __cpu_model.__cpu_is_corei7_westmere =3D 1; > + =A0 =A0 =A0 =A0 =A0 =A0 break; > + =A0 =A0 =A0 =A0 =A0 case 0x2a: > + =A0 =A0 =A0 =A0 =A0 =A0 /* Sandy Bridge. =A0*/ > + =A0 =A0 =A0 =A0 =A0 =A0 __cpu_type =3D PROCESSOR_COREI7_SANDYBRIDGE; > + =A0 =A0 =A0 =A0 =A0 =A0 __cpu_model.__cpu_is_corei7_sandybridge =3D 1; > + =A0 =A0 =A0 =A0 =A0 =A0 break; > + =A0 =A0 =A0 =A0 =A0 case 0x17: > + =A0 =A0 =A0 =A0 =A0 case 0x1d: > + =A0 =A0 =A0 =A0 =A0 =A0 /* Penryn. =A0*/ > + =A0 =A0 =A0 =A0 =A0 case 0x0f: > + =A0 =A0 =A0 =A0 =A0 =A0 /* Merom. =A0*/ > + =A0 =A0 =A0 =A0 =A0 =A0 __cpu_type =3D PROCESSOR_CORE2; > + =A0 =A0 =A0 =A0 =A0 =A0 break; > + =A0 =A0 =A0 =A0 =A0 default: > + =A0 =A0 =A0 =A0 =A0 =A0 __cpu_type =3D PROCESSOR_INTEL_GENERIC; > + =A0 =A0 =A0 =A0 =A0 =A0 break; > + =A0 =A0 =A0 =A0 =A0 } > + =A0 =A0 =A0 =A0 break; > + =A0 =A0 =A0 default: > + =A0 =A0 =A0 =A0 /* We have no idea. =A0*/ > + =A0 =A0 =A0 =A0 __cpu_type =3D PROCESSOR_INTEL_GENERIC; > + =A0 =A0 =A0 =A0 break; > + =A0 =A0 =A0 } > + =A0 =A0} > +} > + Please see config/i386/driver-i386.c for Intel CPU detection. I will try to make it up to date. For example, I added model 0x2d, 0x1c, 0x26, Thanks. --=20 H.J.