From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 13016 invoked by alias); 12 May 2016 17:54:40 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 13000 invoked by uid 89); 12 May 2016 17:54:39 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.3 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qg0-f52.google.com Received: from mail-qg0-f52.google.com (HELO mail-qg0-f52.google.com) (209.85.192.52) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Thu, 12 May 2016 17:54:29 +0000 Received: by mail-qg0-f52.google.com with SMTP id 90so45193498qgz.1 for ; Thu, 12 May 2016 10:54:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc; bh=23Qao8WhRYhFMlp+tvxResDESztJULzzXvxVTEWxbuY=; b=i3bDXvnUP71sJBm8BwTqengqr8mBz9+uHL7pYLgLVvn4mit5JpNtzlTBzbGXXMXF1h 0yeTIYQtTF60VTDkleNd92vsJYZTuB1P50CvHhfA9OYd4i5EA4EnzrkfGJxo8LCce/qn RIIrqDaPR01CLN03TQf/Tkm0I1e4VZekc8W3HOFXdT+vBTRPQBFqcE32a1yYcsrkekOk x7bS5CV0k5fcJqZcnTtPj8omiwQRsRgQXdaaSV/SYcqaR4FN5C+d2GQ8HxwvGgnFq9rL 8TK2Ctw6jlscrodPnbD+3R8Wum58Mgeu3YaV2WUXosamCR+KdI3qcWkaNTeG4HP6jnqx unYg== X-Gm-Message-State: AOPr4FURPlZSoCCpXU9mfHxsjNkVHMfLkQasNpRn7qXu+lE+D3syLi5maRn9BZBboIQHdlLIOEx3RMe0+5d1Pw== MIME-Version: 1.0 X-Received: by 10.140.22.203 with SMTP id 69mr10982064qgn.62.1463075667474; Thu, 12 May 2016 10:54:27 -0700 (PDT) Received: by 10.55.34.205 with HTTP; Thu, 12 May 2016 10:54:27 -0700 (PDT) In-Reply-To: <5734A53F.5030405@codesourcery.com> References: <5734A53F.5030405@codesourcery.com> Date: Thu, 12 May 2016 17:54:00 -0000 Message-ID: Subject: Re: PATCH: PR target/70738: Add -mgeneral-regs-only option From: "H.J. Lu" To: Sandra Loosemore Cc: "Koval, Julia" , "gcc-patches@gcc.gnu.org" , "Lu, Hongjiu" , "vaalfreja@gmail.com" , "ubizjak@gmail.com" , "law@redhat.com" , "Zamyatin, Igor" Content-Type: text/plain; charset=UTF-8 X-IsSubscribed: yes X-SW-Source: 2016-05/txt/msg00927.txt.bz2 On Thu, May 12, 2016 at 8:46 AM, Sandra Loosemore wrote: > On 05/11/2016 11:02 AM, H.J. Lu wrote: >> >> On Tue, May 10, 2016 at 1:02 PM, Sandra Loosemore >> wrote: >>> >>> >>> Again, this sounds like implementor-speak, and there are grammatical >>> errors >>> (noun/verb disagreement, missing articles). Do users of this attribute >>> need >>> to know what instructions the compiler is emitting? We already say above >>> that it causes GCC to generate suitable entry and exit sequences. >>> >> >> It was done on purpose since this document is also served as >> the spec for compiler implementers. > > > But readers of the user documentation are users, not compiler implementors, > so the patch for the manual needs to have a different focus. That is why I suggested to add a note for compiler implementers instead. >> Here is a patch to add >> -mgeneral-regs-only option to x86 backend. We can update >> spec for interrupt handle to recommend compiling interrupt handler >> with -mgeneral-regs-only option and add a note for compiler >> implementers. >> >> OK for trunk if there is no regression? > > > I can't comment on the code patch, but for the documentation part: > >> @@ -24242,6 +24242,12 @@ opcodes, to mitigate against certain forms of >> attack. At the moment, >> this option is limited in what it can do and should not be relied >> on to provide serious protection. >> >> +@item -mgeneral-regs-only >> +@opindex mgeneral-regs-only >> +Generate code which uses only the general-purpose registers. This will > > > s/which/that/ > >> +prevent the compiler from using floating-point, vector, mask and bound > > > s/will prevent/prevents/ > >> +registers, but will not impose any restrictions on the assembler. > > > Maybe you mean to say "does not restrict use of those registers in inline > assembly code"? In any case, please get rid of the future tense here, too. I changed it to --- @item -mgeneral-regs-only @opindex mgeneral-regs-only Generate code that uses only the general-purpose registers. This prevents the compiler from using floating-point, vector, mask and bound registers. --- Thanks. -- H.J.