[PATCH] Treat model == 0x4f as Broadwell

[PATCH] Treat model == 0x4f as Broadwell

[H.J. Lu]

From Intel SDM Vol 3:

Table 35-29 lists MSRs that are common to processors based on the
Broadwell microarchitectures (including CPUID signatures 06_3DH, 06_47H,
06_4FH, and 06_56H).

OK for trunk?

H.J.
---
	* config/i386/driver-i386.c (host_detect_local_cpu): Treat
	model == 0x4f as Broadwell.

diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index 1c6c221..bc5239e 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -749,6 +749,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
 	  cpu = "haswell";
 	  break;
 	case 0x3d:
+	case 0x47:
 	case 0x4f:
 	case 0x56:
 	  /* Broadwell.  */

Re: [PATCH] Treat model == 0x4f as Broadwell

[Uros Bizjak]

On Sat, Aug 8, 2015 at 12:57 AM, H.J. Lu <hongjiu.lu@intel.com> wrote:
> From Intel SDM Vol 3:
>
> Table 35-29 lists MSRs that are common to processors based on the
> Broadwell microarchitectures (including CPUID signatures 06_3DH, 06_47H,
> 06_4FH, and 06_56H).
>
> OK for trunk?

These kind of patches fall into trivial category. They don't need approval..

Uros.

Re: [PATCH] Treat model == 0x4f as Broadwell

[H.J. Lu]

On Sat, Aug 8, 2015 at 12:42 AM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Sat, Aug 8, 2015 at 12:57 AM, H.J. Lu <hongjiu.lu@intel.com> wrote:
>> From Intel SDM Vol 3:
>>
>> Table 35-29 lists MSRs that are common to processors based on the
>> Broadwell microarchitectures (including CPUID signatures 06_3DH, 06_47H,
>> 06_4FH, and 06_56H).
>>
>> OK for trunk?
>
> These kind of patches fall into trivial category. They don't need approval..
>
> Uros.

I also checked in this.

-- 
H.J.
---
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 146a730..34a5c1a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-08-10  H.J. Lu  <hongjiu.lu@intel.com>
+
+ * gcc.target/i386/builtin_target.c (check_intel_cpu_model):
+ Treat model == 0x4f as Broadwell.
+
 2015-08-10  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>

  PR libfortran/67140
diff --git a/gcc/testsuite/gcc.target/i386/builtin_target.c
b/gcc/testsuite/gcc.target/i386/builtin_target.c
index 10c0568..4adea27 100644
--- a/gcc/testsuite/gcc.target/i386/builtin_target.c
+++ b/gcc/testsuite/gcc.target/i386/builtin_target.c
@@ -74,6 +74,7 @@ check_intel_cpu_model (unsigned int family, unsigned
int model,
       assert (__builtin_cpu_is ("haswell"));
       break;
     case 0x3d:
+    case 0x47:
     case 0x4f:
     case 0x56:
       /* Broadwell.  */
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index 79df462..95a10f2 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,8 @@
+2015-08-10  H.J. Lu  <hongjiu.lu@intel.com>
+
+ * config/i386/cpuinfo.c (get_intel_cpu): Treat model == 0x4f as
+ Broadwell.
+
 2015-07-22  Uros Bizjak  <ubizjak@gmail.com>

  PR target/66954
diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c
index 01dbb59..57711d0 100644
--- a/libgcc/config/i386/cpuinfo.c
+++ b/libgcc/config/i386/cpuinfo.c
@@ -232,6 +232,7 @@ get_intel_cpu (unsigned int family, unsigned int
model, unsigned int brand_id)
       __cpu_model.__cpu_subtype = INTEL_COREI7_HASWELL;
       break;
     case 0x3d:
+    case 0x47:
     case 0x4f:
     case 0x56:
       /* Broadwell.  */