From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qt1-x830.google.com (mail-qt1-x830.google.com [IPv6:2607:f8b0:4864:20::830]) by sourceware.org (Postfix) with ESMTPS id 4F1723854171 for ; Fri, 21 Oct 2022 16:18:55 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 4F1723854171 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-qt1-x830.google.com with SMTP id g11so1959337qts.1 for ; Fri, 21 Oct 2022 09:18:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=ZHBBsu0LCyc+Q+cF+UrJcCPok0E6B1NjtARZBWHoMpw=; b=OFeaQPw0ev2RS/EwXmoN5A3jhG89iq5uhfwtJPLypy5q6ntndB0XILntpiqMtGqXoW w+iAtu9eSh21LRkk0Ut43lBLsXzA86lrlMt3XgxQQvuRyLq/xG/GFNq3Ar3Xb2Gp/uYL DxzvX8ok3SVFrzuxQOZZkbjatH8lhH9F7xR/Kn1RqLQh7Sx+RsChQPeDa3P0vJNkHtht SBElRjPzk6DcsOaDxRLJUrfw0qfPQ4YmWjZURQPoXmhvZe3xzNRO9mMus3Dy5m/inwhX twzlrxc53gepuES9/bTbEDj24koy0w2yLjITKo9OAMgGKmxYNvn1bzFrHe2kPF54sz9Y sfDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=ZHBBsu0LCyc+Q+cF+UrJcCPok0E6B1NjtARZBWHoMpw=; b=dW66WJoqjYHQFdgtNd9tt945C/7YpPe/964JBA7GcIj8Ax8YGTB2gzxumyxSTR+6Wj BkYDfPg8gCjAesh8ko1pWGXlUCZWXcWfWQgziR1qy11GLQ20LE2drRF+12kHvbPtTUrJ Dy/jle+ptQEQ0DMF40+zdsqxfW+7lavq7JZkCJjpitrt8L4IyhDaYaNSzJFYrNDVZaBH covforCZ9kuGuls4hxZtUIz50Ic5inffEZLwb7AnIbVtI1zxDcMF5PY8satE9/XUIdwv hIiwkXNgl5ExlVMxZsRh7OzKwB93E8M39KkewRrioTIN4Vul+2E6gHcEsFgA0AsJoM+I rNlw== X-Gm-Message-State: ACrzQf3aM6hRiU1LwJN+3WitzNsmjNNrr4uUIhYqE6MylOeiXOmcXSHp H0pc79CSocUpu05o5XIhhbyU2xIoaadPW0CMYpw= X-Google-Smtp-Source: AMsMyM6F5oNesoVSBAS26VtU0pRC7AehFMD1bNcYOHze8UvUNlGhnnCLWBslJDA8eDJ2Oxs62Kkf+k/29lRPfz70MP0= X-Received: by 2002:ac8:4e53:0:b0:39c:eec4:373f with SMTP id e19-20020ac84e53000000b0039ceec4373fmr16250516qtw.617.1666369133870; Fri, 21 Oct 2022 09:18:53 -0700 (PDT) MIME-Version: 1.0 References: <20221020165734.1113688-1-hjl.tools@gmail.com> In-Reply-To: From: "H.J. Lu" Date: Fri, 21 Oct 2022 09:18:17 -0700 Message-ID: Subject: Re: [PATCH] Always use TYPE_MODE instead of DECL_MODE for vector field To: Richard Biener , Jakub Jelinek Cc: gcc-patches@gcc.gnu.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3024.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Fri, Oct 21, 2022 at 2:33 AM Richard Biener wrote: > > On Thu, Oct 20, 2022 at 6:58 PM H.J. Lu via Gcc-patches > wrote: > > > > commit e034c5c895722e0092d2239cd8c2991db77d6d39 > > Author: Jakub Jelinek > > Date: Sat Dec 2 08:54:47 2017 +0100 > > > > PR target/78643 > > PR target/80583 > > * expr.c (get_inner_reference): If DECL_MODE of a non-bitfield > > is BLKmode for vector field with vector raw mode, use TYPE_MODE > > instead of DECL_MODE. > > > > fixed the case where DECL_MODE of a vector field is BLKmode and its > > TYPE_MODE is a vector mode because of target attribute. Remove the > > BLKmode check for the case where DECL_MODE of a vector field is a vector > > mode and its TYPE_MODE is BLKmode because of target attribute. > > > > gcc/ > > > > PR target/107304 > > * expr.c (get_inner_reference): Always use TYPE_MODE for vector > > field with vector raw mode. > > > > gcc/testsuite/ > > > > PR target/107304 > > * gcc.target/i386/pr107304.c: New test. > > --- > > gcc/expr.cc | 3 +- > > gcc/testsuite/gcc.target/i386/pr107304.c | 39 ++++++++++++++++++++++++ > > 2 files changed, 40 insertions(+), 2 deletions(-) > > create mode 100644 gcc/testsuite/gcc.target/i386/pr107304.c > > > > diff --git a/gcc/expr.cc b/gcc/expr.cc > > index efe387e6173..9145193c2c1 100644 > > --- a/gcc/expr.cc > > +++ b/gcc/expr.cc > > @@ -7905,8 +7905,7 @@ get_inner_reference (tree exp, poly_int64_pod *pbitsize, > > /* For vector fields re-check the target flags, as DECL_MODE > > could have been set with different target flags than > > the current function has. */ > > - if (mode == BLKmode > > - && VECTOR_TYPE_P (TREE_TYPE (field)) > > + if (VECTOR_TYPE_P (TREE_TYPE (field)) > > && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field)))) > > Isn't the check on TYPE_MODE_RAW also wrong then? Btw, the mode could TYPE_MODE_RAW is always set to a vector mode for a vector type: /* Find an appropriate mode for the vector type. */ if (TYPE_MODE (type) == VOIDmode) SET_TYPE_MODE (type, mode_for_vector (SCALAR_TYPE_MODE (innertype), nunits).else_blk ()); But TYPE_MODE returns BLKmode if the vector mode is unsupported. > also be an integer mode. For a vector field, mode is either BLK mode or the vector mode. Jakub, can you comment on it? > > > mode = TYPE_MODE (TREE_TYPE (field)); > > } > > diff --git a/gcc/testsuite/gcc.target/i386/pr107304.c b/gcc/testsuite/gcc.target/i386/pr107304.c > > new file mode 100644 > > index 00000000000..24d68795e7f > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/i386/pr107304.c > > @@ -0,0 +1,39 @@ > > +/* { dg-do compile } */ > > +/* { dg-options "-O0 -march=tigerlake" } */ > > + > > +#include > > + > > +typedef union { > > + uint8_t v __attribute__((aligned(256))) __attribute__ ((vector_size(64 * sizeof(uint8_t)))); > > + uint8_t i[64] __attribute__((aligned(256))); > > +} stress_vec_u8_64_t; > > + > > +typedef struct { > > + struct { > > + stress_vec_u8_64_t s; > > + stress_vec_u8_64_t o; > > + stress_vec_u8_64_t mask1; > > + stress_vec_u8_64_t mask2; > > + } u8_64; > > +} stress_vec_data_t; > > + > > +__attribute__((target_clones("arch=alderlake", "default"))) > > +void > > +stress_vecshuf_u8_64(stress_vec_data_t *data) > > +{ > > + stress_vec_u8_64_t *__restrict s; > > + stress_vec_u8_64_t *__restrict mask1; > > + stress_vec_u8_64_t *__restrict mask2; > > + register int i; > > + > > + s = &data->u8_64.s; > > + mask1 = &data->u8_64.mask1; > > + mask2 = &data->u8_64.mask2; > > + > > + for (i = 0; i < 256; i++) { /* was i < 65536 */ > > + stress_vec_u8_64_t tmp; > > + > > + tmp.v = __builtin_shuffle(s->v, mask1->v); > > + s->v = __builtin_shuffle(tmp.v, mask2->v); > > + } > > +} > > -- > > 2.37.3 > > -- H.J.