From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by sourceware.org (Postfix) with ESMTPS id 5C71D385B537 for ; Thu, 20 Jul 2023 15:04:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5C71D385B537 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pf1-x42a.google.com with SMTP id d2e1a72fcca58-666ecb21f86so764560b3a.3 for ; Thu, 20 Jul 2023 08:04:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1689865473; x=1690470273; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=JmODs7ddb/Dd6utvzDGv55yRJpeWQaz4q++AYTXw+gY=; b=r6nOzC0GGT/Jmj+c5x2jeAhZRmMaUYdItKfXM0fH0YzKEWJcHAxXp0ixXei4FwxQyT 9XrDIqaX9xOi/CbLD0p8WZWonmXJXm1o6NkeEKDAqJ4ZNaGQiR8ny8wFmGEYSR4xgOV+ HIbfppmVudzVLbFL61wo5iy68T8ygPfmrGLSLCEsHVpDTb77BAWEDv7nr689YELzJrv6 PkGPGhoSPv7a/zvHpU3shBQBYpW+9DND9BpdHyUR60ISJfmzIL4+J8ss0dUYOZSiz8Kh ZWVRImzAMWJVf0ws7WB0gPC/69gyY3R2ZWQt5ojZGQ4URJSYByt6iUhNXPlnvdtkuv8G WaRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689865473; x=1690470273; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JmODs7ddb/Dd6utvzDGv55yRJpeWQaz4q++AYTXw+gY=; b=Hv+eutspSJ4hHsrwcWOhtoq0MD7wcFwFrpI6kUGI5349KHN4I+q6lA6Ajs+Wc7sFhk oZonbbEC+aC7Q5w0vcsopvAdxtPDwOgyvmuW0KteqruMUas8+/xaB6K3EzVF7AAZHWZI IcarvqNSEUTOUnDJ26bLAM5wDSZ1HeXwyb3uRi4gQbx+8l9W/o+IWHTIt3qWnVE3VZJ3 II0MxLzsgpSXeSQSsJMg8+znXdY0mJp7SF0Hzqlzj7/UuZ/fcGRVQQpLs7QhPlj1584i nm85UpCvPfeJSgy81gcLJN0lnALxkAvmkEO4QBLK5kcQugzs/kN1UOCFmO4PXoSygOee RCBQ== X-Gm-Message-State: ABy/qLYDdYP/LEEtFyVWGwa0w/AXZ0JQYu6uumBRl23r9tuRjVNx0KbE I3eyLc7Kb7+cND1rjmRLmdQaD64gQ4eIi6YrasI= X-Google-Smtp-Source: APBJJlFAdzh2tQXFj6ADaN5xw+3ECcE5rYDBDSB330y4b4+rkX3B0BxGtZdNkTaWax7o07By8BHTOZ/lccH+AETh7PU= X-Received: by 2002:a05:6a20:734d:b0:132:c2eb:8729 with SMTP id v13-20020a056a20734d00b00132c2eb8729mr3150449pzc.2.1689865472993; Thu, 20 Jul 2023 08:04:32 -0700 (PDT) MIME-Version: 1.0 References: <485a6a6c62a8632d9e3ac44b2d8fd935c0e0a78b.camel@espressif.com> In-Reply-To: From: Max Filippov Date: Thu, 20 Jul 2023 08:04:21 -0700 Message-ID: Subject: Re: [PATCH 2/3] gcc: xtensa: use dynconfig settings as builtin-macros To: Alexey Lapshin Cc: "gcc-patches@gcc.gnu.org" , Alexey Gerenkov , Ivan Grokhotkov Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,FROM_LOCAL_NOVOWEL,GIT_PATCH_0,HK_RANDOM_ENVFROM,HK_RANDOM_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE,UPPERCASE_75_100 autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Thu, Jul 20, 2023 at 7:37=E2=80=AFAM Alexey Lapshin wrote: > > gcc/ > * config/xtensa/xtensa.h (XCHAL_HAVE_BE, XCHAL_HAVE_DENSITY, > XCHAL_HAVE_CONST16, XCHAL_HAVE_ABS, XCHAL_HAVE_ADDX, > XCHAL_HAVE_L32R, XSHAL_USE_ABSOLUTE_LITERALS, > XSHAL_HAVE_TEXT_SECTION_LITERALS, XCHAL_HAVE_MAC16, > XCHAL_HAVE_MUL16, XCHAL_HAVE_MUL32, XCHAL_HAVE_MUL32_HIGH, > XCHAL_HAVE_DIV32, XCHAL_HAVE_NSA, XCHAL_HAVE_MINMAX, > XCHAL_HAVE_SEXT, XCHAL_HAVE_LOOPS, XCHAL_HAVE_THREADPTR, > XCHAL_HAVE_RELEASE_SYNC, XCHAL_HAVE_S32C1I, > XCHAL_HAVE_BOOLEANS, XCHAL_HAVE_FP, XCHAL_HAVE_FP_DIV, > XCHAL_HAVE_FP_RECIP, XCHAL_HAVE_FP_SQRT, > XCHAL_HAVE_FP_RSQRT, XCHAL_HAVE_FP_POSTINC, XCHAL_HAVE_DFP, > XCHAL_HAVE_DFP_DIV, XCHAL_HAVE_DFP_RECIP, > XCHAL_HAVE_DFP_SQRT, XCHAL_HAVE_DFP_RSQRT, > XCHAL_HAVE_WINDOWED, XCHAL_NUM_AREGS, > XCHAL_HAVE_WIDE_BRANCHES, XCHAL_HAVE_PREDICTED_BRANCHES, > XCHAL_ICACHE_SIZE, XCHAL_DCACHE_SIZE, > XCHAL_ICACHE_LINESIZE, XCHAL_DCACHE_LINESIZE, > XCHAL_ICACHE_LINEWIDTH, XCHAL_DCACHE_LINEWIDTH, > XCHAL_DCACHE_IS_WRITEBACK, XCHAL_HAVE_MMU, > XCHAL_MMU_MIN_PTE_PAGE_SIZE, XCHAL_HAVE_DEBUG, > XCHAL_NUM_IBREAK, XCHAL_NUM_DBREAK, XCHAL_DEBUGLEVEL, > XCHAL_MAX_INSTRUCTION_SIZE, XCHAL_INST_FETCH_WIDTH, > XSHAL_ABI, XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0, > XCHAL_M_STAGE, XTENSA_MARCH_LATEST, XTENSA_MARCH_EARLIEST, > XCHAL_HAVE_CLAMPS, XCHAL_HAVE_DEPBITS, > XCHAL_HAVE_EXCLUSIVE, XCHAL_HAVE_XEA3): Add builtin-macros > with values from dynconfig. > --- > gcc/config/xtensa/xtensa.h | 62 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 62 insertions(+) > > diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h > index 8ebf37cab33..a65b674915b 100644 > --- a/gcc/config/xtensa/xtensa.h > +++ b/gcc/config/xtensa/xtensa.h > @@ -67,6 +67,7 @@ along with GCC; see the file COPYING3. If not see > #endif > > > +#define XTENSA_CPU_CPP_BUILTIN(OPT) builtin_define_with_int_value (#OPT,= OPT) > /* Target CPU builtins. */ > #define TARGET_CPU_CPP_BUILTINS() \ > do { \ > @@ -82,6 +83,67 @@ along with GCC; see the file COPYING3. If not see > builtin_define ("__XTENSA_SOFT_FLOAT__"); = \ > for (builtin =3D xtensa_get_config_strings (); *builtin; ++builtin) = \ > builtin_define (*builtin); \ The loop above already does the same thing, doesn't it? > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_BE); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_DENSITY); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_CONST16); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_ABS); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_ADDX); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_L32R); = \ > + XTENSA_CPU_CPP_BUILTIN(XSHAL_USE_ABSOLUTE_LITERALS); \ > + XTENSA_CPU_CPP_BUILTIN(XSHAL_HAVE_TEXT_SECTION_LITERALS); \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_MAC16); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_MUL16); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_MUL32); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_MUL32_HIGH); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_DIV32); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_NSA); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_MINMAX); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_SEXT); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_LOOPS); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_THREADPTR); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_RELEASE_SYNC); \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_S32C1I); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_BOOLEANS); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_FP); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_FP_DIV); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_FP_RECIP); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_FP_SQRT); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_FP_RSQRT); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_FP_POSTINC); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_DFP); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_DFP_DIV); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_DFP_RECIP); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_DFP_SQRT); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_DFP_RSQRT); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_WINDOWED); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_NUM_AREGS); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_WIDE_BRANCHES); \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_PREDICTED_BRANCHES); \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_ICACHE_SIZE); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_DCACHE_SIZE); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_ICACHE_LINESIZE); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_DCACHE_LINESIZE); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_ICACHE_LINEWIDTH); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_DCACHE_LINEWIDTH); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_DCACHE_IS_WRITEBACK); \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_MMU); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_MMU_MIN_PTE_PAGE_SIZE); \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_DEBUG); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_NUM_IBREAK); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_NUM_DBREAK); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_DEBUGLEVEL); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_MAX_INSTRUCTION_SIZE); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_INST_FETCH_WIDTH); = \ > + XTENSA_CPU_CPP_BUILTIN(XSHAL_ABI); = \ > + XTENSA_CPU_CPP_BUILTIN(XTHAL_ABI_WINDOWED); = \ > + XTENSA_CPU_CPP_BUILTIN(XTHAL_ABI_CALL0); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_M_STAGE); = \ > + XTENSA_CPU_CPP_BUILTIN(XTENSA_MARCH_LATEST); = \ > + XTENSA_CPU_CPP_BUILTIN(XTENSA_MARCH_EARLIEST); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_CLAMPS); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_DEPBITS); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_EXCLUSIVE); = \ > + XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_XEA3); = \ > } while (0) > > #define CPP_SPEC " %(subtarget_cpp_spec) " > -- > 2.34.1 > --=20 Thanks. -- Max