From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oi1-x235.google.com (mail-oi1-x235.google.com [IPv6:2607:f8b0:4864:20::235]) by sourceware.org (Postfix) with ESMTPS id 6742A3858D20 for ; Wed, 31 May 2023 09:51:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 6742A3858D20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-oi1-x235.google.com with SMTP id 5614622812f47-38dec65ab50so3695159b6e.2 for ; Wed, 31 May 2023 02:51:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1685526695; x=1688118695; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=4UVS2MIWIPOWHW8jc0dZbldoo05rO2/uQrNJGZkbKNw=; b=eZhaeKODi9UrHM2ogXqMjm/4m3Z8dBmnYR1ftStV/2z7HdgY6k8sViJiDn7tx6MOAQ WJtk6KEDsDpv0pLJSjSl1ScEt6gXZjc+6MHp+ulfhQFN1Tw0iuVSi46I0B/+c+4p2zsv uG1+7uG/MejBzbLNpeK4of4TUl9l47TKzCxHjqc+UV25EV8R8bEkpwfOjb3D/Yk/xmJp xaibR1A9EOAosEj1M7KoGenZYQhwkfCOYjexd+XRdEKFPfRErMtog2FI2EBYUk5fO9Qu PAJinDoehaGKvwO3L/BifYWSdKKKY3N+m+FXaQ6per4NhATcHXj358wsmTxhzVSlivbx Cv0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685526695; x=1688118695; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4UVS2MIWIPOWHW8jc0dZbldoo05rO2/uQrNJGZkbKNw=; b=Z6/kGun3knW10+7cIWMGsKDSPcB1xfNV6au8l+QvnGc+6X+JdM9AJ5KGA/QsWov2r7 j0UIhvDWx7k+cugzEJFjNRxHhYCUu3gk43RY31x7ALsNjW378aJgkqSOzC7gOSEKFWAF sF76SnQaWsq+taQZiY9o/4P+cDK4Ue6iXrm448ruPPAArUGfzh0PJ1t9gnDnBWtBGrN3 kwHU2dcx8OV7+R+iFITQLnuh6x7BSq+C2VPZ4OO6x69WryIdSRgQOCZXw0a2ND5NCzEY ZcNrGcnmsCZ3/PwvKdCpZMmBqSKJIqQHARUakudOQrpZcfKD+LaLFFv7cRKHC5vl/bPL w1fA== X-Gm-Message-State: AC+VfDxY0TptjjG7tr4FhAQNwes2JTodmnuPumMHVvcB/FXJA6cUdEF0 GZ4mZdYqz+4qnReIuEgNhYWTffqmhZOP7Gp/82d1dRrstPA= X-Google-Smtp-Source: ACHHUZ6e+gLmq9P7smTa0im279YNWvzbiOvj+4AdvYGCXrTNUXSZfJYV7XJ3pdK9Jo2esKh4MRfNjh3LEKTdH5UwcJQ= X-Received: by 2002:a05:6358:7208:b0:121:4a0d:4589 with SMTP id h8-20020a056358720800b001214a0d4589mr1895065rwa.0.1685526695559; Wed, 31 May 2023 02:51:35 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Max Filippov Date: Wed, 31 May 2023 02:51:24 -0700 Message-ID: Subject: Re: [PATCH 1/3] xtensa: Improve "*shlrd_reg" insn pattern and its variant To: "Takayuki 'January June' Suwa" Cc: GCC Patches Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,FROM_LOCAL_NOVOWEL,HK_RANDOM_ENVFROM,HK_RANDOM_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Tue, May 30, 2023 at 2:27=E2=80=AFAM Takayuki 'January June' Suwa wrote: > > The insn "*shlrd_reg" shifts two registers with a funnel shifter by the > third register to get a single word result: > > reg0 =3D (reg1 SHIFT_OP0 reg3) BIT_JOIN_OP (reg2 SHIFT_OP1 (32 - reg3)) > > where the funnel left shift is SHIFT_OP0 :=3D ASHIFT, SHIFT_OP1 :=3D LSHI= FTRT > and its right shift is SHIFT_OP0 :=3D LSHIFTRT, SHIFT_OP1 :=3D ASHIFT, > respectively. And also, BIT_JOIN_OP can be either PLUS or IOR in either > shift direction. > > [(set (match_operand:SI 0 "register_operand" "=3Da") > (match_operator:SI 6 "xtensa_bit_join_operator" > [(match_operator:SI 4 "logical_shift_operator" > [(match_operand:SI 1 "register_operand" "r") > (match_operand:SI 3 "register_operand" "r")]) > (match_operator:SI 5 "logical_shift_operator" > [(match_operand:SI 2 "register_operand" "r") > (neg:SI (match_dup 3))])]))] > > Although the RTL matching template can express it as above, there is no > way of direcing that the operator (operands[6]) that combines the two > individual shifts is commutative. > Thus, if multiple insn sequences matching the above pattern appear > adjacently, the combiner may accidentally mix them up and get partial > results. > > This patch adds a new insn-and-split pattern with the two sides swapped > representation of the bit-combining operation that was lacking and > described above. > > And also changes the other "*shlrd" variants from previously describing > the arbitraryness of bit-combining operations with code iterators to a > combination of the match_operator and the predicate above. > > gcc/ChangeLog: > > * config/xtensa/predicates.md (xtensa_bit_join_operator): > New predicate. > * config/xtensa/xtensa.md (ior_op): Remove. > (*shlrd_reg): Rename from "*shlrd_reg_", and add the > insn_and_split pattern of the same name to express and capture > the bit-combining operation with both sides swapped. > In addition, replace use of code iterator with new operator > predicate. > (*shlrd_const, *shlrd_per_byte): > Likewise regarding the code iterator. > --- > gcc/config/xtensa/predicates.md | 3 ++ > gcc/config/xtensa/xtensa.md | 81 ++++++++++++++++++++++----------- > 2 files changed, 58 insertions(+), 26 deletions(-) Regtested for target=3Dxtensa-linux-uclibc, no new regressions. I can also confirm that the pattern is now used as expected in the case where I previously had an issue. Thanks for fixing that! Committed to master. --=20 Thanks. -- Max