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* [PATCH 2/2] xtensa: Optimize "bitwise AND with imm1" followed by "branch if (not) equal to imm2"
@ 2022-07-15 10:51 Takayuki 'January June' Suwa
  2022-07-16  7:29 ` Max Filippov
  0 siblings, 1 reply; 2+ messages in thread
From: Takayuki 'January June' Suwa @ 2022-07-15 10:51 UTC (permalink / raw)
  To: GCC Patches

This patch enhances the effectiveness of the previously posted one:
"xtensa: Optimize bitwise AND operation with some specific forms of constants".

    /* example */
    extern void foo(int);
    void test(int a) {
      if ((a & (-1U << 8)) == (128 << 8))  /* 0 or one of "b4const" */
        foo(a);
    }

    ;; before
	.global	test
    test:
	movi	a3, -0x100
	movi.n	a4, 1
	and	a3, a2, a3
	slli	a4, a4, 15
	bne	a3, a4, .L3
	j.l	foo, a9
    .L1:
	ret.n

    ;; after
	.global test
    test:
	srli	a3, a2, 8
	bnei	a3, 128, .L1
	j.l	foo, a9
    .L1:
	ret.n

gcc/ChangeLog:

	* config/xtensa/xtensa.md
	(*masktrue_const_pow2_minus_one, *masktrue_const_negative_pow2,
	*masktrue_const_shifted_mask): If the immediate for bitwise AND is
	represented as '-(1 << N)', decrease the lower bound of N from 12
	to 1.  And the other immediate for conditional branch is now no
	longer limited to zero, but also one of some positive integers.
	Finally, remove the checks of some conditions, because the comparison
	expressions that don't satisfy such checks are determined as
	compile-time constants and thus will be optimized away before
	RTL expansion.
---
 gcc/config/xtensa/xtensa.md | 73 ++++++++++++++++++++++---------------
 1 file changed, 44 insertions(+), 29 deletions(-)

diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 6a58d3e2776..c02f1a56641 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -1716,63 +1716,78 @@
 
 (define_insn_and_split "*masktrue_const_pow2_minus_one"
   [(set (pc)
-	(if_then_else (match_operator 3 "boolean_operator"
+	(if_then_else (match_operator 4 "boolean_operator"
 			[(and:SI (match_operand:SI 0 "register_operand" "r")
 				 (match_operand:SI 1 "const_int_operand" "i"))
-			 (const_int 0)])
-		      (label_ref (match_operand 2 "" ""))
+			 (match_operand:SI 2 "const_int_operand" "i")])
+		      (label_ref (match_operand 3 "" ""))
 		      (pc)))]
-  "IN_RANGE (exact_log2 (INTVAL (operands[1]) + 1), 17, 31)"
+  "IN_RANGE (exact_log2 (INTVAL (operands[1]) + 1), 17, 31)
+   /* && (~INTVAL (operands[1]) & INTVAL (operands[2])) == 0  // can be omitted */
+   && xtensa_b4const_or_zero (INTVAL (operands[2]) << (32 - floor_log2 (INTVAL (operands[1]) + 1)))"
   "#"
   "&& can_create_pseudo_p ()"
-  [(set (match_dup 4)
+  [(set (match_dup 5)
 	(ashift:SI (match_dup 0)
 		   (match_dup 1)))
    (set (pc)
-	(if_then_else (match_op_dup 3
-			[(match_dup 4)
-			 (const_int 0)])
-		      (label_ref (match_dup 2))
+	(if_then_else (match_op_dup 4
+			[(match_dup 5)
+			 (match_dup 2)])
+		      (label_ref (match_dup 3))
 		      (pc)))]
 {
-  operands[1] = GEN_INT (32 - floor_log2 (INTVAL (operands[1]) + 1));
-  operands[4] = gen_reg_rtx (SImode);
+  int shift = 32 - floor_log2 (INTVAL (operands[1]) + 1);
+  operands[1] = GEN_INT (shift);
+  operands[2] = GEN_INT (INTVAL (operands[2]) << shift);
+  operands[5] = gen_reg_rtx (SImode);
 }
   [(set_attr "type"	"jump")
    (set_attr "mode"	"none")
    (set (attr "length")
-	(if_then_else (match_test "TARGET_DENSITY
-				   && INTVAL (operands[1]) == 0x7FFFFFFF")
-		      (const_int 5)
-		      (const_int 6)))])
+	(if_then_else (match_test "(TARGET_DENSITY && INTVAL (operands[1]) == 0x7FFFFFFF)
+				   && INTVAL (operands[2]) == 0")
+		      (const_int 4)
+		      (if_then_else (match_test "TARGET_DENSITY
+						 && (INTVAL (operands[1]) == 0x7FFFFFFF
+						     || INTVAL (operands[2]) == 0)")
+				    (const_int 5)
+				    (const_int 6))))])
 
 (define_insn_and_split "*masktrue_const_negative_pow2"
   [(set (pc)
-	(if_then_else (match_operator 3 "boolean_operator"
+	(if_then_else (match_operator 4 "boolean_operator"
 			[(and:SI (match_operand:SI 0 "register_operand" "r")
 				 (match_operand:SI 1 "const_int_operand" "i"))
-			 (const_int 0)])
-		      (label_ref (match_operand 2 "" ""))
+			 (match_operand:SI 2 "const_int_operand" "i")])
+		      (label_ref (match_operand 3 "" ""))
 		      (pc)))]
-  "IN_RANGE (exact_log2 (-INTVAL (operands[1])), 12, 30)"
+  "IN_RANGE (exact_log2 (-INTVAL (operands[1])), 1, 30)
+   /* && (~INTVAL (operands[1]) & INTVAL (operands[2])) == 0  // can be omitted */
+   && xtensa_b4const_or_zero (INTVAL (operands[2]) >> floor_log2 (-INTVAL (operands[1])))"
   "#"
   "&& can_create_pseudo_p ()"
-  [(set (match_dup 4)
+  [(set (match_dup 5)
 	(lshiftrt:SI (match_dup 0)
 		     (match_dup 1)))
    (set (pc)
-	(if_then_else (match_op_dup 3
-			[(match_dup 4)
-			 (const_int 0)])
-		      (label_ref (match_dup 2))
+	(if_then_else (match_op_dup 4
+			[(match_dup 5)
+			 (match_dup 2)])
+		      (label_ref (match_dup 3))
 		      (pc)))]
 {
-  operands[1] = GEN_INT (floor_log2 (-INTVAL (operands[1])));
-  operands[4] = gen_reg_rtx (SImode);
+  int shift = floor_log2 (-INTVAL (operands[1]));
+  operands[1] = GEN_INT (shift);
+  operands[2] = GEN_INT (INTVAL (operands[2]) >> shift);
+  operands[5] = gen_reg_rtx (SImode);
 }
   [(set_attr "type"	"jump")
    (set_attr "mode"	"none")
-   (set_attr "length"	"6")])
+   (set (attr "length")
+	(if_then_else (match_test "TARGET_DENSITY && INTVAL (operands[2]) == 0")
+		      (const_int 5)
+		      (const_int 6)))])
 
 (define_insn_and_split "*masktrue_const_shifted_mask"
   [(set (pc)
@@ -1782,8 +1797,8 @@
 			 (match_operand:SI 2 "const_int_operand" "i")])
 		      (label_ref (match_operand 3 "" ""))
 		      (pc)))]
-  "(INTVAL (operands[2]) & ((1 << ctz_hwi (INTVAL (operands[1]))) - 1)) == 0
-   && xtensa_b4const_or_zero ((uint32_t)INTVAL (operands[2]) >> ctz_hwi (INTVAL (operands[1])))"
+  "/* (INTVAL (operands[2]) & ((1 << ctz_hwi (INTVAL (operands[1]))) - 1)) == 0  // can be omitted
+   && */ xtensa_b4const_or_zero ((uint32_t)INTVAL (operands[2]) >> ctz_hwi (INTVAL (operands[1])))"
   "#"
   "&& can_create_pseudo_p ()"
   [(set (match_dup 6)
-- 
2.20.1

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH 2/2] xtensa: Optimize "bitwise AND with imm1" followed by "branch if (not) equal to imm2"
  2022-07-15 10:51 [PATCH 2/2] xtensa: Optimize "bitwise AND with imm1" followed by "branch if (not) equal to imm2" Takayuki 'January June' Suwa
@ 2022-07-16  7:29 ` Max Filippov
  0 siblings, 0 replies; 2+ messages in thread
From: Max Filippov @ 2022-07-16  7:29 UTC (permalink / raw)
  To: Takayuki 'January June' Suwa; +Cc: GCC Patches

On Fri, Jul 15, 2022 at 4:17 PM Takayuki 'January June' Suwa
<jjsuwa_sys3175@yahoo.co.jp> wrote:
>
> This patch enhances the effectiveness of the previously posted one:
> "xtensa: Optimize bitwise AND operation with some specific forms of constants".
>
>     /* example */
>     extern void foo(int);
>     void test(int a) {
>       if ((a & (-1U << 8)) == (128 << 8))  /* 0 or one of "b4const" */
>         foo(a);
>     }
>
>     ;; before
>         .global test
>     test:
>         movi    a3, -0x100
>         movi.n  a4, 1
>         and     a3, a2, a3
>         slli    a4, a4, 15
>         bne     a3, a4, .L3
>         j.l     foo, a9
>     .L1:
>         ret.n
>
>     ;; after
>         .global test
>     test:
>         srli    a3, a2, 8
>         bnei    a3, 128, .L1
>         j.l     foo, a9
>     .L1:
>         ret.n
>
> gcc/ChangeLog:
>
>         * config/xtensa/xtensa.md
>         (*masktrue_const_pow2_minus_one, *masktrue_const_negative_pow2,
>         *masktrue_const_shifted_mask): If the immediate for bitwise AND is
>         represented as '-(1 << N)', decrease the lower bound of N from 12
>         to 1.  And the other immediate for conditional branch is now no
>         longer limited to zero, but also one of some positive integers.
>         Finally, remove the checks of some conditions, because the comparison
>         expressions that don't satisfy such checks are determined as
>         compile-time constants and thus will be optimized away before
>         RTL expansion.
> ---
>  gcc/config/xtensa/xtensa.md | 73 ++++++++++++++++++++++---------------
>  1 file changed, 44 insertions(+), 29 deletions(-)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.

-- 
Thanks.
-- Max

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2022-07-15 10:51 [PATCH 2/2] xtensa: Optimize "bitwise AND with imm1" followed by "branch if (not) equal to imm2" Takayuki 'January June' Suwa
2022-07-16  7:29 ` Max Filippov

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