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From: "Hurugalawadi, Naveen" <Naveen.Hurugalawadi@cavium.com>
To: Jeff Law <law@redhat.com>,
	Wilco Dijkstra <Wilco.Dijkstra@arm.com>,
	"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: "Pinski, Andrew" <Andrew.Pinski@cavium.com>,
	"roland.illig@gmx.de"	<roland.illig@gmx.de>,
	"joseph@codesourcery.com" <joseph@codesourcery.com>,
	"dmalcolm@redhat.com" <dmalcolm@redhat.com>, nd <nd@arm.com>,
	James Greenhalgh <james.greenhalgh@arm.com>,
	Marcus Shawcroft	<marcus.shawcroft@arm.com>,
	Richard Earnshaw <Richard.Earnshaw@arm.com>,
	"ramana.radhakrishnan@foss.arm.com"
	<ramana.radhakrishnan@foss.arm.com>
Subject: Re: [PING][PATCH] Move the check for any_condjump_p from sched-deps to target macros
Date: Thu, 11 May 2017 04:47:00 -0000	[thread overview]
Message-ID: <CO2PR07MB26944854CD014827C4E806DB83ED0@CO2PR07MB2694.namprd07.prod.outlook.com> (raw)
In-Reply-To: <675f27f3-2ea4-2c0b-84f2-c92c1289fbaf@redhat.com>

[-- Attachment #1: Type: text/plain, Size: 483 bytes --]

Hi,

>> Doesn't this avoid calling the target hook in cases where it used to 
>> call it before?

Yes. Thanks for pointing it out.

>> Consider a conditional jump inside a parallel that is not a single set.

Please find attached the modified patch that handles the case mentioned.
Please review the patch and let us know if its okay?

Bootstrapped and Regression tested on AArch64 and X86_64.
Please review the patch and let us know if its okay?

Thanks,
Naveen
    

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: fusion-anycond-jump-4.patch --]
[-- Type: text/x-patch; name="fusion-anycond-jump-4.patch", Size: 3453 bytes --]

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 2e385c4..b38b8b7 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -13973,13 +13973,23 @@ aarch_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
     {
       enum attr_type prev_type = get_attr_type (prev);
 
-      /* FIXME: this misses some which is considered simple arthematic
-         instructions for ThunderX.  Simple shifts are missed here.  */
-      if (prev_type == TYPE_ALUS_SREG
-          || prev_type == TYPE_ALUS_IMM
-          || prev_type == TYPE_LOGICS_REG
-          || prev_type == TYPE_LOGICS_IMM)
-        return true;
+      unsigned int condreg1, condreg2;
+      rtx cc_reg_1;
+      aarch64_fixed_condition_code_regs (&condreg1, &condreg2);
+      cc_reg_1 = gen_rtx_REG (CCmode, condreg1);
+
+      if (reg_referenced_p (cc_reg_1, PATTERN (curr))
+	  && prev
+	  && modified_in_p (cc_reg_1, prev))
+	{
+	  /* FIXME: this misses some which is considered simple arthematic
+	     instructions for ThunderX.  Simple shifts are missed here.  */
+	  if (prev_type == TYPE_ALUS_SREG
+	      || prev_type == TYPE_ALUS_IMM
+	      || prev_type == TYPE_LOGICS_REG
+	      || prev_type == TYPE_LOGICS_IMM)
+	    return true;
+	}
     }
 
   return false;
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 0b2fa1b..af14c90 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -29483,6 +29483,15 @@ ix86_macro_fusion_pair_p (rtx_insn *condgen, rtx_insn *condjmp)
   if (!any_condjump_p (condjmp))
     return false;
 
+  unsigned int condreg1, condreg2;
+  rtx cc_reg_1;
+  ix86_fixed_condition_code_regs (&condreg1, &condreg2);
+  cc_reg_1 = gen_rtx_REG (CCmode, condreg1);
+  if (!reg_referenced_p (cc_reg_1, PATTERN (condjmp))
+      || !condgen
+      || !modified_in_p (cc_reg_1, condgen))
+    return false;
+
   if (get_attr_type (condgen) != TYPE_TEST
       && get_attr_type (condgen) != TYPE_ICMP
       && get_attr_type (condgen) != TYPE_INCDEC
diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index b2393bf..4c459e6 100644
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -2834,34 +2834,30 @@ static void
 sched_macro_fuse_insns (rtx_insn *insn)
 {
   rtx_insn *prev;
-
+  prev = prev_nonnote_nondebug_insn (insn);
+  if (!prev)
+    return;
+ 
   if (any_condjump_p (insn))
     {
       unsigned int condreg1, condreg2;
       rtx cc_reg_1;
       targetm.fixed_condition_code_regs (&condreg1, &condreg2);
       cc_reg_1 = gen_rtx_REG (CCmode, condreg1);
-      prev = prev_nonnote_nondebug_insn (insn);
-      if (!reg_referenced_p (cc_reg_1, PATTERN (insn))
-          || !prev
-          || !modified_in_p (cc_reg_1, prev))
-        return;
+      if (reg_referenced_p (cc_reg_1, PATTERN (insn))
+	  && modified_in_p (cc_reg_1, prev))
+	{
+	  if (targetm.sched.macro_fusion_pair_p (prev, insn))
+	    SCHED_GROUP_P (insn) = 1;
+	  return;
+	}
     }
-  else
-    {
-      rtx insn_set = single_set (insn);
-
-      prev = prev_nonnote_nondebug_insn (insn);
-      if (!prev
-          || !insn_set
-          || !single_set (prev))
-        return;
 
+  if (single_set (insn) && single_set (prev))
+    {
+      if (targetm.sched.macro_fusion_pair_p (prev, insn))
+	SCHED_GROUP_P (insn) = 1;
     }
-
-  if (targetm.sched.macro_fusion_pair_p (prev, insn))
-    SCHED_GROUP_P (insn) = 1;
-
 }
 
 /* Get the implicit reg pending clobbers for INSN and save them in TEMP.  */

  reply	other threads:[~2017-05-11  4:46 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-27  4:57 [PATCH] " Hurugalawadi, Naveen
2017-04-25  7:40 ` [PING][PATCH] " Hurugalawadi, Naveen
2017-04-25 11:39   ` Wilco Dijkstra
2017-04-26 12:58     ` Hurugalawadi, Naveen
     [not found]       ` <AM5PR0802MB2610E2BBB884B9FD27734AA683110@AM5PR0802MB2610.eurprd08.prod.outlook.com>
2017-04-27  7:29         ` Hurugalawadi, Naveen
2017-04-27 17:42       ` Jeff Law
2017-05-11  4:47         ` Hurugalawadi, Naveen [this message]
2017-05-26  6:22           ` [PING 2][PATCH] " Hurugalawadi, Naveen
2017-05-26 11:35             ` Wilco Dijkstra
2017-06-14 10:27               ` [PING 3][PATCH] " Hurugalawadi, Naveen
2017-06-23 15:39           ` [PING][PATCH] " Jeff Law
2017-06-27  4:20             ` Hurugalawadi, Naveen
2017-06-29 15:00               ` Jeff Law

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