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* [MIPS] Fix for the wrong argument sequence in MSA builtin for FMADD/MADDV family.
@ 2019-05-22  6:13 Dragan Mladjenovic
  2019-05-31 22:06 ` Jeff Law
  0 siblings, 1 reply; 4+ messages in thread
From: Dragan Mladjenovic @ 2019-05-22  6:13 UTC (permalink / raw)
  To: gcc-patches; +Cc: Dragan Mladjenovic, Jeff Law, Matthew Fortune

Hi all,

This patch makes the behavior of __builtin_msa_ fmadd/fmsub/maddv match the
expected one. While not a recent regression, it would be nice if this can
be back-ported in order to minimize the fragmentation.

Best regards,

Dragan

gcc/ChangeLog:

2019-05-20  Prachi Godbole  <prachi.godbole@imgtec.com>
            Robert Suchanek  <robert.suchanek@mips.com>

	* gcc/config/mips/mips.c (mips_expand_builtin_insn): Swap the 1st
	and 3rd operands of the fmadd/fmsub/maddv builtin.

gcc/testsuite/ChangeLog:

2019-05-20  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>

	* gcc.target/mips/msa-fmadd.c: New.
---
 gcc/config/mips/mips.c                    |  13 ++++
 gcc/testsuite/gcc.target/mips/msa-fmadd.c | 101 ++++++++++++++++++++++++++++++
 2 files changed, 114 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/mips/msa-fmadd.c

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index bcfffbb..29335a4 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -18467,6 +18467,19 @@ mips_expand_builtin_insn (enum insn_code icode, unsigned int nops,
       std::swap (ops[1], ops[2]);
       break;
 
+    case CODE_FOR_msa_maddv_b:
+    case CODE_FOR_msa_maddv_h:
+    case CODE_FOR_msa_maddv_w:
+    case CODE_FOR_msa_maddv_d:
+    case CODE_FOR_msa_fmadd_w:
+    case CODE_FOR_msa_fmadd_d:
+    case CODE_FOR_msa_fmsub_w:
+    case CODE_FOR_msa_fmsub_d:
+      /* fma(a, b, c) results into (a * b + c), however builtin_msa_fmadd expects
+	 it to be (a + b * c).  Swap the 1st and 3rd operands.  */
+      std::swap (ops[1], ops[3]);
+      break;
+
     case CODE_FOR_msa_slli_b:
     case CODE_FOR_msa_slli_h:
     case CODE_FOR_msa_slli_w:
diff --git a/gcc/testsuite/gcc.target/mips/msa-fmadd.c b/gcc/testsuite/gcc.target/mips/msa-fmadd.c
new file mode 100644
index 0000000..9265c04
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/msa-fmadd.c
@@ -0,0 +1,101 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp64 -mhard-float -mmsa -EL -flax-vector-conversions" } */
+/* { dg-skip-if "uses global registers" { *-*-* } { "-O0" } { "" } } */
+
+typedef int v4i32 __attribute__ ((vector_size(16)));
+typedef float v4f32 __attribute__ ((vector_size(16)));
+typedef double v2f64 __attribute__ ((vector_size(16)));
+
+/* Test that MSA FMADD-like intrinsics do not use first operand for multiplication.  */
+
+register v4i32 a __asm__("$f20");
+register v4i32 b __asm__("$f22");
+register v4f32 c __asm__("$f24");
+register v4f32 d __asm__("$f26");
+register v2f64 e __asm__("$f28");
+register v2f64 f __asm__("$f30");
+
+void
+maddv_b_msa (void)
+{
+  a = __builtin_msa_maddv_b (a, b, b);
+}
+/* { dg-final { scan-assembler "maddv\\\.b\t\\\$w20,\\\$w22,\\\$w22" } }  */
+
+void
+maddv_h_msa (void)
+{
+  a = __builtin_msa_maddv_h (a, b, b);
+}
+/* { dg-final { scan-assembler "maddv\\\.h\t\\\$w20,\\\$w22,\\\$w22" } }  */
+
+void
+maddv_w_msa (void)
+{
+  a = __builtin_msa_maddv_w (a, b, b);
+}
+/* { dg-final { scan-assembler "maddv\\\.w\t\\\$w20,\\\$w22,\\\$w22" } }  */
+
+void
+maddv_d_msa (void)
+{
+  a = __builtin_msa_maddv_d (a, b, b);
+}
+/* { dg-final { scan-assembler "maddv\\\.d\t\\\$w20,\\\$w22,\\\$w22" } }  */
+
+void
+msubv_b_msa (void)
+{
+  a = __builtin_msa_msubv_b (a, b, b);
+}
+/* { dg-final { scan-assembler "msubv\\\.b\t\\\$w20,\\\$w22,\\\$w22" } }  */
+
+void
+msubv_h_msa (void)
+{
+  a = __builtin_msa_msubv_h (a, b, b);
+}
+/* { dg-final { scan-assembler "msubv\\\.h\t\\\$w20,\\\$w22,\\\$w22" } }  */
+
+void
+msubv_w_msa (void)
+{
+  a = __builtin_msa_msubv_w (a, b, b);
+}
+/* { dg-final { scan-assembler "msubv\\\.w\t\\\$w20,\\\$w22,\\\$w22" } }  */
+
+void
+msubv_d_msa (void)
+{
+  a = __builtin_msa_msubv_d (a, b, b);
+}
+/* { dg-final { scan-assembler "msubv\\\.d\t\\\$w20,\\\$w22,\\\$w22" } }  */
+
+void
+fmadd_w_msa (void)
+{
+  c = __builtin_msa_fmadd_w (c, d, d);
+}
+/* { dg-final { scan-assembler "fmadd\\\.w\t\\\$w24,\\\$w26,\\\$w26" } }  */
+
+void
+fmadd_d_msa (void)
+{
+  e = __builtin_msa_fmadd_d (e, f, f);
+}
+/* { dg-final { scan-assembler "fmadd\\\.d\t\\\$w28,\\\$w30,\\\$w30" } }  */
+
+void
+fmsub_w_msa (void)
+{
+  c = __builtin_msa_fmsub_w (c, d, d);
+}
+/* { dg-final { scan-assembler "fmsub\\\.w\t\\\$w24,\\\$w26,\\\$w26" } }  */
+
+void
+fmsub_d_msa (void)
+{
+  e = __builtin_msa_fmsub_d (e, f, f);
+}
+/* { dg-final { scan-assembler "fmsub\\\.d\t\\\$w28,\\\$w30,\\\$w30" } }  */
+
-- 
1.9.1


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2019-05-22  6:13 [MIPS] Fix for the wrong argument sequence in MSA builtin for FMADD/MADDV family Dragan Mladjenovic
2019-05-31 22:06 ` Jeff Law
2019-06-17  7:44   ` Dragan Mladjenovic
2019-06-17 17:30     ` Jeff Law

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