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* 0005-Part-5.-Add-x86-CET-documentation
@ 2017-08-01  8:57 Tsimbalist, Igor V
  2017-09-20  9:21 ` 0005-Part-5.-Add-x86-CET-documentation Tsimbalist, Igor V
  0 siblings, 1 reply; 14+ messages in thread
From: Tsimbalist, Igor V @ 2017-08-01  8:57 UTC (permalink / raw)
  To: 'gcc-patches@gcc.gnu.org'; +Cc: Tsimbalist, Igor V

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Part#5. Add x86 CET documentation.

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From b2361a3954cfd297896aa1f6926cdecc40ddce9e Mon Sep 17 00:00:00 2001
From: Igor Tsimbalist <igor.v.tsimbalist@intel.com>
Date: Tue, 4 Jul 2017 13:55:03 +0300
Subject: [PATCH 5/9] Part#5. Add x86 CET documentation.

gcc/

	* doc/extend.texi: Add x86 specific to 'notrack' attribute.
	List CET intrinsics.
	* doc/invoke.texi: Add -mcet, -mibt, -mshstk.  Add x86 specific
	to -finstrument-control-flow.
---
 gcc/doc/extend.texi | 34 ++++++++++++++++++++++++++---
 gcc/doc/invoke.texi | 63 ++++++++++++++++++++++++++++++++++++++++++++---------
 2 files changed, 84 insertions(+), 13 deletions(-)

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 80de8a7..96f4098 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -5641,14 +5641,24 @@ compiled with the @option{-finstrument-control-flow} option.  The
 compiler assumes that the function's address is a valid target for a
 control-flow transfer.
 
+@emph{x86 implementation:} For function bodies, which do not have
+the @code{notrack} attribute, the compiler insert an ENDBR
+instruction at function entry.  The instruction triggers
+the HW to check if a control-flow transfer to the function is valid.
+When compiled with the @option{-finstrument-control-flow} option
+the ENDBR instruction also inserted at addresses to which indirect
+control-flow trasfer can happen.
+
 The @code{notrack} attribute on a type of pointer to function is
 used to inform the compiler that a call through the pointer should
 not be instrumented when compiled with the
 @option{-finstrument-control-flow} option.  The compiler assumes
 that the function's address from the pointer is a valid target for
-a control-flow transfer.  A direct function call through a function
-name is assumed as a save call thus direct calls will not be
-instrumented by the compiler.
+a control-flow transfer. For @emph{x86 implementation} the compiler
+insert a NOTRACK prefix before a indeirect call instruction.  A
+direct function call through a function name is assumed as a save
+call thus direct calls will not be instrumented by the compiler
+and no NOTRACK prefix is inserted before direct calls.
 
 The @code{notrack} attribute is applied to an object's type.  A
 The @code{notrack} attribute is transfered to a call instruction at
@@ -21079,6 +21089,24 @@ void __builtin_ia32_wrpkru (unsigned int)
 unsigned int __builtin_ia32_rdpkru ()
 @end smallexample
 
+The following built-in functions are available when @option{-mcet} is used.
+They are used to support Intel Control-flow Enforcment Technology (CET).
+All of them generate the machine instruction that is part of the name.
+@smallexample
+unsigned int __builtin_ia32_rdsspd (unsigned int)
+unsigned long long __builtin_ia32_rdsspq (unsigned long long)
+void __builtin_ia32_incsspd (unsigned int)
+void __builtin_ia32_incsspq (unsigned long long)
+void __builtin_ia32_saveprevssp(void);
+void __builtin_ia32_rstorssp(void *);
+void __builtin_ia32_wrssd(unsigned int, void *);
+void __builtin_ia32_wrssq(unsigned long long, void *);
+void __builtin_ia32_wrussd(unsigned int, void *);
+void __builtin_ia32_wrussq(unsigned long long, void *);
+void __builtin_ia32_setssbsy(void);
+void __builtin_ia32_clrssbsy(void *);
+@end smallexample
+
 @node x86 transactional memory intrinsics
 @subsection x86 Transactional Memory Intrinsics
 
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index ff2ce92..a84c7b6 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1202,6 +1202,7 @@ See RS/6000 and PowerPC Options.
 -msse4a  -m3dnow  -m3dnowa  -mpopcnt  -mabm  -mbmi  -mtbm  -mfma4  -mxop @gol
 -mlzcnt  -mbmi2  -mfxsr  -mxsave  -mxsaveopt  -mrtm  -mlwp  -mmpx  @gol
 -mmwaitx  -mclzero  -mpku  -mthreads @gol
+-mcet -mibt -mshstk @gol
 -mms-bitfields  -mno-align-stringops  -minline-all-stringops @gol
 -minline-stringops-dynamically  -mstringop-strategy=@var{alg} @gol
 -mmemcpy-strategy=@var{strategy}  -mmemset-strategy=@var{strategy} @gol
@@ -11289,7 +11290,7 @@ Enabled by default.
 @opindex finstrument-control-flow
 @opindex fno-instrument-control-flow
 Enable code instrumentation of control-flow transfers to increase
-a program security by checking a target address of control-flow
+a program security by checking target addresses of control-flow
 transfer instructions (i.e. routine call, routine return, jump)
 are valid targets.  This prevents diverting the control flow
 instructions from its original target address to a new undesigned
@@ -11297,14 +11298,30 @@ target.  This is intended to protect against such theats as
 Return-oriented Programming (ROP), and similarly call/jmp-oriented
 programming (COP/JOP).
 
-Each compiler, which will support the control-flow instrumentation,
-is supposed to have its own target specific implementation of the
-control-flow instrumentation and in case of absence of such
-implementation the @option{-finstrument-control-flow} will
-cause an error message.
+Each compiler, which supports the @option{-finstrument-control-flow}
+option, is supposed to have its own target specific implementation
+of the control-flow instrumentation and in case of absence of such
+implementation the @option{-finstrument-control-flow} results in
+an error message.
 
 A user has a control through the @code{notrack} attribute to identify
-which functions and calls should be skipped from instrumentation.
+which function addresses and calls should be skipped from
+instrumentation.
+
+Currently an implementation is available based on Intel Control-flow
+Enforcment Technology (CET), thus x86 GNU/Linux target and
+@option{-mcet} are required to enable this feature.  In order
+to get an application to be CET enabled the implementation requires
+all object files have to be compiled with
+@option{-finstrument-control-flow} and all linked in libraries have
+to be CET enabled.
+
+Instrumentation for x86 is controlled by target specific @option{-mcet},
+@option{-mibt} and @option{-mshstk} options and @code{notrack}
+attribute for function (@pxref{x86 Function Attributes}). The compiler
+also provides a number of built-in functions for fine-grained controll
+of CET-based implementation.  See @xref{x86 Built-in Functions},
+for more information.
 
 @item -fstack-protector
 @opindex fstack-protector
@@ -25648,15 +25665,19 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
 @need 200
 @itemx -mclzero
 @opindex mclzero
+@need 200
 @itemx -mpku
 @opindex mpku
+@need 200
+@itemx -mcet
+@opindex mcet
 These switches enable the use of instructions in the MMX, SSE,
 SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AVX512F, AVX512PF, AVX512ER, AVX512CD,
 SHA, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA, SSE4A, FMA4, XOP, LWP, ABM,
 AVX512VL, AVX512BW, AVX512DQ, AVX512IFMA AVX512VBMI, BMI, BMI2, FXSR,
-XSAVE, XSAVEOPT, LZCNT, RTM, MPX, MWAITX, PKU, 3DNow!@: or enhanced 3DNow!@:
-extended instruction sets.  Each has a corresponding @option{-mno-} option
-to disable use of these instructions.
+XSAVE, XSAVEOPT, LZCNT, RTM, MPX, MWAITX, PKU, IBT, SHSTK,
+3DNow!@: or enhanced 3DNow!@: extended instruction sets.  Each has a
+corresponding @option{-mno-} option to disable use of these instructions.
 
 These extensions are also available as built-in functions: see
 @ref{x86 Built-in Functions}, for details of the functions enabled and
@@ -25676,6 +25697,10 @@ supported architecture, using the appropriate flags.  In particular,
 the file containing the CPU detection code should be compiled without
 these options.
 
+The @option{-mcet} option turns on @option{-mibt} and
+@option{mshstk} options.  Each of these options enables coresponding
+support from x86 Control-flow Enforcment Technology (CET) implementation.
+
 @item -mdump-tune-features
 @opindex mdump-tune-features
 This option instructs GCC to dump the names of the x86 performance 
@@ -25749,6 +25774,24 @@ see @ref{Other Builtins} for details.
 This option enables use of the @code{movbe} instruction to implement
 @code{__builtin_bswap32} and @code{__builtin_bswap64}.
 
+@item -mibt
+@opindex mibt
+This option instructs the compiler to use only indirect branch tracking
+(indirect calls and jumps) support from x86 Control-flow Enforcment
+Technology (CET) implementation, see also @code{-mcet} option.  The
+option has effect only if @code{-finstrument-control-flow} option is
+specified. The option @code{-mibt} is on by default when @code{-mcet}
+option is specified.
+
+@item -mshstk
+@opindex mshstk
+This option instructs compiler to use only shadow stack (return address
+tracking) support from x86 Control-flow Enforcment Technology (CET)
+implementation, see also @code{-mcet} option.  The option has effect
+only if @code{-finstrument-control-flow} option is specified.  The
+option @code{-mshstk} is on by default when @code{-mcet} option is
+specified.
+
 @item -mcrc32
 @opindex mcrc32
 This option enables built-in functions @code{__builtin_ia32_crc32qi},
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 14+ messages in thread
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2017-08-01  8:57 0005-Part-5.-Add-x86-CET-documentation Tsimbalist, Igor V
2017-09-20  9:21 ` 0005-Part-5.-Add-x86-CET-documentation Tsimbalist, Igor V
2017-09-20 14:13   ` 0005-Part-5.-Add-x86-CET-documentation Uros Bizjak
2017-09-25  3:43     ` 0005-Part-5.-Add-x86-CET-documentation Sandra Loosemore
2017-09-26 13:47       ` 0005-Part-5.-Add-x86-CET-documentation Tsimbalist, Igor V
2017-09-27  3:40         ` 0005-Part-5.-Add-x86-CET-documentation Sandra Loosemore
2017-09-27  8:52           ` 0005-Part-5.-Add-x86-CET-documentation Florian Weimer
2017-09-27 11:52             ` 0005-Part-5.-Add-x86-CET-documentation Tsimbalist, Igor V
2017-09-27 16:48             ` 0005-Part-5.-Add-x86-CET-documentation Sandra Loosemore
2017-09-27 17:01             ` 0005-Part-5.-Add-x86-CET-documentation Joseph Myers
2017-09-28 23:29               ` 0005-Part-5.-Add-x86-CET-documentation Jeff Law
2017-09-27 15:17           ` 0005-Part-5.-Add-x86-CET-documentation Tsimbalist, Igor V
2017-09-28 23:32             ` 0005-Part-5.-Add-x86-CET-documentation Jeff Law
2017-09-29  5:15             ` 0005-Part-5.-Add-x86-CET-documentation Sandra Loosemore

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