0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation

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* 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
@ 2017-08-01  8:57 Tsimbalist, Igor V
  2017-08-25 22:46 ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Jeff Law
  0 siblings, 1 reply; 17+ messages in thread
From: Tsimbalist, Igor V @ 2017-08-01  8:57 UTC (permalink / raw)
  To: 'gcc-patches@gcc.gnu.org'; +Cc: Tsimbalist, Igor V

[-- Attachment #1: Type: text/plain, Size: 53 bytes --]

Part#6. Add x86 tests for Intel CET implementation.

[-- Attachment #2: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation.patch --]
[-- Type: application/octet-stream, Size: 34836 bytes --]

From e4a8227e83e8e9f3ddbaa97707f3d335009e0e77 Mon Sep 17 00:00:00 2001
From: Igor Tsimbalist <igor.v.tsimbalist@intel.com>
Date: Fri, 21 Jul 2017 19:40:40 +0300
Subject: [PATCH 6/9] Part#6. Add x86 tests for Intel CET implementation.

gcc/testsuite/

	* g++.dg/cet-notrack-1.C: New test.
	* gcc.target/i386/cet-intrin-1.c: Likewise.
	* gcc.target/i386/cet-intrin-10.c: Likewise.
	* gcc.target/i386/cet-intrin-2.c: Likewise.
	* gcc.target/i386/cet-intrin-3.c: Likewise.
	* gcc.target/i386/cet-intrin-4.c: Likewise.
	* gcc.target/i386/cet-intrin-5.c: Likewise.
	* gcc.target/i386/cet-intrin-6.c: Likewise.
	* gcc.target/i386/cet-intrin-7.c: Likewise.
	* gcc.target/i386/cet-intrin-8.c: Likewise.
	* gcc.target/i386/cet-intrin-9.c: Likewise.
	* gcc.target/i386/cet-label.c: Likewise.
	* gcc.target/i386/cet-notrack-1a.c: Likewise.
	* gcc.target/i386/cet-notrack-1b.c: Likewise.
	* gcc.target/i386/cet-notrack-2a.c: Likewise.
	* gcc.target/i386/cet-notrack-2b.c: Likewise.
	* gcc.target/i386/cet-notrack-3.c: Likewise.
	* gcc.target/i386/cet-notrack-4a.c: Likewise.
	* gcc.target/i386/cet-notrack-4b.c: Likewise.
	* gcc.target/i386/cet-notrack-5a.c: Likewise.
	* gcc.target/i386/cet-notrack-5b.c: Likewise.
	* gcc.target/i386/cet-notrack-6a.c: Likewise.
	* gcc.target/i386/cet-notrack-6b.c: Likewise.
	* gcc.target/i386/cet-notrack-7.c: Likewise.
	* gcc.target/i386/cet-property-1.c: Likewise.
	* gcc.target/i386/cet-property-2.c: Likewise.
	* gcc.target/i386/cet-rdssp-1.c: Likewise.
	* gcc.target/i386/cet-sjlj-1.c: Likewise.
	* gcc.target/i386/cet-sjlj-2.c: Likewise.
	* gcc.target/i386/cet-sjlj-3.c: Likewise.
	* gcc.target/i386/cet-switch-1.c: Likewise.
	* gcc.target/i386/cet-switch-2.c: Likewise.
	* lib/target-supports.exp (check_effective_target_cet): New
	proc.
---
 gcc/testsuite/g++.dg/cet-notrack-1.C           | 25 ++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-1.c   | 33 ++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-10.c  | 15 +++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-2.c   | 32 ++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-3.c   | 33 ++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-4.c   | 31 +++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-5.c   | 15 +++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-6.c   | 15 +++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-7.c   | 18 ++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-8.c   | 18 ++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-9.c   | 15 +++++++++
 gcc/testsuite/gcc.target/i386/cet-label.c      | 16 +++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-1a.c | 21 ++++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-1b.c | 22 ++++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-2a.c | 12 +++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-2b.c | 12 +++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-3.c  | 14 ++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-4a.c |  6 ++++
 gcc/testsuite/gcc.target/i386/cet-notrack-4b.c |  6 ++++
 gcc/testsuite/gcc.target/i386/cet-notrack-5a.c | 16 +++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-5b.c | 21 ++++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-6a.c | 15 +++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-6b.c | 15 +++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-7.c  | 15 +++++++++
 gcc/testsuite/gcc.target/i386/cet-property-1.c | 11 ++++++
 gcc/testsuite/gcc.target/i386/cet-property-2.c | 11 ++++++
 gcc/testsuite/gcc.target/i386/cet-rdssp-1.c    | 39 ++++++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-sjlj-1.c     | 42 +++++++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-sjlj-2.c     |  4 +++
 gcc/testsuite/gcc.target/i386/cet-sjlj-3.c     | 46 ++++++++++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-switch-1.c   | 26 +++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-switch-2.c   | 26 +++++++++++++++
 gcc/testsuite/lib/target-supports.exp          | 14 ++++++++
 33 files changed, 660 insertions(+)
 create mode 100644 gcc/testsuite/g++.dg/cet-notrack-1.C
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-10.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-4.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-5.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-6.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-7.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-8.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-9.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-label.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-1a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-1b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-2a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-2b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-4a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-4b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-5a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-5b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-6a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-6b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-7.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-property-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-property-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-sjlj-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-sjlj-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-sjlj-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-switch-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-switch-2.c
---
 gcc/testsuite/g++.dg/cet-notrack-1.C           | 25 ++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-1.c   | 33 ++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-10.c  | 15 +++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-2.c   | 32 ++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-3.c   | 33 ++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-4.c   | 31 +++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-5.c   | 15 +++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-6.c   | 15 +++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-7.c   | 18 ++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-8.c   | 18 ++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-9.c   | 15 +++++++++
 gcc/testsuite/gcc.target/i386/cet-label.c      | 16 +++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-1a.c | 21 ++++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-1b.c | 22 ++++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-2a.c | 12 +++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-2b.c | 12 +++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-3.c  | 14 ++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-4a.c |  6 ++++
 gcc/testsuite/gcc.target/i386/cet-notrack-4b.c |  6 ++++
 gcc/testsuite/gcc.target/i386/cet-notrack-5a.c | 16 +++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-5b.c | 21 ++++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-6a.c | 15 +++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-6b.c | 15 +++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-7.c  | 15 +++++++++
 gcc/testsuite/gcc.target/i386/cet-property-1.c | 11 ++++++
 gcc/testsuite/gcc.target/i386/cet-property-2.c | 11 ++++++
 gcc/testsuite/gcc.target/i386/cet-rdssp-1.c    | 39 ++++++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-sjlj-1.c     | 42 +++++++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-sjlj-2.c     |  4 +++
 gcc/testsuite/gcc.target/i386/cet-sjlj-3.c     | 46 ++++++++++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-switch-1.c   | 26 +++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-switch-2.c   | 26 +++++++++++++++
 gcc/testsuite/lib/target-supports.exp          | 14 ++++++++
 33 files changed, 660 insertions(+)
 create mode 100644 gcc/testsuite/g++.dg/cet-notrack-1.C
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-10.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-4.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-5.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-6.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-7.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-8.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-9.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-label.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-1a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-1b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-2a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-2b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-4a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-4b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-5a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-5b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-6a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-6b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-7.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-property-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-property-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-sjlj-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-sjlj-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-sjlj-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-switch-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-switch-2.c

diff --git a/gcc/testsuite/g++.dg/cet-notrack-1.C b/gcc/testsuite/g++.dg/cet-notrack-1.C
new file mode 100644
index 0000000..3aff747
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cet-notrack-1.C
@@ -0,0 +1,25 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler "endbr32|endbr64" } } */
+/* { dg-final { scan-assembler-times "\tcall\[ \t]+puts" 2 } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+#include <stdio.h>
+
+struct A {
+virtual int foo() { return 42; }
+};
+
+struct B : A {
+int foo() __attribute__((notrack)) { return 73; }
+};
+
+int main() {
+B b;
+A& a = b;
+int (A::*amem) () __attribute__((notrack)) = &A::foo; // take address
+if ((a.*amem)() == 73) // use the address
+  printf("pass\n");
+else
+  printf("fail\n");
+return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-1.c b/gcc/testsuite/gcc.target/i386/cet-intrin-1.c
new file mode 100644
index 0000000..23388fd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-1.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 2 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 4 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "rdsspd|incsspd\[ \t]+(%|)eax" { target ia32 } } } */
+/* { dg-final { scan-assembler "rdssp\[dq]\[ \t]+(%|)\[re]ax" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "incssp\[dq]\[ \t]+(%|)\[re]di" { target { ! ia32 } } } } */
+
+#include <immintrin.h>
+
+unsigned int f1 ()
+{
+  unsigned int x = 0;
+  return __builtin_ia32_rdsspd (x);
+}
+
+void f3 (unsigned int _a)
+{
+  __builtin_ia32_incsspd (_a);
+}
+
+#ifdef __x86_64__
+unsigned long long f2 ()
+{
+  unsigned long long x = 0;
+  return __builtin_ia32_rdsspq (x);
+}
+
+void f4 (unsigned int _a)
+{
+  __builtin_ia32_incsspq (_a);
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-10.c b/gcc/testsuite/gcc.target/i386/cet-intrin-10.c
new file mode 100644
index 0000000..9d85675
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-10.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "clrssbsy" 2 } } */
+
+#include <immintrin.h>
+
+void f1 (void *__B)
+{
+  __builtin_ia32_clrssbsy (__B);
+}
+
+void f2 (void *__B)
+{
+  _clrssbsy (__B);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-2.c b/gcc/testsuite/gcc.target/i386/cet-intrin-2.c
new file mode 100644
index 0000000..1efa69f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-2.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mshstk" } */
+/* { dg-final { scan-assembler "rdsspd|incsspd\[ \t]+(%|)eax" { target ia32 } } } */
+/* { dg-final { scan-assembler "rdssp\[dq]\[ \t]+(%|)\[re]ax" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "incssp\[dq]\[ \t]+(%|)\[re]di" { target { ! ia32 } } } } */
+
+#include <immintrin.h>
+
+unsigned int f1 ()
+{
+  unsigned int x = 0;
+  return __builtin_ia32_rdsspd (x);
+}
+
+void f3 (unsigned int _a)
+{
+  __builtin_ia32_incsspd (_a);
+}
+
+#ifdef __x86_64__
+unsigned long long f2 ()
+{
+  unsigned long long x = 0;
+  return __builtin_ia32_rdsspq (x);
+}
+
+
+void f4 (unsigned int _a)
+{
+  __builtin_ia32_incsspq (_a);
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-3.c b/gcc/testsuite/gcc.target/i386/cet-intrin-3.c
new file mode 100644
index 0000000..d287075
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-3.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 2 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 4 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "rdsspd|incsspd\[ \t]+(%|)eax" { target ia32 } } } */
+/* { dg-final { scan-assembler "rdssp\[dq]\[ \t]+(%|)\[re]ax" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "incssp\[dq]\[ \t]+(%|)\[re]di" { target { ! ia32 } } } } */
+
+#include <immintrin.h>
+
+unsigned int f1 ()
+{
+  unsigned int x = 0;
+  return _rdsspd (x);
+}
+
+void f3 (unsigned int _a)
+{
+  _incsspd (_a);
+}
+
+#ifdef __x86_64__
+unsigned long long f2 ()
+{
+  unsigned long long x = 0;
+  return _rdsspq (x);
+}
+
+void f4 (unsigned int _a)
+{
+  _incsspq (_a);
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-4.c b/gcc/testsuite/gcc.target/i386/cet-intrin-4.c
new file mode 100644
index 0000000..61f280d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-4.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mshstk" } */
+/* { dg-final { scan-assembler "rdsspd|incsspd\[ \t]+(%|)eax" { target ia32 } } } */
+/* { dg-final { scan-assembler "rdssp\[dq]\[ \t]+(%|)\[re]ax"  { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "incssp\[dq]\[ \t]+(%|)\[re]di" { target { ! ia32 } } } } */
+
+#include <immintrin.h>
+
+unsigned int f1 ()
+{
+  unsigned int x = 0;
+  return _rdsspd (x);
+}
+
+void f3 (unsigned int _a)
+{
+  _incsspd (_a);
+}
+
+#ifdef __x86_64__
+unsigned long long f2 ()
+{
+  unsigned long long x = 0;
+  return _rdsspq (x);
+}
+
+void f4 (unsigned int _a)
+{
+  _incsspq (_a);
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-5.c b/gcc/testsuite/gcc.target/i386/cet-intrin-5.c
new file mode 100644
index 0000000..0b93736
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-5.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "saveprevssp" 2 } } */
+
+#include <immintrin.h>
+
+void f1 (void)
+{
+  __builtin_ia32_saveprevssp ();
+}
+
+void f2 (void)
+{
+  _saveprevssp ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-6.c b/gcc/testsuite/gcc.target/i386/cet-intrin-6.c
new file mode 100644
index 0000000..df76334
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-6.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "rstorssp" 2 } } */
+
+#include <immintrin.h>
+
+void f1 (void *__B)
+{
+  __builtin_ia32_rstorssp (__B);
+}
+
+void f2 (void *__B)
+{
+  _rstorssp (__B);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-7.c b/gcc/testsuite/gcc.target/i386/cet-intrin-7.c
new file mode 100644
index 0000000..06be7ee
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-7.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "wrssd" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "wrss\[d|q]" 2 { target lp64 } } } */
+
+#include <immintrin.h>
+
+void f1 (unsigned int __A, void *__B)
+{
+  __builtin_ia32_wrssd (__A, __B);
+}
+
+#ifdef __x86_64__
+void f2 (unsigned long long __A, void *__B)
+{
+  _wrssq (__A, __B);
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-8.c b/gcc/testsuite/gcc.target/i386/cet-intrin-8.c
new file mode 100644
index 0000000..88b2ce2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-8.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "wrussd" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "wruss\[d|q]" 2 { target lp64 } } } */
+
+#include <immintrin.h>
+
+void f1 (unsigned int __A, void *__B)
+{
+  __builtin_ia32_wrussd (__A, __B);
+}
+
+#ifdef __x86_64__
+void f2 (unsigned long long __A, void *__B)
+{
+  _wrussq (__A, __B);
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-9.c b/gcc/testsuite/gcc.target/i386/cet-intrin-9.c
new file mode 100644
index 0000000..c4a9582
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-9.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "setssbsy" 2 } } */
+
+#include <immintrin.h>
+
+void f1 (void)
+{
+  __builtin_ia32_setssbsy ();
+}
+
+void f2 (void)
+{
+  _setssbsy ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-label.c b/gcc/testsuite/gcc.target/i386/cet-label.c
new file mode 100644
index 0000000..62b5dce
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-label.c
@@ -0,0 +1,16 @@
+/* Verify that CET works.  */
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 3 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 3 { target { ! ia32 } } } } */
+
+int func (int arg)
+{
+  static void *array[] = { &&foo, &&bar };
+
+  goto *array[arg];
+foo:
+  return arg*111;
+bar:
+  return arg*777;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-1a.c b/gcc/testsuite/gcc.target/i386/cet-notrack-1a.c
new file mode 100644
index 0000000..68600f2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-1a.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -fno-instrument-control-flow -mno-cet" } */
+/* { dg-final { scan-assembler-not "endbr" } } */
+/* { dg-final { scan-assembler-not "notrack call\[ \t]+" } } */
+
+int func (int a) __attribute__ ((notrack));
+int (*fptr) (int a) __attribute__ ((notrack));
+
+int foo (int arg)
+{
+  int a, b;
+  a = func (arg);
+  b = (*fptr) (arg);
+  return a+b;
+}
+
+int func (int arg)
+{
+  int (*fptrl) (int a) __attribute__ ((notrack));
+  return arg*(*fptrl)(arg);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-1b.c b/gcc/testsuite/gcc.target/i386/cet-notrack-1b.c
new file mode 100644
index 0000000..38441c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-1b.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 2 } } */
+
+int func (int a) __attribute__ ((notrack));
+int (*fptr) (int a) __attribute__ ((notrack));
+
+int foo (int arg)
+{
+int a, b;
+  a = func (arg);
+  b = (*fptr) (arg);
+  return a+b;
+}
+
+int func (int arg)
+{
+int (*fptrl) (int a) __attribute__ ((notrack));
+  return arg*(*fptrl)(arg);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-2a.c b/gcc/testsuite/gcc.target/i386/cet-notrack-2a.c
new file mode 100644
index 0000000..d2caf6a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-2a.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+
+void
+bar (void (*foo) (void))
+{
+  void (*func) (void) __attribute__((notrack)) = foo;
+  func ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-2b.c b/gcc/testsuite/gcc.target/i386/cet-notrack-2b.c
new file mode 100644
index 0000000..b7e8cf2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-2b.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-O2 -finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack jmp\[ \t]+" 1 } } */
+
+void
+bar (void (*foo) (void))
+{
+  void (*func) (void) __attribute__((notrack)) = foo;
+  func ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-3.c b/gcc/testsuite/gcc.target/i386/cet-notrack-3.c
new file mode 100644
index 0000000..caafd7c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-3.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+
+typedef void (*func_t) (void) __attribute__((notrack));
+extern func_t func;
+
+void
+bar (void)
+{
+  func ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-4a.c b/gcc/testsuite/gcc.target/i386/cet-notrack-4a.c
new file mode 100644
index 0000000..b93e5bf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-4a.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-fno-instrument-control-flow -mno-cet" } */
+
+int var1 __attribute__((notrack)); /* { dg-warning "'notrack' attribute only applies to function types" } */
+int *var2 __attribute__((notrack)); /* { dg-warning "'notrack' attribute only applies to function types" } */
+void (**var3) (void) __attribute__((notrack)); /* { dg-warning "'notrack' attribute only applies to function types" } */
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-4b.c b/gcc/testsuite/gcc.target/i386/cet-notrack-4b.c
new file mode 100644
index 0000000..2b7fd9b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-4b.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mcet" } */
+
+int var1 __attribute__((notrack)); /* { dg-warning "'notrack' attribute only applies to function types" } */
+int *var2 __attribute__((notrack)); /* { dg-warning "'notrack' attribute only applies to function types" } */
+void (**var3) (void) __attribute__((notrack)); /* { dg-warning "'notrack' attribute only applies to function types" } */
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-5a.c b/gcc/testsuite/gcc.target/i386/cet-notrack-5a.c
new file mode 100644
index 0000000..8940260
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-5a.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-not "\tcall\[ \t]+" } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+
+int (*fptr) (int) __attribute__ ((notrack));
+
+int
+foo (int arg)
+{
+  int a;
+  a = (*fptr) (arg); /* notrack call.  */
+  return arg+a;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-5b.c b/gcc/testsuite/gcc.target/i386/cet-notrack-5b.c
new file mode 100644
index 0000000..5ad845a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-5b.c
@@ -0,0 +1,21 @@
+/* Check the attribute do not proparate through assignment.  */
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "\tcall\[ \t]+" 1 } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+
+int (*fptr) (int) __attribute__ ((notrack));
+int (*fptr1) (int);
+
+int
+foo (int arg)
+{
+  int a;
+  a = (*fptr) (arg); /* notrack call.  */
+  arg += a;
+  fptr1 = fptr;
+  a = (*fptr1) (arg); /* track call.  */
+  return arg+a;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-6a.c b/gcc/testsuite/gcc.target/i386/cet-notrack-6a.c
new file mode 100644
index 0000000..a085b4c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-6a.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "\t(?:call|jmp)\[ \t]+foo" 1 } } */
+/* { dg-final { scan-assembler-not "notrack call\[ \t]+" } } */
+
+int foo (int arg);
+
+int func (int arg)
+{
+  int (*fptrl) (int a) __attribute__ ((notrack)) = foo;
+
+  return (*fptrl)(arg);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-6b.c b/gcc/testsuite/gcc.target/i386/cet-notrack-6b.c
new file mode 100644
index 0000000..6bc25b5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-6b.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-not "\tcall\[ \t]+" } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+
+int foo (int arg);
+
+int func (int arg)
+{
+  int (*fptrl) (int a) __attribute__ ((notrack)) = foo;
+
+  return (*fptrl)(arg);  /* notrack call.  */
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-7.c b/gcc/testsuite/gcc.target/i386/cet-notrack-7.c
new file mode 100644
index 0000000..b90bf5a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-7.c
@@ -0,0 +1,15 @@
+/* Check the notrack prefix is not generated for direct call.  */
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+foo" 0 } } */
+/* { dg-final { scan-assembler-times "\tcall\[ \t]+foo" 1 } } */
+
+extern void foo (void) __attribute__((notrack));
+
+void
+bar (void)
+{
+  foo ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-property-1.c b/gcc/testsuite/gcc.target/i386/cet-property-1.c
new file mode 100644
index 0000000..4782e76
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-property-1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler ".note.gnu.property" } } */
+
+extern void foo (void);
+
+void
+bar (void)
+{
+  foo ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-property-2.c b/gcc/testsuite/gcc.target/i386/cet-property-2.c
new file mode 100644
index 0000000..5a87dab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-property-2.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mcet" } */
+/* { dg-final { scan-assembler-not ".note.gnu.property" } } */
+
+extern void foo (void);
+
+void
+bar (void)
+{
+  foo ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
new file mode 100644
index 0000000..f9223a5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
@@ -0,0 +1,39 @@
+/* { dg-do run { target cet } } */
+/* { dg-options "-O2 -finstrument-control-flow -mcet" } */
+
+void _exit(int status) __attribute__ ((__noreturn__));
+
+#ifdef __x86_64__
+# define incssp(x) __builtin_ia32_incsspq (x)
+# define rdssp(x) __builtin_ia32_rdsspq (x)
+#else
+# define incssp(x) __builtin_ia32_incsspd (x)
+# define rdssp(x) __builtin_ia32_rdsspd (x)
+#endif
+
+static void
+__attribute__ ((noinline, noclone))
+test (unsigned long frames)
+{
+  unsigned long ssp = 0;
+  ssp = rdssp (ssp);
+  if (ssp != 0)
+    {
+      unsigned long tmp = frames;
+      while (tmp > 255)
+	{
+	  incssp (tmp);
+	  tmp -= 255;
+	}
+      incssp (tmp);
+    }
+  /* We must call _exit since shadow stack is incorrect now.  */
+  _exit (0);
+}
+
+int
+main ()
+{
+  test (1);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-sjlj-1.c b/gcc/testsuite/gcc.target/i386/cet-sjlj-1.c
new file mode 100644
index 0000000..9f25d9a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-sjlj-1.c
@@ -0,0 +1,42 @@
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 4 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 4 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "rdssp\[dq]" 2 } } */
+/* { dg-final { scan-assembler-times "incssp\[dq]" 1 } } */
+
+/* Based on gcc.dg/setjmp-3.c.  */
+
+void *buf[5];
+
+extern void abort (void);
+
+void raise0(void)
+{
+  __builtin_longjmp (buf, 1);
+}
+
+int execute(int cmd)
+{
+  int last = 0;
+
+  if (__builtin_setjmp (buf) == 0)
+    while (1)
+      {
+	last = 1;
+	raise0 ();
+      }
+
+  if (last == 0)
+    return 0;
+  else
+    return cmd;
+}
+
+int main(void)
+{
+  if (execute (1) == 0)
+    abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-sjlj-2.c b/gcc/testsuite/gcc.target/i386/cet-sjlj-2.c
new file mode 100644
index 0000000..e32ecf6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-sjlj-2.c
@@ -0,0 +1,4 @@
+/* { dg-do run { target cet } } */
+/* { dg-options "-O -finstrument-control-flow -mcet" } */
+
+#include "cet-sjlj-1.c"
diff --git a/gcc/testsuite/gcc.target/i386/cet-sjlj-3.c b/gcc/testsuite/gcc.target/i386/cet-sjlj-3.c
new file mode 100644
index 0000000..5b97f74
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-sjlj-3.c
@@ -0,0 +1,46 @@
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 4 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 4 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "call	_setjmp" 1 } } */
+/* { dg-final { scan-assembler-times "call	longjmp" 1 } } */
+
+#include <stdio.h>
+#include <setjmp.h>
+
+jmp_buf buf;
+int bar (int);
+
+int
+foo (int i)
+{
+  int j = i * 11;
+
+  if (!setjmp (buf))
+    {
+      j += 33;
+      printf ("After setjmp: j = %d\n", j);
+      bar (j);
+    }
+
+  return j + i;
+}
+
+int
+bar (int i)
+{
+int j = i;
+
+  j -= 111;
+  printf ("In longjmp: j = %d\n", j);
+  longjmp (buf, 1);
+
+  return j;
+}
+
+int
+main ()
+{
+  foo (10);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-switch-1.c b/gcc/testsuite/gcc.target/i386/cet-switch-1.c
new file mode 100644
index 0000000..61af4ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-switch-1.c
@@ -0,0 +1,26 @@
+/* Verify that CET works.  */
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack jmp\[ \t]+\[*]" 1 } } */
+
+void func2 (int);
+
+int func1 (int arg)
+{
+  switch (arg)
+  {
+    case 1: func2 (arg*100);
+    case 2: func2 (arg*300);
+    case 5: func2 (arg*500);
+    case 8: func2 (arg*700);
+    case 7: func2 (arg*900);
+    case -1: func2 (arg*-100);
+    case -2: func2 (arg*-300);
+    case -5: func2 (arg*-500);
+    case -7: func2 (arg*-700);
+    case -9: func2 (arg*-900);
+  }
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-switch-2.c b/gcc/testsuite/gcc.target/i386/cet-switch-2.c
new file mode 100644
index 0000000..f9fb69f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-switch-2.c
@@ -0,0 +1,26 @@
+/* Verify that CET works.  */
+/* { dg-do compile } */
+/* { dg-options "-O -finstrument-control-flow -mcet -mcet-switch" } */
+/* { dg-final { scan-assembler-times "endbr32" 12 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 12 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "\[ \t]+jmp\[ \t]+\[*]" 1 } } */
+
+void func2 (int);
+
+int func1 (int arg)
+{
+  switch (arg)
+  {
+    case 1: func2 (arg*100);
+    case 2: func2 (arg*300);
+    case 5: func2 (arg*500);
+    case 8: func2 (arg*700);
+    case 7: func2 (arg*900);
+    case -1: func2 (arg*-100);
+    case -2: func2 (arg*-300);
+    case -5: func2 (arg*-500);
+    case -7: func2 (arg*-700);
+    case -9: func2 (arg*-900);
+  }
+  return 0;
+}
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 5a65627..f6f297b 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8482,3 +8482,17 @@ proc check_effective_target_arm_coproc4_ok { } {
     return [check_cached_effective_target arm_coproc4_ok \
 		check_effective_target_arm_coproc4_ok_nocache]
 }
+
+# Return 1 if CET instructions can be compiled.
+
+proc check_effective_target_cet { } {
+    if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+	return 0
+    }
+    return [check_no_compiler_messages cet object {
+	void foo (void)
+	{
+	  asm ("setssbsy");
+	}
+    } "-O2" ]
+}
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
  2017-08-01  8:57 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
@ 2017-08-25 22:46 ` Jeff Law
  2017-09-15 15:36   ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
  0 siblings, 1 reply; 17+ messages in thread
From: Jeff Law @ 2017-08-25 22:46 UTC (permalink / raw)
  To: Tsimbalist, Igor V, 'gcc-patches@gcc.gnu.org'

On 08/01/2017 02:56 AM, Tsimbalist, Igor V wrote:
> Part#6. Add x86 tests for Intel CET implementation.
> 
> 
> 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation.patch
> 
> 
> From e4a8227e83e8e9f3ddbaa97707f3d335009e0e77 Mon Sep 17 00:00:00 2001
> From: Igor Tsimbalist <igor.v.tsimbalist@intel.com>
> Date: Fri, 21 Jul 2017 19:40:40 +0300
> Subject: [PATCH 6/9] Part#6. Add x86 tests for Intel CET implementation.
> 
> gcc/testsuite/
> 
> 	* g++.dg/cet-notrack-1.C: New test.
> 	* gcc.target/i386/cet-intrin-1.c: Likewise.
> 	* gcc.target/i386/cet-intrin-10.c: Likewise.
> 	* gcc.target/i386/cet-intrin-2.c: Likewise.
> 	* gcc.target/i386/cet-intrin-3.c: Likewise.
> 	* gcc.target/i386/cet-intrin-4.c: Likewise.
> 	* gcc.target/i386/cet-intrin-5.c: Likewise.
> 	* gcc.target/i386/cet-intrin-6.c: Likewise.
> 	* gcc.target/i386/cet-intrin-7.c: Likewise.
> 	* gcc.target/i386/cet-intrin-8.c: Likewise.
> 	* gcc.target/i386/cet-intrin-9.c: Likewise.
> 	* gcc.target/i386/cet-label.c: Likewise.
> 	* gcc.target/i386/cet-notrack-1a.c: Likewise.
> 	* gcc.target/i386/cet-notrack-1b.c: Likewise.
> 	* gcc.target/i386/cet-notrack-2a.c: Likewise.
> 	* gcc.target/i386/cet-notrack-2b.c: Likewise.
> 	* gcc.target/i386/cet-notrack-3.c: Likewise.
> 	* gcc.target/i386/cet-notrack-4a.c: Likewise.
> 	* gcc.target/i386/cet-notrack-4b.c: Likewise.
> 	* gcc.target/i386/cet-notrack-5a.c: Likewise.
> 	* gcc.target/i386/cet-notrack-5b.c: Likewise.
> 	* gcc.target/i386/cet-notrack-6a.c: Likewise.
> 	* gcc.target/i386/cet-notrack-6b.c: Likewise.
> 	* gcc.target/i386/cet-notrack-7.c: Likewise.
> 	* gcc.target/i386/cet-property-1.c: Likewise.
> 	* gcc.target/i386/cet-property-2.c: Likewise.
> 	* gcc.target/i386/cet-rdssp-1.c: Likewise.
> 	* gcc.target/i386/cet-sjlj-1.c: Likewise.
> 	* gcc.target/i386/cet-sjlj-2.c: Likewise.
> 	* gcc.target/i386/cet-sjlj-3.c: Likewise.
> 	* gcc.target/i386/cet-switch-1.c: Likewise.
> 	* gcc.target/i386/cet-switch-2.c: Likewise.
> 	* lib/target-supports.exp (check_effective_target_cet): New
> 	proc.
Whoops.  NEvermind my previous comment about x86 specific tests.  I
should have scanned the whole kit before starting to comment on the
earlier patches.

Uros will have the say on the x86 specific bits.  Given it's been 3
weeks, you might want to ping him directly to start getting his feedback.

jeff

^ permalink raw reply	[flat|nested] 17+ messages in thread

* RE: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
  2017-08-25 22:46 ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Jeff Law
@ 2017-09-15 15:36   ` Tsimbalist, Igor V
  0 siblings, 0 replies; 17+ messages in thread
From: Tsimbalist, Igor V @ 2017-09-15 15:36 UTC (permalink / raw)
  To: Jeff Law, 'gcc-patches@gcc.gnu.org'; +Cc: Tsimbalist, Igor V

> -----Original Message-----
> From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
> owner@gcc.gnu.org] On Behalf Of Jeff Law
> Sent: Friday, August 25, 2017 11:03 PM
> To: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>; 'gcc-
> patches@gcc.gnu.org' <gcc-patches@gcc.gnu.org>
> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> 
> On 08/01/2017 02:56 AM, Tsimbalist, Igor V wrote:
> > Part#6. Add x86 tests for Intel CET implementation.
> >
> >
> > 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation.patch
> >
> >
> > From e4a8227e83e8e9f3ddbaa97707f3d335009e0e77 Mon Sep 17 00:00:00
> 2001
> > From: Igor Tsimbalist <igor.v.tsimbalist@intel.com>
> > Date: Fri, 21 Jul 2017 19:40:40 +0300
> > Subject: [PATCH 6/9] Part#6. Add x86 tests for Intel CET implementation.
> >
> > gcc/testsuite/
> >
> > 	* g++.dg/cet-notrack-1.C: New test.
> > 	* gcc.target/i386/cet-intrin-1.c: Likewise.
> > 	* gcc.target/i386/cet-intrin-10.c: Likewise.
> > 	* gcc.target/i386/cet-intrin-2.c: Likewise.
> > 	* gcc.target/i386/cet-intrin-3.c: Likewise.
> > 	* gcc.target/i386/cet-intrin-4.c: Likewise.
> > 	* gcc.target/i386/cet-intrin-5.c: Likewise.
> > 	* gcc.target/i386/cet-intrin-6.c: Likewise.
> > 	* gcc.target/i386/cet-intrin-7.c: Likewise.
> > 	* gcc.target/i386/cet-intrin-8.c: Likewise.
> > 	* gcc.target/i386/cet-intrin-9.c: Likewise.
> > 	* gcc.target/i386/cet-label.c: Likewise.
> > 	* gcc.target/i386/cet-notrack-1a.c: Likewise.
> > 	* gcc.target/i386/cet-notrack-1b.c: Likewise.
> > 	* gcc.target/i386/cet-notrack-2a.c: Likewise.
> > 	* gcc.target/i386/cet-notrack-2b.c: Likewise.
> > 	* gcc.target/i386/cet-notrack-3.c: Likewise.
> > 	* gcc.target/i386/cet-notrack-4a.c: Likewise.
> > 	* gcc.target/i386/cet-notrack-4b.c: Likewise.
> > 	* gcc.target/i386/cet-notrack-5a.c: Likewise.
> > 	* gcc.target/i386/cet-notrack-5b.c: Likewise.
> > 	* gcc.target/i386/cet-notrack-6a.c: Likewise.
> > 	* gcc.target/i386/cet-notrack-6b.c: Likewise.
> > 	* gcc.target/i386/cet-notrack-7.c: Likewise.
> > 	* gcc.target/i386/cet-property-1.c: Likewise.
> > 	* gcc.target/i386/cet-property-2.c: Likewise.
> > 	* gcc.target/i386/cet-rdssp-1.c: Likewise.
> > 	* gcc.target/i386/cet-sjlj-1.c: Likewise.
> > 	* gcc.target/i386/cet-sjlj-2.c: Likewise.
> > 	* gcc.target/i386/cet-sjlj-3.c: Likewise.
> > 	* gcc.target/i386/cet-switch-1.c: Likewise.
> > 	* gcc.target/i386/cet-switch-2.c: Likewise.
> > 	* lib/target-supports.exp (check_effective_target_cet): New
> > 	proc.
> Whoops.  NEvermind my previous comment about x86 specific tests.  I
> should have scanned the whole kit before starting to comment on the earlier
> patches.
> 
> Uros will have the say on the x86 specific bits.  Given it's been 3 weeks, you
> might want to ping him directly to start getting his feedback.

Thanks, Jeff. Whom should I ping for other patches review, which are related compiler libraries like libgcc and other target libraries?

Igor

> jeff

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
  2017-10-24 15:37               ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Rainer Orth
@ 2017-10-24 16:04                 ` Uros Bizjak
  0 siblings, 0 replies; 17+ messages in thread
From: Uros Bizjak @ 2017-10-24 16:04 UTC (permalink / raw)
  To: Rainer Orth; +Cc: Tsimbalist, Igor V, gcc-patches

On Tue, Oct 24, 2017 at 5:35 PM, Rainer Orth
<ro@cebitec.uni-bielefeld.de> wrote:
> Uros Bizjak <ubizjak@gmail.com> writes:
>
>> On Fri, Oct 13, 2017 at 12:56 PM, Tsimbalist, Igor V
>> <igor.v.tsimbalist@intel.com> wrote:
>>>> -----Original Message-----
>>>> From: Uros Bizjak [mailto:ubizjak@gmail.com]
>>>> Sent: Friday, October 13, 2017 10:02 AM
>>>> To: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>
>>>> Cc: gcc-patches@gcc.gnu.org
>>>> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
>>>>
>>>> On Thu, Oct 12, 2017 at 8:54 PM, Tsimbalist, Igor V
>>>> <igor.v.tsimbalist@intel.com> wrote:
>>>> > Attached is an updated patch according to your comments. New tests are
>>>> > added to test ICF optimization in presence of nocf_check attribute.
>>>> --- a/gcc/testsuite/c-c++-common/fcf-protection-2.c
>>>> +++ b/gcc/testsuite/c-c++-common/fcf-protection-2.c
>>>> @@ -1,4 +1,4 @@
>>>>  /* { dg-do compile } */
>>>>  /* { dg-options "-fcf-protection=branch" } */
>>>> -/* { dg-error "'-fcf-protection=branch' is not supported for this
>>>> target" "" {
>>>> target { "i?86-*-* x86_64-*-*" } } 0 } */
>>>> +/* { dg-error "'-fcf-protection=branch' requires CET support on this
>>>> target. Use -mcet or one of -mibt, -mshstk options to enable CET" "" {
>>>> target {
>>>> "i?86-*-* x86_64-*-*" } } 0 } */
>>>>
>>>> Checking for "-fcf-protection=branch' requires CET support on this target"
>>>> should be enough. No need to check the whole message here and in other
>>>> tests.
>>>
>>> Fixed as you suggested. Also shortened the checking string for ignoring the
>>> attribute in attr-nocf-check-1.c and attr-nocf-check-3.c.
>>>
>>>>  /* { dg-error "'-fcf-protection=branch' is not supported for this
>>>> target" "" {
>>>> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git a/gcc/testsuite/c-c++-
>>>> common/fcf-protection-3.c
>>>> b/gcc/testsuite/c-c++-common/fcf-protection-3.c
>>>>
>>>>
>>>> --- a/gcc/testsuite/c-c++-common/fcf-protection-4.c
>>>> +++ b/gcc/testsuite/c-c++-common/fcf-protection-4.c
>>>> @@ -1,4 +1,4 @@
>>>>  /* { dg-do compile } */
>>>>  /* { dg-options "-fcf-protection=none" } */
>>>> -/* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" {
>>>> target { "i?86-*-* x86_64-*-*" } } 0 } */
>>>> +/* { dg-bogus "'-fcf-protection=none' res CET support on this target.
>>>> Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target {
>>>> "i?86-
>>>> *-* x86_64-*-*" } } 0 } */
>>>>  /* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" {
>>>> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git a/gcc/testsuite/c-c++-
>>>> common/fcf-protection-5.c
>>>> b/gcc/testsuite/c-c++-common/fcf-protection-5.c
>>>>
>>>> The above test checks for bogus messages? -fcf-protection=none option
>>>> should not generate any messages. So, the test should check that -fcf-
>>>> protection=none doesn't generate any error. (And, there is a typo in the
>>>> message, /s/res/requires.)
>>>
>>> The gcc documentation says about dg-bogus
>>>
>>> This DejaGnu directive appears on a source line that should not get a message
>>> matching regexp...
>>>
>>> I decided to use dg-bogus to check the absence of the error. Now I
>>> removed both
>>> lines as any additional messages should be caught as an extra
>>> messages. Actually
>>> I will update the fcf-protection-4.c test in the generic patch.
>>>
>>> Updated patch is attached.
>>
>> OK.
>
> The new cet effective-target keyword needs documenting in
> sourcebuild.texi, as usual.
>
> Besides, the gcc.target/i386/cet-sjlj-3.c test FAILs on Solaris/x86 and
> FreeBSD:
>
> FAIL: gcc.target/i386/cet-sjlj-3.c scan-assembler-times call\\t_setjmp 1 (found 0 times)
>
> On Solaris, this happens because USER_LABEL_PREFIX is empty.  The
> following patch accounts for that.
>
> Tested with the appropriate runtest invocation on i386-pc-solaris2.11
> and x86_64-pc-linux-gnu.  Ok for mainline?
>
>         Rainer
>
> --
> -----------------------------------------------------------------------------
> Rainer Orth, Center for Biotechnology, Bielefeld University
>
>
> 2017-10-24  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
>
>         * gcc.target/i386/cet-sjlj-3.c: Allow for emtpy user label prefix
>         in setjmp call.

OK.

Thanks,
Uros.

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
  2017-10-13 12:01             ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Uros Bizjak
@ 2017-10-24 15:37               ` Rainer Orth
  2017-10-24 16:04                 ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Uros Bizjak
  0 siblings, 1 reply; 17+ messages in thread
From: Rainer Orth @ 2017-10-24 15:37 UTC (permalink / raw)
  To: Uros Bizjak; +Cc: Tsimbalist, Igor V, gcc-patches

[-- Attachment #1: Type: text/plain, Size: 4039 bytes --]

Uros Bizjak <ubizjak@gmail.com> writes:

> On Fri, Oct 13, 2017 at 12:56 PM, Tsimbalist, Igor V
> <igor.v.tsimbalist@intel.com> wrote:
>>> -----Original Message-----
>>> From: Uros Bizjak [mailto:ubizjak@gmail.com]
>>> Sent: Friday, October 13, 2017 10:02 AM
>>> To: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>
>>> Cc: gcc-patches@gcc.gnu.org
>>> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
>>>
>>> On Thu, Oct 12, 2017 at 8:54 PM, Tsimbalist, Igor V
>>> <igor.v.tsimbalist@intel.com> wrote:
>>> > Attached is an updated patch according to your comments. New tests are
>>> > added to test ICF optimization in presence of nocf_check attribute.
>>> --- a/gcc/testsuite/c-c++-common/fcf-protection-2.c
>>> +++ b/gcc/testsuite/c-c++-common/fcf-protection-2.c
>>> @@ -1,4 +1,4 @@
>>>  /* { dg-do compile } */
>>>  /* { dg-options "-fcf-protection=branch" } */
>>> -/* { dg-error "'-fcf-protection=branch' is not supported for this
>>> target" "" {
>>> target { "i?86-*-* x86_64-*-*" } } 0 } */
>>> +/* { dg-error "'-fcf-protection=branch' requires CET support on this
>>> target. Use -mcet or one of -mibt, -mshstk options to enable CET" "" {
>>> target {
>>> "i?86-*-* x86_64-*-*" } } 0 } */
>>>
>>> Checking for "-fcf-protection=branch' requires CET support on this target"
>>> should be enough. No need to check the whole message here and in other
>>> tests.
>>
>> Fixed as you suggested. Also shortened the checking string for ignoring the
>> attribute in attr-nocf-check-1.c and attr-nocf-check-3.c.
>>
>>>  /* { dg-error "'-fcf-protection=branch' is not supported for this
>>> target" "" {
>>> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git a/gcc/testsuite/c-c++-
>>> common/fcf-protection-3.c
>>> b/gcc/testsuite/c-c++-common/fcf-protection-3.c
>>>
>>>
>>> --- a/gcc/testsuite/c-c++-common/fcf-protection-4.c
>>> +++ b/gcc/testsuite/c-c++-common/fcf-protection-4.c
>>> @@ -1,4 +1,4 @@
>>>  /* { dg-do compile } */
>>>  /* { dg-options "-fcf-protection=none" } */
>>> -/* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" {
>>> target { "i?86-*-* x86_64-*-*" } } 0 } */
>>> +/* { dg-bogus "'-fcf-protection=none' res CET support on this target.
>>> Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target {
>>> "i?86-
>>> *-* x86_64-*-*" } } 0 } */
>>>  /* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" {
>>> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git a/gcc/testsuite/c-c++-
>>> common/fcf-protection-5.c
>>> b/gcc/testsuite/c-c++-common/fcf-protection-5.c
>>>
>>> The above test checks for bogus messages? -fcf-protection=none option
>>> should not generate any messages. So, the test should check that -fcf-
>>> protection=none doesn't generate any error. (And, there is a typo in the
>>> message, /s/res/requires.)
>>
>> The gcc documentation says about dg-bogus
>>
>> This DejaGnu directive appears on a source line that should not get a message
>> matching regexp...
>>
>> I decided to use dg-bogus to check the absence of the error. Now I
>> removed both
>> lines as any additional messages should be caught as an extra
>> messages. Actually
>> I will update the fcf-protection-4.c test in the generic patch.
>>
>> Updated patch is attached.
>
> OK.

The new cet effective-target keyword needs documenting in
sourcebuild.texi, as usual.

Besides, the gcc.target/i386/cet-sjlj-3.c test FAILs on Solaris/x86 and
FreeBSD:

FAIL: gcc.target/i386/cet-sjlj-3.c scan-assembler-times call\\t_setjmp 1 (found 0 times)

On Solaris, this happens because USER_LABEL_PREFIX is empty.  The
following patch accounts for that.

Tested with the appropriate runtest invocation on i386-pc-solaris2.11
and x86_64-pc-linux-gnu.  Ok for mainline?

	Rainer

-- 
-----------------------------------------------------------------------------
Rainer Orth, Center for Biotechnology, Bielefeld University


2017-10-24  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* gcc.target/i386/cet-sjlj-3.c: Allow for emtpy user label prefix
	in setjmp call.


[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: testsuite-i386-cet-sjlj-3.patch --]
[-- Type: text/x-patch, Size: 742 bytes --]

# HG changeset patch
# Parent  c00d342bbb5c474b5b0be8c7311107ad56a76edd
Fix gcc.target/i386/cet-sjlj-3.c on Solaris

diff --git a/gcc/testsuite/gcc.target/i386/cet-sjlj-3.c b/gcc/testsuite/gcc.target/i386/cet-sjlj-3.c
--- a/gcc/testsuite/gcc.target/i386/cet-sjlj-3.c
+++ b/gcc/testsuite/gcc.target/i386/cet-sjlj-3.c
@@ -2,7 +2,7 @@
 /* { dg-options "-O -fcf-protection -mcet" } */
 /* { dg-final { scan-assembler-times "endbr32" 4 { target ia32 } } } */
 /* { dg-final { scan-assembler-times "endbr64" 4 { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler-times "call	_setjmp" 1 } } */
+/* { dg-final { scan-assembler-times "call	_?setjmp" 1 } } */
 /* { dg-final { scan-assembler-times "call	longjmp" 1 } } */
 
 #include <stdio.h>

^ permalink raw reply	[flat|nested] 17+ messages in thread

* RE: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
  2017-10-22 11:58             ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Andreas Schwab
@ 2017-10-22 17:39               ` Tsimbalist, Igor V
  0 siblings, 0 replies; 17+ messages in thread
From: Tsimbalist, Igor V @ 2017-10-22 17:39 UTC (permalink / raw)
  To: Andreas Schwab; +Cc: Uros Bizjak, gcc-patches, Tsimbalist, Igor V

I moved the tests to gcc.target/i386 directory and committed the changes.

Igor


> -----Original Message-----
> From: Andreas Schwab [mailto:schwab@linux-m68k.org]
> Sent: Sunday, October 22, 2017 1:41 PM
> To: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>
> Cc: Uros Bizjak <ubizjak@gmail.com>; gcc-patches@gcc.gnu.org
> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> 
> FAIL: c-c++-common/attr-nocf-check-1a.c  -Wc++-compat   (test for
> warnings, lin\
> e 17)
> FAIL: c-c++-common/attr-nocf-check-1a.c  -Wc++-compat  (test for excess
> errors)
> Excess errors:
> xgcc: error: unrecognized command line option '-mcet'
> FAIL: c-c++-common/attr-nocf-check-3a.c  -Wc++-compat   (test for
> warnings, line 15)
> FAIL: c-c++-common/attr-nocf-check-3a.c  -Wc++-compat   (test for
> warnings, line 25)
> FAIL: c-c++-common/attr-nocf-check-3a.c  -Wc++-compat  (test for excess
> errors)
> Excess errors:
> xgcc: error: unrecognized command line option '-mcet'
> 
> Andreas.
> 
> --
> Andreas Schwab, schwab@linux-m68k.org
> GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
> "And now for something completely different."

^ permalink raw reply	[flat|nested] 17+ messages in thread

* RE: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
  2017-10-22 12:26             ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation H.J. Lu
@ 2017-10-22 14:14               ` Tsimbalist, Igor V
  0 siblings, 0 replies; 17+ messages in thread
From: Tsimbalist, Igor V @ 2017-10-22 14:14 UTC (permalink / raw)
  To: H.J. Lu; +Cc: Uros Bizjak, gcc-patches, Tsimbalist, Igor V

Those 2 tests were removed during reviewing as they tested __builtin versions. ChangeLog was not updated.

Igor


> -----Original Message-----
> From: H.J. Lu [mailto:hjl.tools@gmail.com]
> Sent: Sunday, October 22, 2017 1:59 PM
> To: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>
> Cc: Uros Bizjak <ubizjak@gmail.com>; gcc-patches@gcc.gnu.org
> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> 
> On Fri, Oct 13, 2017 at 3:56 AM, Tsimbalist, Igor V
> <igor.v.tsimbalist@intel.com> wrote:
> >> -----Original Message-----
> >> From: Uros Bizjak [mailto:ubizjak@gmail.com]
> >> Sent: Friday, October 13, 2017 10:02 AM
> >> To: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>
> >> Cc: gcc-patches@gcc.gnu.org
> >> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> >>
> >> On Thu, Oct 12, 2017 at 8:54 PM, Tsimbalist, Igor V
> >> <igor.v.tsimbalist@intel.com> wrote:
> >> > Attached is an updated patch according to your comments. New tests
> are
> >> > added to test ICF optimization in presence of nocf_check attribute.
> >> --- a/gcc/testsuite/c-c++-common/fcf-protection-2.c
> >> +++ b/gcc/testsuite/c-c++-common/fcf-protection-2.c
> >> @@ -1,4 +1,4 @@
> >>  /* { dg-do compile } */
> >>  /* { dg-options "-fcf-protection=branch" } */
> >> -/* { dg-error "'-fcf-protection=branch' is not supported for this target" ""
> {
> >> target { "i?86-*-* x86_64-*-*" } } 0 } */
> >> +/* { dg-error "'-fcf-protection=branch' requires CET support on this
> >> target. Use -mcet or one of -mibt, -mshstk options to enable CET" "" {
> target {
> >> "i?86-*-* x86_64-*-*" } } 0 } */
> >>
> >> Checking for "-fcf-protection=branch' requires CET support on this target"
> >> should be enough. No need to check the whole message here and in
> other
> >> tests.
> >
> > Fixed as you suggested. Also shortened the checking string for ignoring the
> > attribute in attr-nocf-check-1.c and attr-nocf-check-3.c.
> >
> >>  /* { dg-error "'-fcf-protection=branch' is not supported for this target" ""
> {
> >> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git a/gcc/testsuite/c-c++-
> >> common/fcf-protection-3.c
> >> b/gcc/testsuite/c-c++-common/fcf-protection-3.c
> >>
> >>
> >> --- a/gcc/testsuite/c-c++-common/fcf-protection-4.c
> >> +++ b/gcc/testsuite/c-c++-common/fcf-protection-4.c
> >> @@ -1,4 +1,4 @@
> >>  /* { dg-do compile } */
> >>  /* { dg-options "-fcf-protection=none" } */
> >> -/* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" {
> >> target { "i?86-*-* x86_64-*-*" } } 0 } */
> >> +/* { dg-bogus "'-fcf-protection=none' res CET support on this target.
> >> Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target {
> "i?86-
> >> *-* x86_64-*-*" } } 0 } */
> >>  /* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" {
> >> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git a/gcc/testsuite/c-c++-
> >> common/fcf-protection-5.c
> >> b/gcc/testsuite/c-c++-common/fcf-protection-5.c
> >>
> >> The above test checks for bogus messages? -fcf-protection=none option
> >> should not generate any messages. So, the test should check that -fcf-
> >> protection=none doesn't generate any error. (And, there is a typo in the
> >> message, /s/res/requires.)
> >
> > The gcc documentation says about dg-bogus
> >
> > This DejaGnu directive appears on a source line that should not get a
> message
> > matching regexp...
> >
> > I decided to use dg-bogus to check the absence of the error. Now I
> removed both
> > lines as any additional messages should be caught as an extra messages.
> Actually
> > I will update the fcf-protection-4.c test in the generic patch.
> >
> > Updated patch is attached.
> >
> 
> ChangeLog has
> 
> * gcc.target/i386/cet-intrin-1.c: Likewise.
> * gcc.target/i386/cet-intrin-10.c: Likewise.
> * gcc.target/i386/cet-intrin-2.c: Likewise.
> * gcc.target/i386/cet-intrin-3.c: Likewise.
> * gcc.target/i386/cet-intrin-4.c: Likewise.
> * gcc.target/i386/cet-intrin-5.c: Likewise.
> * gcc.target/i386/cet-intrin-6.c: Likewise.
> * gcc.target/i386/cet-intrin-7.c: Likewise.
> * gcc.target/i386/cet-intrin-8.c: Likewise.
> * gcc.target/i386/cet-intrin-9.c: Likewise.
> 
> But there are no gcc.target/i386/cet-intrin-1.c nor
> gcc.target/i386/cet-intrin-2.c.
> 
> 
> --
> H.J.

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
  2017-10-13 11:01           ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
  2017-10-13 12:01             ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Uros Bizjak
  2017-10-22 11:58             ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Andreas Schwab
@ 2017-10-22 12:26             ` H.J. Lu
  2017-10-22 14:14               ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
  2 siblings, 1 reply; 17+ messages in thread
From: H.J. Lu @ 2017-10-22 12:26 UTC (permalink / raw)
  To: Tsimbalist, Igor V; +Cc: Uros Bizjak, gcc-patches

On Fri, Oct 13, 2017 at 3:56 AM, Tsimbalist, Igor V
<igor.v.tsimbalist@intel.com> wrote:
>> -----Original Message-----
>> From: Uros Bizjak [mailto:ubizjak@gmail.com]
>> Sent: Friday, October 13, 2017 10:02 AM
>> To: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>
>> Cc: gcc-patches@gcc.gnu.org
>> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
>>
>> On Thu, Oct 12, 2017 at 8:54 PM, Tsimbalist, Igor V
>> <igor.v.tsimbalist@intel.com> wrote:
>> > Attached is an updated patch according to your comments. New tests are
>> > added to test ICF optimization in presence of nocf_check attribute.
>> --- a/gcc/testsuite/c-c++-common/fcf-protection-2.c
>> +++ b/gcc/testsuite/c-c++-common/fcf-protection-2.c
>> @@ -1,4 +1,4 @@
>>  /* { dg-do compile } */
>>  /* { dg-options "-fcf-protection=branch" } */
>> -/* { dg-error "'-fcf-protection=branch' is not supported for this target" "" {
>> target { "i?86-*-* x86_64-*-*" } } 0 } */
>> +/* { dg-error "'-fcf-protection=branch' requires CET support on this
>> target. Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target {
>> "i?86-*-* x86_64-*-*" } } 0 } */
>>
>> Checking for "-fcf-protection=branch' requires CET support on this target"
>> should be enough. No need to check the whole message here and in other
>> tests.
>
> Fixed as you suggested. Also shortened the checking string for ignoring the
> attribute in attr-nocf-check-1.c and attr-nocf-check-3.c.
>
>>  /* { dg-error "'-fcf-protection=branch' is not supported for this target" "" {
>> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git a/gcc/testsuite/c-c++-
>> common/fcf-protection-3.c
>> b/gcc/testsuite/c-c++-common/fcf-protection-3.c
>>
>>
>> --- a/gcc/testsuite/c-c++-common/fcf-protection-4.c
>> +++ b/gcc/testsuite/c-c++-common/fcf-protection-4.c
>> @@ -1,4 +1,4 @@
>>  /* { dg-do compile } */
>>  /* { dg-options "-fcf-protection=none" } */
>> -/* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" {
>> target { "i?86-*-* x86_64-*-*" } } 0 } */
>> +/* { dg-bogus "'-fcf-protection=none' res CET support on this target.
>> Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target { "i?86-
>> *-* x86_64-*-*" } } 0 } */
>>  /* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" {
>> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git a/gcc/testsuite/c-c++-
>> common/fcf-protection-5.c
>> b/gcc/testsuite/c-c++-common/fcf-protection-5.c
>>
>> The above test checks for bogus messages? -fcf-protection=none option
>> should not generate any messages. So, the test should check that -fcf-
>> protection=none doesn't generate any error. (And, there is a typo in the
>> message, /s/res/requires.)
>
> The gcc documentation says about dg-bogus
>
> This DejaGnu directive appears on a source line that should not get a message
> matching regexp...
>
> I decided to use dg-bogus to check the absence of the error. Now I removed both
> lines as any additional messages should be caught as an extra messages. Actually
> I will update the fcf-protection-4.c test in the generic patch.
>
> Updated patch is attached.
>

ChangeLog has

* gcc.target/i386/cet-intrin-1.c: Likewise.
* gcc.target/i386/cet-intrin-10.c: Likewise.
* gcc.target/i386/cet-intrin-2.c: Likewise.
* gcc.target/i386/cet-intrin-3.c: Likewise.
* gcc.target/i386/cet-intrin-4.c: Likewise.
* gcc.target/i386/cet-intrin-5.c: Likewise.
* gcc.target/i386/cet-intrin-6.c: Likewise.
* gcc.target/i386/cet-intrin-7.c: Likewise.
* gcc.target/i386/cet-intrin-8.c: Likewise.
* gcc.target/i386/cet-intrin-9.c: Likewise.

But there are no gcc.target/i386/cet-intrin-1.c nor
gcc.target/i386/cet-intrin-2.c.


-- 
H.J.

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
  2017-10-13 11:01           ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
  2017-10-13 12:01             ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Uros Bizjak
@ 2017-10-22 11:58             ` Andreas Schwab
  2017-10-22 17:39               ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
  2017-10-22 12:26             ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation H.J. Lu
  2 siblings, 1 reply; 17+ messages in thread
From: Andreas Schwab @ 2017-10-22 11:58 UTC (permalink / raw)
  To: Tsimbalist, Igor V; +Cc: Uros Bizjak, gcc-patches

FAIL: c-c++-common/attr-nocf-check-1a.c  -Wc++-compat   (test for warnings, lin\
e 17)
FAIL: c-c++-common/attr-nocf-check-1a.c  -Wc++-compat  (test for excess errors)
Excess errors:
xgcc: error: unrecognized command line option '-mcet'
FAIL: c-c++-common/attr-nocf-check-3a.c  -Wc++-compat   (test for warnings, line 15)
FAIL: c-c++-common/attr-nocf-check-3a.c  -Wc++-compat   (test for warnings, line 25)
FAIL: c-c++-common/attr-nocf-check-3a.c  -Wc++-compat  (test for excess errors)
Excess errors:
xgcc: error: unrecognized command line option '-mcet'

Andreas.

-- 
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
"And now for something completely different."

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
  2017-10-13 11:01           ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
@ 2017-10-13 12:01             ` Uros Bizjak
  2017-10-24 15:37               ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Rainer Orth
  2017-10-22 11:58             ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Andreas Schwab
  2017-10-22 12:26             ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation H.J. Lu
  2 siblings, 1 reply; 17+ messages in thread
From: Uros Bizjak @ 2017-10-13 12:01 UTC (permalink / raw)
  To: Tsimbalist, Igor V; +Cc: gcc-patches

On Fri, Oct 13, 2017 at 12:56 PM, Tsimbalist, Igor V
<igor.v.tsimbalist@intel.com> wrote:
>> -----Original Message-----
>> From: Uros Bizjak [mailto:ubizjak@gmail.com]
>> Sent: Friday, October 13, 2017 10:02 AM
>> To: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>
>> Cc: gcc-patches@gcc.gnu.org
>> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
>>
>> On Thu, Oct 12, 2017 at 8:54 PM, Tsimbalist, Igor V
>> <igor.v.tsimbalist@intel.com> wrote:
>> > Attached is an updated patch according to your comments. New tests are
>> > added to test ICF optimization in presence of nocf_check attribute.
>> --- a/gcc/testsuite/c-c++-common/fcf-protection-2.c
>> +++ b/gcc/testsuite/c-c++-common/fcf-protection-2.c
>> @@ -1,4 +1,4 @@
>>  /* { dg-do compile } */
>>  /* { dg-options "-fcf-protection=branch" } */
>> -/* { dg-error "'-fcf-protection=branch' is not supported for this target" "" {
>> target { "i?86-*-* x86_64-*-*" } } 0 } */
>> +/* { dg-error "'-fcf-protection=branch' requires CET support on this
>> target. Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target {
>> "i?86-*-* x86_64-*-*" } } 0 } */
>>
>> Checking for "-fcf-protection=branch' requires CET support on this target"
>> should be enough. No need to check the whole message here and in other
>> tests.
>
> Fixed as you suggested. Also shortened the checking string for ignoring the
> attribute in attr-nocf-check-1.c and attr-nocf-check-3.c.
>
>>  /* { dg-error "'-fcf-protection=branch' is not supported for this target" "" {
>> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git a/gcc/testsuite/c-c++-
>> common/fcf-protection-3.c
>> b/gcc/testsuite/c-c++-common/fcf-protection-3.c
>>
>>
>> --- a/gcc/testsuite/c-c++-common/fcf-protection-4.c
>> +++ b/gcc/testsuite/c-c++-common/fcf-protection-4.c
>> @@ -1,4 +1,4 @@
>>  /* { dg-do compile } */
>>  /* { dg-options "-fcf-protection=none" } */
>> -/* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" {
>> target { "i?86-*-* x86_64-*-*" } } 0 } */
>> +/* { dg-bogus "'-fcf-protection=none' res CET support on this target.
>> Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target { "i?86-
>> *-* x86_64-*-*" } } 0 } */
>>  /* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" {
>> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git a/gcc/testsuite/c-c++-
>> common/fcf-protection-5.c
>> b/gcc/testsuite/c-c++-common/fcf-protection-5.c
>>
>> The above test checks for bogus messages? -fcf-protection=none option
>> should not generate any messages. So, the test should check that -fcf-
>> protection=none doesn't generate any error. (And, there is a typo in the
>> message, /s/res/requires.)
>
> The gcc documentation says about dg-bogus
>
> This DejaGnu directive appears on a source line that should not get a message
> matching regexp...
>
> I decided to use dg-bogus to check the absence of the error. Now I removed both
> lines as any additional messages should be caught as an extra messages. Actually
> I will update the fcf-protection-4.c test in the generic patch.
>
> Updated patch is attached.

OK.

Thanks,
Uros.

^ permalink raw reply	[flat|nested] 17+ messages in thread

* RE: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
  2017-10-13  9:10         ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Uros Bizjak
@ 2017-10-13 11:01           ` Tsimbalist, Igor V
  2017-10-13 12:01             ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Uros Bizjak
                               ` (2 more replies)
  0 siblings, 3 replies; 17+ messages in thread
From: Tsimbalist, Igor V @ 2017-10-13 11:01 UTC (permalink / raw)
  To: Uros Bizjak; +Cc: gcc-patches, Tsimbalist, Igor V

[-- Attachment #1: Type: text/plain, Size: 9275 bytes --]

> -----Original Message-----
> From: Uros Bizjak [mailto:ubizjak@gmail.com]
> Sent: Friday, October 13, 2017 10:02 AM
> To: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> 
> On Thu, Oct 12, 2017 at 8:54 PM, Tsimbalist, Igor V
> <igor.v.tsimbalist@intel.com> wrote:
> > Attached is an updated patch according to your comments. New tests are
> > added to test ICF optimization in presence of nocf_check attribute.
> --- a/gcc/testsuite/c-c++-common/fcf-protection-2.c
> +++ b/gcc/testsuite/c-c++-common/fcf-protection-2.c
> @@ -1,4 +1,4 @@
>  /* { dg-do compile } */
>  /* { dg-options "-fcf-protection=branch" } */
> -/* { dg-error "'-fcf-protection=branch' is not supported for this target" "" {
> target { "i?86-*-* x86_64-*-*" } } 0 } */
> +/* { dg-error "'-fcf-protection=branch' requires CET support on this
> target. Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target {
> "i?86-*-* x86_64-*-*" } } 0 } */
> 
> Checking for "-fcf-protection=branch' requires CET support on this target"
> should be enough. No need to check the whole message here and in other
> tests.

Fixed as you suggested. Also shortened the checking string for ignoring the
attribute in attr-nocf-check-1.c and attr-nocf-check-3.c.

>  /* { dg-error "'-fcf-protection=branch' is not supported for this target" "" {
> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git a/gcc/testsuite/c-c++-
> common/fcf-protection-3.c
> b/gcc/testsuite/c-c++-common/fcf-protection-3.c
> 
> 
> --- a/gcc/testsuite/c-c++-common/fcf-protection-4.c
> +++ b/gcc/testsuite/c-c++-common/fcf-protection-4.c
> @@ -1,4 +1,4 @@
>  /* { dg-do compile } */
>  /* { dg-options "-fcf-protection=none" } */
> -/* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" {
> target { "i?86-*-* x86_64-*-*" } } 0 } */
> +/* { dg-bogus "'-fcf-protection=none' res CET support on this target.
> Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target { "i?86-
> *-* x86_64-*-*" } } 0 } */
>  /* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" {
> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git a/gcc/testsuite/c-c++-
> common/fcf-protection-5.c
> b/gcc/testsuite/c-c++-common/fcf-protection-5.c
> 
> The above test checks for bogus messages? -fcf-protection=none option
> should not generate any messages. So, the test should check that -fcf-
> protection=none doesn't generate any error. (And, there is a typo in the
> message, /s/res/requires.)

The gcc documentation says about dg-bogus

This DejaGnu directive appears on a source line that should not get a message
matching regexp...

I decided to use dg-bogus to check the absence of the error. Now I removed both
lines as any additional messages should be caught as an extra messages. Actually
I will update the fcf-protection-4.c test in the generic patch.

Updated patch is attached. 

Igor

> Uros.
> 
> > Igor
> >
> >
> >> -----Original Message-----
> >> From: Tsimbalist, Igor V
> >> Sent: Tuesday, September 19, 2017 11:30 PM
> >> To: Uros Bizjak <ubizjak@gmail.com>
> >> Cc: gcc-patches@gcc.gnu.org; Tsimbalist, Igor V
> >> <igor.v.tsimbalist@intel.com>
> >> Subject: RE: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> >>
> >> > -----Original Message-----
> >> > From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
> >> > owner@gcc.gnu.org] On Behalf Of Uros Bizjak
> >> > Sent: Tuesday, September 19, 2017 6:13 PM
> >> > To: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>
> >> > Cc: gcc-patches@gcc.gnu.org
> >> > Subject: Re:
> >> > 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> >> >
> >> > On Tue, Sep 19, 2017 at 5:18 PM, Tsimbalist, Igor V
> >> > <igor.v.tsimbalist@intel.com> wrote:
> >> > >> -----Original Message-----
> >> > >> From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
> >> > >> owner@gcc.gnu.org] On Behalf Of Uros Bizjak
> >> > >> Sent: Monday, September 18, 2017 12:17 PM
> >> > >> To: gcc-patches@gcc.gnu.org
> >> > >> Cc: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>;
> >> > >> Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>
> >> > >> Subject: Re:
> >> > >> 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> >> > >>
> >> > >> Hello!
> >> > >>
> >> > >> > gcc/testsuite/
> >> > >> >
> >> > >> > * g++.dg/cet-notrack-1.C: New test.
> >> > >> > * gcc.target/i386/cet-intrin-1.c: Likewise.
> >> > >> > * gcc.target/i386/cet-intrin-10.c: Likewise.
> >> > >> > * gcc.target/i386/cet-intrin-2.c: Likewise.
> >> > >> > * gcc.target/i386/cet-intrin-3.c: Likewise.
> >> > >> > * gcc.target/i386/cet-intrin-4.c: Likewise.
> >> > >> > * gcc.target/i386/cet-intrin-5.c: Likewise.
> >> > >> > * gcc.target/i386/cet-intrin-6.c: Likewise.
> >> > >> > * gcc.target/i386/cet-intrin-7.c: Likewise.
> >> > >> > * gcc.target/i386/cet-intrin-8.c: Likewise.
> >> > >> > * gcc.target/i386/cet-intrin-9.c: Likewise.
> >> > >> > * gcc.target/i386/cet-label.c: Likewise.
> >> > >> > * gcc.target/i386/cet-notrack-1a.c: Likewise.
> >> > >> > * gcc.target/i386/cet-notrack-1b.c: Likewise.
> >> > >> > * gcc.target/i386/cet-notrack-2a.c: Likewise.
> >> > >> > * gcc.target/i386/cet-notrack-2b.c: Likewise.
> >> > >> > * gcc.target/i386/cet-notrack-3.c: Likewise.
> >> > >> > * gcc.target/i386/cet-notrack-4a.c: Likewise.
> >> > >> > * gcc.target/i386/cet-notrack-4b.c: Likewise.
> >> > >> > * gcc.target/i386/cet-notrack-5a.c: Likewise.
> >> > >> > * gcc.target/i386/cet-notrack-5b.c: Likewise.
> >> > >> > * gcc.target/i386/cet-notrack-6a.c: Likewise.
> >> > >> > * gcc.target/i386/cet-notrack-6b.c: Likewise.
> >> > >> > * gcc.target/i386/cet-notrack-7.c: Likewise.
> >> > >> > * gcc.target/i386/cet-property-1.c: Likewise.
> >> > >> > * gcc.target/i386/cet-property-2.c: Likewise.
> >> > >> > * gcc.target/i386/cet-rdssp-1.c: Likewise.
> >> > >> > * gcc.target/i386/cet-sjlj-1.c: Likewise.
> >> > >> > * gcc.target/i386/cet-sjlj-2.c: Likewise.
> >> > >> > * gcc.target/i386/cet-sjlj-3.c: Likewise.
> >> > >> > * gcc.target/i386/cet-switch-1.c: Likewise.
> >> > >> > * gcc.target/i386/cet-switch-2.c: Likewise.
> >> > >> > * lib/target-supports.exp (check_effective_target_cet): New proc.
> >> > >>
> >> > >> A couple of questions:
> >> > >>
> >> > >> +/* { dg-do compile } */
> >> > >> +/* { dg-options "-O2 -mcet" } */
> >> > >> +/* { dg-final { scan-assembler-times "setssbsy" 2 } } */
> >> > >> +
> >> > >> +#include <immintrin.h>
> >> > >> +
> >> > >> +void f1 (void)
> >> > >> +{
> >> > >> +  __builtin_ia32_setssbsy ();
> >> > >> +}
> >> > >> +
> >> > >> +void f2 (void)
> >> > >> +{
> >> > >> +  _setssbsy ();
> >> > >> +}
> >> > >>
> >> > >> Is there a reason that both, __builtin and intrinsic versions
> >> > >> are tested in a couple of places? The intrinsic version is just
> >> > >> a wrapper for __builtin, so IMO testing intrinsic version should
> >> > >> be
> >> enough.
> >> > > No strong reason. Just to check that intrinsic names are
> >> > > recognized and
> >> > processed correctly.
> >> > > The implementation could change and the test will catch
> inconsistency.
> >> > > I would also assume a user will use intrinsics that's why I add
> >> > > intrinsic
> >> check.
> >> > Should I remove it?
> >> >
> >> > Actually, these __builtins are considered as implementation detail,
> >> > and their use should be discouraged. They are deliberately not
> >> > documented, and users should use intrinsic headers instead. That
> >> > said, builtins won't change without a reason, since Ada needs them.
> >> >
> >> > It can happen that the test fails due to change of intrinsics, so
> >> > I'd recommend to remove them.
> >> Ok, I will remove intrinsic.
> >>
> >> > >> diff --git a/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
> >> > >> b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
> >> > >> new file mode 100644
> >> > >> index 0000000..f9223a5
> >> > >> --- /dev/null
> >> > >> +++ b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
> >> > >> @@ -0,0 +1,39 @@
> >> > >> +/* { dg-do run { target cet } } */
> >> > >> +/* { dg-options "-O2 -finstrument-control-flow -mcet" } */
> >> > >>
> >> > >> The "target cet" directive just checks that CET instructions can
> >> > >> be
> >> > compiled.
> >> > >> The test will (probably?) fail on targets with binutils that can
> >> > >> compile CET instructions, but the target itself doesn't support CET.
> >> > >> If this is the case, then check header has to be introduced, so
> >> > >> the test can be bypassed on targets without runtime support.
> >> > > The test will not fail even if a target doesn't support CET as 'rdssp'
> >> > > instruction is a NOP on such target and further usage of CET
> >> > > instruction is bypassed. In this case the code
> >> > >
> >> > > +  ssp = rdssp (ssp);
> >> > >
> >> > > Will keep ssp as 0.
> >> >
> >> > I assume that this is true also for other runtime tests, and this
> >> > clears my concern about runtime failures with updated binutils.
> >> Yes, that's true for other runtime tests.
> >>
> >> Igor
> >>
> >> >
> >> > Uros.

[-- Attachment #2: 0006-Add-x86-tests-for-Intel-CET-implementation.patch --]
[-- Type: application/octet-stream, Size: 41530 bytes --]

From d517ee71f516acc637dba0ac3805047eddb250e1 Mon Sep 17 00:00:00 2001
From: Igor Tsimbalist <igor.v.tsimbalist@intel.com>
Date: Fri, 21 Jul 2017 19:40:40 +0300
Subject: [PATCH 06/22] Add x86 tests for Intel CET implementation.

gcc/testsuite/
	* c-c++-common/attr-nocf-check-1.c: Shorten a cheking message.
	* c-c++-common/attr-nocf-check-3.c: Likewise.
	* c-c++-common/fcf-protection-1.c: Add x86 specific message.
	* c-c++-common/fcf-protection-2.c: Likewise.
	* c-c++-common/fcf-protection-3.c: Likewise.
	* c-c++-common/fcf-protection-5.c: Likewise.
	* c-c++-common/attr-nocf-check-1a.c: New test.
	* c-c++-common/attr-nocf-check-3a.c: Likewise.
	* g++.dg/cet-notrack-1.C: Likewise.
	* gcc.target/i386/cet-intrin-1.c: Likewise.
	* gcc.target/i386/cet-intrin-10.c: Likewise.
	* gcc.target/i386/cet-intrin-2.c: Likewise.
	* gcc.target/i386/cet-intrin-3.c: Likewise.
	* gcc.target/i386/cet-intrin-4.c: Likewise.
	* gcc.target/i386/cet-intrin-5.c: Likewise.
	* gcc.target/i386/cet-intrin-6.c: Likewise.
	* gcc.target/i386/cet-intrin-7.c: Likewise.
	* gcc.target/i386/cet-intrin-8.c: Likewise.
	* gcc.target/i386/cet-intrin-9.c: Likewise.
	* gcc.target/i386/cet-label.c: Likewise.
	* gcc.target/i386/cet-notrack-1a.c: Likewise.
	* gcc.target/i386/cet-notrack-1b.c: Likewise.
	* gcc.target/i386/cet-notrack-2a.c: Likewise.
	* gcc.target/i386/cet-notrack-2b.c: Likewise.
	* gcc.target/i386/cet-notrack-3.c: Likewise.
	* gcc.target/i386/cet-notrack-4a.c: Likewise.
	* gcc.target/i386/cet-notrack-4b.c: Likewise.
	* gcc.target/i386/cet-notrack-5a.c: Likewise.
	* gcc.target/i386/cet-notrack-5b.c: Likewise.
	* gcc.target/i386/cet-notrack-6a.c: Likewise.
	* gcc.target/i386/cet-notrack-6b.c: Likewise.
	* gcc.target/i386/cet-notrack-7.c: Likewise.
	* gcc.target/i386/cet-property-1.c: Likewise.
	* gcc.target/i386/cet-property-2.c: Likewise.
	* gcc.target/i386/cet-rdssp-1.c: Likewise.
	* gcc.target/i386/cet-sjlj-1.c: Likewise.
	* gcc.target/i386/cet-sjlj-2.c: Likewise.
	* gcc.target/i386/cet-sjlj-3.c: Likewise.
	* gcc.target/i386/cet-switch-1.c: Likewise.
	* gcc.target/i386/cet-switch-2.c: Likewise.
	* lib/target-supports.exp (check_effective_target_cet): New
	proc.
---
 gcc/testsuite/c-c++-common/attr-nocf-check-1.c    | 10 ++---
 gcc/testsuite/c-c++-common/attr-nocf-check-1a.c   | 32 ++++++++++++++++
 gcc/testsuite/c-c++-common/attr-nocf-check-3.c    |  4 +-
 gcc/testsuite/c-c++-common/attr-nocf-check-3a.c   | 32 ++++++++++++++++
 gcc/testsuite/c-c++-common/fcf-protection-1.c     |  2 +-
 gcc/testsuite/c-c++-common/fcf-protection-2.c     |  2 +-
 gcc/testsuite/c-c++-common/fcf-protection-3.c     |  2 +-
 gcc/testsuite/c-c++-common/fcf-protection-5.c     |  2 +-
 gcc/testsuite/g++.dg/cet-notrack-1.C              | 25 ++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-10.c     | 10 +++++
 gcc/testsuite/gcc.target/i386/cet-intrin-3.c      | 33 ++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-4.c      | 31 +++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-5.c      | 10 +++++
 gcc/testsuite/gcc.target/i386/cet-intrin-6.c      | 10 +++++
 gcc/testsuite/gcc.target/i386/cet-intrin-7.c      | 18 +++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-8.c      | 18 +++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-9.c      | 10 +++++
 gcc/testsuite/gcc.target/i386/cet-label.c         | 16 ++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-1a.c    | 22 +++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-1b.c    | 23 ++++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-2a.c    | 12 ++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-2b.c    | 12 ++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-3.c     | 14 +++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-4a.c    |  6 +++
 gcc/testsuite/gcc.target/i386/cet-notrack-4b.c    |  6 +++
 gcc/testsuite/gcc.target/i386/cet-notrack-5a.c    | 16 ++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-5b.c    | 21 +++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-6a.c    | 15 ++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-6b.c    | 15 ++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-7.c     | 15 ++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-icf-1.c | 31 +++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-icf-2.c | 30 +++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-icf-3.c | 36 ++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-icf-4.c | 35 +++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-property-1.c    | 11 ++++++
 gcc/testsuite/gcc.target/i386/cet-property-2.c    | 11 ++++++
 gcc/testsuite/gcc.target/i386/cet-rdssp-1.c       | 39 +++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-sjlj-1.c        | 42 +++++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-sjlj-2.c        |  4 ++
 gcc/testsuite/gcc.target/i386/cet-sjlj-3.c        | 46 +++++++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-switch-1.c      | 26 +++++++++++++
 gcc/testsuite/gcc.target/i386/cet-switch-2.c      | 26 +++++++++++++
 gcc/testsuite/lib/target-supports.exp             | 13 +++++++
 43 files changed, 783 insertions(+), 11 deletions(-)
 create mode 100644 gcc/testsuite/c-c++-common/attr-nocf-check-1a.c
 create mode 100644 gcc/testsuite/c-c++-common/attr-nocf-check-3a.c
 create mode 100644 gcc/testsuite/g++.dg/cet-notrack-1.C
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-10.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-4.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-5.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-6.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-7.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-8.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-9.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-label.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-1a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-1b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-2a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-2b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-4a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-4b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-5a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-5b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-6a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-6b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-7.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-icf-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-icf-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-icf-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-icf-4.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-property-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-property-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-sjlj-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-sjlj-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-sjlj-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-switch-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-switch-2.c

diff --git a/gcc/testsuite/c-c++-common/attr-nocf-check-1.c b/gcc/testsuite/c-c++-common/attr-nocf-check-1.c
index 62fa370..15f6973 100644
--- a/gcc/testsuite/c-c++-common/attr-nocf-check-1.c
+++ b/gcc/testsuite/c-c++-common/attr-nocf-check-1.c
@@ -1,8 +1,8 @@
 /* { dg-do compile } */
 
-int func (int) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
-int (*fptr) (int) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
-typedef void (*nocf_check_t) (void) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+int func (int) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored" } */
+int (*fptr) (int) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored" } */
+typedef void (*nocf_check_t) (void) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored" } */
 
 int
 foo1 (int arg)
@@ -13,7 +13,7 @@ foo1 (int arg)
 void
 foo2 (void (*foo) (void))
 {
-  void (*func) (void) __attribute__((nocf_check)) = foo; /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+  void (*func) (void) __attribute__((nocf_check)) = foo; /* { dg-warning "'nocf_check' attribute ignored" } */
   func ();
 }
 
@@ -24,7 +24,7 @@ foo3 (nocf_check_t foo)
 }
 
 void
-foo4 (void (*foo) (void) __attribute__((nocf_check))) /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+foo4 (void (*foo) (void) __attribute__((nocf_check))) /* { dg-warning "'nocf_check' attribute ignored" } */
 {
   foo ();
 }
diff --git a/gcc/testsuite/c-c++-common/attr-nocf-check-1a.c b/gcc/testsuite/c-c++-common/attr-nocf-check-1a.c
new file mode 100644
index 0000000..9549e69
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/attr-nocf-check-1a.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fcf-protection -mcet" } */
+
+int func (int) __attribute__ ((nocf_check));
+int (*fptr) (int) __attribute__ ((nocf_check));
+typedef void (*nocf_check_t) (void) __attribute__ ((nocf_check));
+
+int
+foo1 (int arg)
+{
+  return func (arg) + fptr (arg);
+}
+
+void
+foo2 (void (*foo) (void))
+{
+  void (*func) (void) __attribute__((nocf_check)) = foo; /* { dg-warning "incompatible pointer type" "" { target c } } */
+							 /* { dg-error "invalid conversion" "" { target c++ } .-1 } */
+  func ();
+}
+
+void
+foo3 (nocf_check_t foo)
+{
+  foo ();
+}
+
+void
+foo4 (void (*foo) (void) __attribute__((nocf_check)))
+{
+  foo ();
+}
diff --git a/gcc/testsuite/c-c++-common/attr-nocf-check-3.c b/gcc/testsuite/c-c++-common/attr-nocf-check-3.c
index c7d9c8f..ad1ca7e 100644
--- a/gcc/testsuite/c-c++-common/attr-nocf-check-3.c
+++ b/gcc/testsuite/c-c++-common/attr-nocf-check-3.c
@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 
-int  foo (void) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
-void (*foo1) (void) __attribute__((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+int  foo (void) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored" } */
+void (*foo1) (void) __attribute__((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored" } */
 void (*foo2) (void);
 
 int
diff --git a/gcc/testsuite/c-c++-common/attr-nocf-check-3a.c b/gcc/testsuite/c-c++-common/attr-nocf-check-3a.c
new file mode 100644
index 0000000..1a83301
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/attr-nocf-check-3a.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fcf-protection -mcet" } */
+
+int  foo (void) __attribute__ ((nocf_check));
+void (*foo1) (void) __attribute__((nocf_check));
+void (*foo2) (void);
+
+int __attribute__ ((nocf_check))
+foo (void) /* The function's address is not tracked.  */
+{
+  /* This call site is not tracked for
+     control-flow instrumentation.  */
+  (*foo1)();
+
+  foo1 = foo2; /* { dg-warning "incompatible pointer type" "" { target c } } */
+	       /* { dg-error "invalid conversion" "" { target c++ } .-1 } */
+  /* This call site is still not tracked for
+     control-flow instrumentation.  */
+  (*foo1)();
+
+  /* This call site is tracked for
+     control-flow instrumentation.  */
+  (*foo2)();
+
+  foo2 = foo1; /* { dg-warning "incompatible pointer type" "" { target c } } */
+	       /* { dg-error "invalid conversion" "" { target c++ } .-1 } */
+  /* This call site is still tracked for
+     control-flow instrumentation.  */
+  (*foo2)();
+
+  return 0;
+}
diff --git a/gcc/testsuite/c-c++-common/fcf-protection-1.c b/gcc/testsuite/c-c++-common/fcf-protection-1.c
index 6a27e19..2e9337c 100644
--- a/gcc/testsuite/c-c++-common/fcf-protection-1.c
+++ b/gcc/testsuite/c-c++-common/fcf-protection-1.c
@@ -1,4 +1,4 @@
 /* { dg-do compile } */
 /* { dg-options "-fcf-protection=full" } */
-/* { dg-error "'-fcf-protection=full' is not supported for this target" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
+/* { dg-error "'-fcf-protection=full' requires CET support on this target" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
 /* { dg-error "'-fcf-protection=full' is not supported for this target" "" { target { ! "i?86-*-* x86_64-*-*" } } 0 } */
diff --git a/gcc/testsuite/c-c++-common/fcf-protection-2.c b/gcc/testsuite/c-c++-common/fcf-protection-2.c
index 558f4c0..aa0d2a0 100644
--- a/gcc/testsuite/c-c++-common/fcf-protection-2.c
+++ b/gcc/testsuite/c-c++-common/fcf-protection-2.c
@@ -1,4 +1,4 @@
 /* { dg-do compile } */
 /* { dg-options "-fcf-protection=branch" } */
-/* { dg-error "'-fcf-protection=branch' is not supported for this target" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
+/* { dg-error "'-fcf-protection=branch' requires CET support on this target" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
 /* { dg-error "'-fcf-protection=branch' is not supported for this target" "" { target { ! "i?86-*-* x86_64-*-*" } } 0 } */
diff --git a/gcc/testsuite/c-c++-common/fcf-protection-3.c b/gcc/testsuite/c-c++-common/fcf-protection-3.c
index ffc7346..028775a 100644
--- a/gcc/testsuite/c-c++-common/fcf-protection-3.c
+++ b/gcc/testsuite/c-c++-common/fcf-protection-3.c
@@ -1,4 +1,4 @@
 /* { dg-do compile } */
 /* { dg-options "-fcf-protection=return" } */
-/* { dg-error "'-fcf-protection=return' is not supported for this target" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
+/* { dg-error "'-fcf-protection=return' requires CET support on this target" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
 /* { dg-error "'-fcf-protection=return' is not supported for this target" "" { target { ! "i?86-*-* x86_64-*-*" } } 0 } */
diff --git a/gcc/testsuite/c-c++-common/fcf-protection-5.c b/gcc/testsuite/c-c++-common/fcf-protection-5.c
index 2ea2ce0..a5f8e11 100644
--- a/gcc/testsuite/c-c++-common/fcf-protection-5.c
+++ b/gcc/testsuite/c-c++-common/fcf-protection-5.c
@@ -1,4 +1,4 @@
 /* { dg-do compile } */
 /* { dg-options "-fcf-protection" } */
-/* { dg-error "'-fcf-protection=full' is not supported for this target" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
+/* { dg-error "'-fcf-protection=full' requires CET support on this target" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
 /* { dg-error "'-fcf-protection=full' is not supported for this target" "" { target { ! "i?86-*-* x86_64-*-*" } } 0 } */
diff --git a/gcc/testsuite/g++.dg/cet-notrack-1.C b/gcc/testsuite/g++.dg/cet-notrack-1.C
new file mode 100644
index 0000000..43dbbd6
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cet-notrack-1.C
@@ -0,0 +1,25 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-fcf-protection -mcet" } */
+/* { dg-final { scan-assembler "endbr32|endbr64" } } */
+/* { dg-final { scan-assembler-times "\tcall\[ \t]+puts" 2 } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+#include <stdio.h>
+
+struct A {
+virtual int foo() __attribute__((nocf_check)) { return 42; }
+};
+
+struct B : A {
+int foo() __attribute__((nocf_check)) { return 73; }
+};
+
+int main() {
+B b;
+A& a = b;
+int (A::*amem) () __attribute__((nocf_check)) = &A::foo; // take address
+if ((a.*amem)() == 73) // use the address
+  printf("pass\n");
+else
+  printf("fail\n");
+return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-10.c b/gcc/testsuite/gcc.target/i386/cet-intrin-10.c
new file mode 100644
index 0000000..695dc5e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-10.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "clrssbsy" 1 } } */
+
+#include <immintrin.h>
+
+void f2 (void *__B)
+{
+  _clrssbsy (__B);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-3.c b/gcc/testsuite/gcc.target/i386/cet-intrin-3.c
new file mode 100644
index 0000000..bcd7203
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-3.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 2 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 4 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "rdsspd|incsspd\[ \t]+(%|)eax" { target ia32 } } } */
+/* { dg-final { scan-assembler "rdssp\[dq]\[ \t]+(%|)\[re]ax" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "incssp\[dq]\[ \t]+(%|)\[re]di" { target { ! ia32 } } } } */
+
+#include <immintrin.h>
+
+unsigned int f1 ()
+{
+  unsigned int x = 0;
+  return _rdsspd (x);
+}
+
+void f3 (unsigned int _a)
+{
+  _incsspd (_a);
+}
+
+#ifdef __x86_64__
+unsigned long long f2 ()
+{
+  unsigned long long x = 0;
+  return _rdsspq (x);
+}
+
+void f4 (unsigned int _a)
+{
+  _incsspq (_a);
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-4.c b/gcc/testsuite/gcc.target/i386/cet-intrin-4.c
new file mode 100644
index 0000000..76ec160
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-4.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mshstk" } */
+/* { dg-final { scan-assembler "rdsspd|incsspd\[ \t]+(%|)eax" { target ia32 } } } */
+/* { dg-final { scan-assembler "rdssp\[dq]\[ \t]+(%|)\[re]ax"  { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "incssp\[dq]\[ \t]+(%|)\[re]di" { target { ! ia32 } } } } */
+
+#include <immintrin.h>
+
+unsigned int f1 ()
+{
+  unsigned int x = 0;
+  return _rdsspd (x);
+}
+
+void f3 (unsigned int _a)
+{
+  _incsspd (_a);
+}
+
+#ifdef __x86_64__
+unsigned long long f2 ()
+{
+  unsigned long long x = 0;
+  return _rdsspq (x);
+}
+
+void f4 (unsigned int _a)
+{
+  _incsspq (_a);
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-5.c b/gcc/testsuite/gcc.target/i386/cet-intrin-5.c
new file mode 100644
index 0000000..8a1b637
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-5.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "saveprevssp" 1 } } */
+
+#include <immintrin.h>
+
+void f2 (void)
+{
+  _saveprevssp ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-6.c b/gcc/testsuite/gcc.target/i386/cet-intrin-6.c
new file mode 100644
index 0000000..dfa6d20
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-6.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "rstorssp" 1 } } */
+
+#include <immintrin.h>
+
+void f2 (void *__B)
+{
+  _rstorssp (__B);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-7.c b/gcc/testsuite/gcc.target/i386/cet-intrin-7.c
new file mode 100644
index 0000000..ecd1825
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-7.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "wrssd" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "wrss\[d|q]" 2 { target lp64 } } } */
+
+#include <immintrin.h>
+
+void f1 (unsigned int __A, void *__B)
+{
+  _wrssd (__A, __B);
+}
+
+#ifdef __x86_64__
+void f2 (unsigned long long __A, void *__B)
+{
+  _wrssq (__A, __B);
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-8.c b/gcc/testsuite/gcc.target/i386/cet-intrin-8.c
new file mode 100644
index 0000000..2188876
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-8.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "wrussd" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "wruss\[d|q]" 2 { target lp64 } } } */
+
+#include <immintrin.h>
+
+void f1 (unsigned int __A, void *__B)
+{
+  _wrussd (__A, __B);
+}
+
+#ifdef __x86_64__
+void f2 (unsigned long long __A, void *__B)
+{
+  _wrussq (__A, __B);
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-9.c b/gcc/testsuite/gcc.target/i386/cet-intrin-9.c
new file mode 100644
index 0000000..569931a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-9.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "setssbsy" 1 } } */
+
+#include <immintrin.h>
+
+void f2 (void)
+{
+  _setssbsy ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-label.c b/gcc/testsuite/gcc.target/i386/cet-label.c
new file mode 100644
index 0000000..8fb8d42
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-label.c
@@ -0,0 +1,16 @@
+/* Verify that CET works.  */
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 3 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 3 { target { ! ia32 } } } } */
+
+int func (int arg)
+{
+  static void *array[] = { &&foo, &&bar };
+
+  goto *array[arg];
+foo:
+  return arg*111;
+bar:
+  return arg*777;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-1a.c b/gcc/testsuite/gcc.target/i386/cet-notrack-1a.c
new file mode 100644
index 0000000..ab0bd3b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-1a.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -fcf-protection=none -mno-cet" } */
+/* { dg-final { scan-assembler-not "endbr" } } */
+/* { dg-final { scan-assembler-not "notrack call\[ \t]+" } } */
+
+int func (int a) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+int (*fptr) (int a) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+
+int foo (int arg)
+{
+  int a, b;
+  a = func (arg);
+  b = (*fptr) (arg);
+  return a+b;
+}
+
+int __attribute__ ((nocf_check))
+func (int arg)
+{ /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+  int (*fptrl) (int a) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+  return arg*(*fptrl)(arg);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-1b.c b/gcc/testsuite/gcc.target/i386/cet-notrack-1b.c
new file mode 100644
index 0000000..6faf88f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-1b.c
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 2 } } */
+
+int func (int a) __attribute__ ((nocf_check));
+int (*fptr) (int a) __attribute__ ((nocf_check));
+
+int foo (int arg)
+{
+int a, b;
+  a = func (arg);
+  b = (*fptr) (arg);
+  return a+b;
+}
+
+int __attribute__ ((nocf_check))
+func (int arg)
+{
+int (*fptrl) (int a) __attribute__ ((nocf_check));
+  return arg*(*fptrl)(arg);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-2a.c b/gcc/testsuite/gcc.target/i386/cet-notrack-2a.c
new file mode 100644
index 0000000..6f441e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-2a.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+
+void
+bar (void (*foo) (void))
+{
+  void (*func) (void) __attribute__((nocf_check)) = foo; /* { dg-warning "incompatible pointer type" } */
+  func ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-2b.c b/gcc/testsuite/gcc.target/i386/cet-notrack-2b.c
new file mode 100644
index 0000000..0df4645
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-2b.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack jmp\[ \t]+" 1 } } */
+
+void
+bar (void (*foo) (void))
+{
+  void (*func) (void) __attribute__((nocf_check)) = foo; /* { dg-warning "incompatible pointer type" } */
+  func ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-3.c b/gcc/testsuite/gcc.target/i386/cet-notrack-3.c
new file mode 100644
index 0000000..5e124c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-3.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+
+typedef void (*func_t) (void) __attribute__((nocf_check));
+extern func_t func;
+
+void
+bar (void)
+{
+  func ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-4a.c b/gcc/testsuite/gcc.target/i386/cet-notrack-4a.c
new file mode 100644
index 0000000..34cfd90
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-4a.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-fcf-protection=none -mno-cet" } */
+
+int var1 __attribute__((nocf_check)); /* { dg-warning "'nocf_check' attribute only applies to function types" } */
+int *var2 __attribute__((nocf_check)); /* { dg-warning "'nocf_check' attribute only applies to function types" } */
+void (**var3) (void) __attribute__((nocf_check)); /* { dg-warning "'nocf_check' attribute only applies to function types" } */
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-4b.c b/gcc/testsuite/gcc.target/i386/cet-notrack-4b.c
new file mode 100644
index 0000000..6065ef6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-4b.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+
+int var1 __attribute__((nocf_check)); /* { dg-warning "'nocf_check' attribute only applies to function types" } */
+int *var2 __attribute__((nocf_check)); /* { dg-warning "'nocf_check' attribute only applies to function types" } */
+void (**var3) (void) __attribute__((nocf_check)); /* { dg-warning "'nocf_check' attribute only applies to function types" } */
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-5a.c b/gcc/testsuite/gcc.target/i386/cet-notrack-5a.c
new file mode 100644
index 0000000..d23968e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-5a.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-not "\tcall\[ \t]+" } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+
+int (*fptr) (int) __attribute__ ((nocf_check));
+
+int
+foo (int arg)
+{
+  int a;
+  a = (*fptr) (arg); /* notrack call.  */
+  return arg+a;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-5b.c b/gcc/testsuite/gcc.target/i386/cet-notrack-5b.c
new file mode 100644
index 0000000..42d9d07
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-5b.c
@@ -0,0 +1,21 @@
+/* Check the attribute do not proparate through assignment.  */
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "\tcall\[ \t]+" 1 } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+
+int (*fptr) (int) __attribute__ ((nocf_check));
+int (*fptr1) (int);
+
+int
+foo (int arg)
+{
+  int a;
+  a = (*fptr) (arg); /* non-checked call.  */
+  arg += a;
+  fptr1 = fptr; /* { dg-warning "incompatible pointer type" } */ 
+  a = (*fptr1) (arg); /* checked call.  */
+  return arg+a;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-6a.c b/gcc/testsuite/gcc.target/i386/cet-notrack-6a.c
new file mode 100644
index 0000000..e0fb4f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-6a.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "\t(?:call|jmp)\[ \t]+.*foo" 1 } } */
+/* { dg-final { scan-assembler-not "notrack call\[ \t]+" } } */
+
+int foo (int arg);
+
+int func (int arg)
+{
+  int (*fptrl) (int a) __attribute__ ((nocf_check)) = foo; /* { dg-warning "incompatible pointer type" } */
+
+  return (*fptrl)(arg);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-6b.c b/gcc/testsuite/gcc.target/i386/cet-notrack-6b.c
new file mode 100644
index 0000000..1c47c9f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-6b.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-not "\tcall\[ \t]+" } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+
+int foo (int arg);
+
+int func (int arg)
+{
+  int (*fptrl) (int a) __attribute__ ((nocf_check)) = foo; /* { dg-warning "incompatible pointer type" } */
+
+  return (*fptrl)(arg);  /* notrack call.  */
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-7.c b/gcc/testsuite/gcc.target/i386/cet-notrack-7.c
new file mode 100644
index 0000000..f2e31d0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-7.c
@@ -0,0 +1,15 @@
+/* Check the notrack prefix is not generated for direct call.  */
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+.*foo" 0 } } */
+/* { dg-final { scan-assembler-times "\tcall\[ \t]+.*foo" 1 } } */
+
+extern void foo (void) __attribute__((nocf_check));
+
+void
+bar (void)
+{
+  foo ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-icf-1.c b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-1.c
new file mode 100644
index 0000000..7987d53
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-1.c
@@ -0,0 +1,31 @@
+/* Verify nocf_check functions are not ICF optimized.  */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-not "endbr" } } */
+/* { dg-final { scan-assembler-not "fn3:" } } */
+/* { dg-final { scan-assembler "set\[ \t]+fn2,fn1" } } */
+/* { dg-final { scan-assembler "set\[ \t]+fn3,fn1" } } */
+
+static __attribute__((noinline)) int
+fn1 (int x)
+{
+  return x + 12;
+}
+
+static __attribute__((noinline)) int
+fn2 (int x)
+{
+  return x + 12;
+}
+
+static __attribute__((noinline, nocf_check)) int
+fn3 (int x)
+{ /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+  return x + 12;
+}
+
+int
+fn4 (int x)
+{
+  return fn1 (x) + fn2 (x) + fn3 (x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-icf-2.c b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-2.c
new file mode 100644
index 0000000..db0b0a4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-2.c
@@ -0,0 +1,30 @@
+/* Verify nocf_check functions are not ICF optimized.  */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler "endbr" } } */
+/* { dg-final { scan-assembler "fn3:" } } */
+/* { dg-final { scan-assembler "set\[ \t]+fn2,fn1" } } */
+
+static __attribute__((noinline)) int
+fn1 (int x)
+{
+  return x + 12;
+}
+
+static __attribute__((noinline)) int
+fn2 (int x)
+{
+  return x + 12;
+}
+
+static __attribute__((noinline, nocf_check)) int
+fn3 (int x)
+{
+  return x + 12;
+}
+
+int
+fn4 (int x)
+{
+  return fn1 (x) + fn2 (x) + fn3 (x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-icf-3.c b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-3.c
new file mode 100644
index 0000000..07c4a6b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-3.c
@@ -0,0 +1,36 @@
+/* Verify nocf_check function calls are not ICF optimized.  */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-not "endbr" } } */
+/* { dg-final { scan-assembler-not "fn2:" } } */
+/* { dg-final { scan-assembler "set\[ \t]+fn2,fn1" } } */
+/* { dg-final { scan-assembler "set\[ \t]+fn3,fn1" } } */
+
+int (*foo)(int);
+
+typedef int (*type1_t) (int) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+typedef int (*type2_t) (int);
+
+static __attribute__((noinline)) int
+fn1 (int x)
+{
+  return ((type2_t)foo)(x + 12);
+}
+
+static __attribute__((noinline)) int
+fn2 (int x)
+{
+  return ((type1_t)foo)(x + 12);
+}
+
+static __attribute__((noinline)) int
+fn3 (int x)
+{
+  return ((type2_t)foo)(x + 12);
+}
+
+int
+fn4 (int x)
+{
+  return fn1 (x) + fn2 (x) + fn3 (x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-icf-4.c b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-4.c
new file mode 100644
index 0000000..e4e96aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-4.c
@@ -0,0 +1,35 @@
+/* Verify nocf_check function calls are not ICF optimized.  */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler "endbr" } } */
+/* { dg-final { scan-assembler "fn2:" } } */
+/* { dg-final { scan-assembler "set\[ \t]+fn3,fn1" } } */
+
+int (*foo)(int);
+
+typedef int (*type1_t) (int) __attribute__ ((nocf_check));
+typedef int (*type2_t) (int);
+
+static __attribute__((noinline)) int
+fn1 (int x)
+{
+  return ((type2_t)foo)(x + 12);
+}
+
+static __attribute__((noinline)) int
+fn2 (int x)
+{
+  return ((type1_t)foo)(x + 12);
+}
+
+static __attribute__((noinline)) int
+fn3 (int x)
+{
+  return ((type2_t)foo)(x + 12);
+}
+
+int
+fn4 (int x)
+{
+  return fn1 (x) + fn2 (x) + fn3 (x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-property-1.c b/gcc/testsuite/gcc.target/i386/cet-property-1.c
new file mode 100644
index 0000000..df243ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-property-1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-fcf-protection -mcet" } */
+/* { dg-final { scan-assembler ".note.gnu.property" } } */
+
+extern void foo (void);
+
+void
+bar (void)
+{
+  foo ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-property-2.c b/gcc/testsuite/gcc.target/i386/cet-property-2.c
new file mode 100644
index 0000000..5a87dab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-property-2.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mcet" } */
+/* { dg-final { scan-assembler-not ".note.gnu.property" } } */
+
+extern void foo (void);
+
+void
+bar (void)
+{
+  foo ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
new file mode 100644
index 0000000..fb50ff4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
@@ -0,0 +1,39 @@
+/* { dg-do run { target cet } } */
+/* { dg-options "-O2 -fcf-protection -mcet" } */
+
+void _exit(int status) __attribute__ ((__noreturn__));
+
+#ifdef __x86_64__
+# define incssp(x) __builtin_ia32_incsspq (x)
+# define rdssp(x) __builtin_ia32_rdsspq (x)
+#else
+# define incssp(x) __builtin_ia32_incsspd (x)
+# define rdssp(x) __builtin_ia32_rdsspd (x)
+#endif
+
+static void
+__attribute__ ((noinline, noclone))
+test (unsigned long frames)
+{
+  unsigned long ssp = 0;
+  ssp = rdssp (ssp);
+  if (ssp != 0)
+    {
+      unsigned long tmp = frames;
+      while (tmp > 255)
+	{
+	  incssp (tmp);
+	  tmp -= 255;
+	}
+      incssp (tmp);
+    }
+  /* We must call _exit since shadow stack is incorrect now.  */
+  _exit (0);
+}
+
+int
+main ()
+{
+  test (1);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-sjlj-1.c b/gcc/testsuite/gcc.target/i386/cet-sjlj-1.c
new file mode 100644
index 0000000..374d12a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-sjlj-1.c
@@ -0,0 +1,42 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 4 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 4 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "rdssp\[dq]" 2 } } */
+/* { dg-final { scan-assembler-times "incssp\[dq]" 1 } } */
+
+/* Based on gcc.dg/setjmp-3.c.  */
+
+void *buf[5];
+
+extern void abort (void);
+
+void raise0(void)
+{
+  __builtin_longjmp (buf, 1);
+}
+
+int execute(int cmd)
+{
+  int last = 0;
+
+  if (__builtin_setjmp (buf) == 0)
+    while (1)
+      {
+	last = 1;
+	raise0 ();
+      }
+
+  if (last == 0)
+    return 0;
+  else
+    return cmd;
+}
+
+int main(void)
+{
+  if (execute (1) == 0)
+    abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-sjlj-2.c b/gcc/testsuite/gcc.target/i386/cet-sjlj-2.c
new file mode 100644
index 0000000..c97094a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-sjlj-2.c
@@ -0,0 +1,4 @@
+/* { dg-do run { target cet } } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+
+#include "cet-sjlj-1.c"
diff --git a/gcc/testsuite/gcc.target/i386/cet-sjlj-3.c b/gcc/testsuite/gcc.target/i386/cet-sjlj-3.c
new file mode 100644
index 0000000..c1efbbe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-sjlj-3.c
@@ -0,0 +1,46 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 4 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 4 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "call	_setjmp" 1 } } */
+/* { dg-final { scan-assembler-times "call	longjmp" 1 } } */
+
+#include <stdio.h>
+#include <setjmp.h>
+
+jmp_buf buf;
+int bar (int);
+
+int
+foo (int i)
+{
+  int j = i * 11;
+
+  if (!setjmp (buf))
+    {
+      j += 33;
+      printf ("After setjmp: j = %d\n", j);
+      bar (j);
+    }
+
+  return j + i;
+}
+
+int
+bar (int i)
+{
+int j = i;
+
+  j -= 111;
+  printf ("In longjmp: j = %d\n", j);
+  longjmp (buf, 1);
+
+  return j;
+}
+
+int
+main ()
+{
+  foo (10);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-switch-1.c b/gcc/testsuite/gcc.target/i386/cet-switch-1.c
new file mode 100644
index 0000000..7a75857
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-switch-1.c
@@ -0,0 +1,26 @@
+/* Verify that CET works.  */
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack jmp\[ \t]+\[*]" 1 } } */
+
+void func2 (int);
+
+int func1 (int arg)
+{
+  switch (arg)
+  {
+    case 1: func2 (arg*100);
+    case 2: func2 (arg*300);
+    case 5: func2 (arg*500);
+    case 8: func2 (arg*700);
+    case 7: func2 (arg*900);
+    case -1: func2 (arg*-100);
+    case -2: func2 (arg*-300);
+    case -5: func2 (arg*-500);
+    case -7: func2 (arg*-700);
+    case -9: func2 (arg*-900);
+  }
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-switch-2.c b/gcc/testsuite/gcc.target/i386/cet-switch-2.c
new file mode 100644
index 0000000..e620b83
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-switch-2.c
@@ -0,0 +1,26 @@
+/* Verify that CET works.  */
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet -mcet-switch" } */
+/* { dg-final { scan-assembler-times "endbr32" 12 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 12 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "\[ \t]+jmp\[ \t]+\[*]" 1 } } */
+
+void func2 (int);
+
+int func1 (int arg)
+{
+  switch (arg)
+  {
+    case 1: func2 (arg*100);
+    case 2: func2 (arg*300);
+    case 5: func2 (arg*500);
+    case 8: func2 (arg*700);
+    case 7: func2 (arg*900);
+    case -1: func2 (arg*-100);
+    case -2: func2 (arg*-300);
+    case -5: func2 (arg*-500);
+    case -7: func2 (arg*-700);
+    case -9: func2 (arg*-900);
+  }
+  return 0;
+}
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 2733c62..2ce3d97 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8594,3 +8594,16 @@ proc check_effective_target_autoincdec { } {
     }
     return 0
 }
+
+# Return 1 if CET instructions can be compiled.
+proc check_effective_target_cet { } {
+    if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+	return 0
+    }
+    return [check_no_compiler_messages cet object {
+	void foo (void)
+	{
+	  asm ("setssbsy");
+	}
+    } "-O2" ]
+}
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
  2017-10-12 18:56       ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
@ 2017-10-13  9:10         ` Uros Bizjak
  2017-10-13 11:01           ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
  0 siblings, 1 reply; 17+ messages in thread
From: Uros Bizjak @ 2017-10-13  9:10 UTC (permalink / raw)
  To: Tsimbalist, Igor V; +Cc: gcc-patches

On Thu, Oct 12, 2017 at 8:54 PM, Tsimbalist, Igor V
<igor.v.tsimbalist@intel.com> wrote:
> Attached is an updated patch according to your comments. New tests are
> added to test ICF optimization in presence of nocf_check attribute.
--- a/gcc/testsuite/c-c++-common/fcf-protection-2.c
+++ b/gcc/testsuite/c-c++-common/fcf-protection-2.c
@@ -1,4 +1,4 @@
 /* { dg-do compile } */
 /* { dg-options "-fcf-protection=branch" } */
-/* { dg-error "'-fcf-protection=branch' is not supported for this
target" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
+/* { dg-error "'-fcf-protection=branch' requires CET support on this
target. Use -mcet or one of -mibt, -mshstk options to enable CET" "" {
target { "i?86-*-* x86_64-*-*" } } 0 } */

Checking for "-fcf-protection=branch' requires CET support on this
target" should be enough. No need to check the whole message here and
in other tests.

 /* { dg-error "'-fcf-protection=branch' is not supported for this
target" "" { target { ! "i?86-*-* x86_64-*-*" } } 0 } */
diff --git a/gcc/testsuite/c-c++-common/fcf-protection-3.c
b/gcc/testsuite/c-c++-common/fcf-protection-3.c


--- a/gcc/testsuite/c-c++-common/fcf-protection-4.c
+++ b/gcc/testsuite/c-c++-common/fcf-protection-4.c
@@ -1,4 +1,4 @@
 /* { dg-do compile } */
 /* { dg-options "-fcf-protection=none" } */
-/* { dg-bogus "'-fcf-protection=none' is not supported for this
target" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
+/* { dg-bogus "'-fcf-protection=none' res CET support on this target.
Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target
{ "i?86-*-* x86_64-*-*" } } 0 } */
 /* { dg-bogus "'-fcf-protection=none' is not supported for this
target" "" { target { ! "i?86-*-* x86_64-*-*" } } 0 } */
diff --git a/gcc/testsuite/c-c++-common/fcf-protection-5.c
b/gcc/testsuite/c-c++-common/fcf-protection-5.c

The above test checks for bogus messages? -fcf-protection=none option
should not generate any messages. So, the test should check that
-fcf-protection=none doesn't generate any error. (And, there is a typo
in the message, /s/res/requires.)

Uros.

> Igor
>
>
>> -----Original Message-----
>> From: Tsimbalist, Igor V
>> Sent: Tuesday, September 19, 2017 11:30 PM
>> To: Uros Bizjak <ubizjak@gmail.com>
>> Cc: gcc-patches@gcc.gnu.org; Tsimbalist, Igor V
>> <igor.v.tsimbalist@intel.com>
>> Subject: RE: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
>>
>> > -----Original Message-----
>> > From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
>> > owner@gcc.gnu.org] On Behalf Of Uros Bizjak
>> > Sent: Tuesday, September 19, 2017 6:13 PM
>> > To: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>
>> > Cc: gcc-patches@gcc.gnu.org
>> > Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
>> >
>> > On Tue, Sep 19, 2017 at 5:18 PM, Tsimbalist, Igor V
>> > <igor.v.tsimbalist@intel.com> wrote:
>> > >> -----Original Message-----
>> > >> From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
>> > >> owner@gcc.gnu.org] On Behalf Of Uros Bizjak
>> > >> Sent: Monday, September 18, 2017 12:17 PM
>> > >> To: gcc-patches@gcc.gnu.org
>> > >> Cc: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>; Tsimbalist,
>> > >> Igor V <igor.v.tsimbalist@intel.com>
>> > >> Subject: Re:
>> > >> 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
>> > >>
>> > >> Hello!
>> > >>
>> > >> > gcc/testsuite/
>> > >> >
>> > >> > * g++.dg/cet-notrack-1.C: New test.
>> > >> > * gcc.target/i386/cet-intrin-1.c: Likewise.
>> > >> > * gcc.target/i386/cet-intrin-10.c: Likewise.
>> > >> > * gcc.target/i386/cet-intrin-2.c: Likewise.
>> > >> > * gcc.target/i386/cet-intrin-3.c: Likewise.
>> > >> > * gcc.target/i386/cet-intrin-4.c: Likewise.
>> > >> > * gcc.target/i386/cet-intrin-5.c: Likewise.
>> > >> > * gcc.target/i386/cet-intrin-6.c: Likewise.
>> > >> > * gcc.target/i386/cet-intrin-7.c: Likewise.
>> > >> > * gcc.target/i386/cet-intrin-8.c: Likewise.
>> > >> > * gcc.target/i386/cet-intrin-9.c: Likewise.
>> > >> > * gcc.target/i386/cet-label.c: Likewise.
>> > >> > * gcc.target/i386/cet-notrack-1a.c: Likewise.
>> > >> > * gcc.target/i386/cet-notrack-1b.c: Likewise.
>> > >> > * gcc.target/i386/cet-notrack-2a.c: Likewise.
>> > >> > * gcc.target/i386/cet-notrack-2b.c: Likewise.
>> > >> > * gcc.target/i386/cet-notrack-3.c: Likewise.
>> > >> > * gcc.target/i386/cet-notrack-4a.c: Likewise.
>> > >> > * gcc.target/i386/cet-notrack-4b.c: Likewise.
>> > >> > * gcc.target/i386/cet-notrack-5a.c: Likewise.
>> > >> > * gcc.target/i386/cet-notrack-5b.c: Likewise.
>> > >> > * gcc.target/i386/cet-notrack-6a.c: Likewise.
>> > >> > * gcc.target/i386/cet-notrack-6b.c: Likewise.
>> > >> > * gcc.target/i386/cet-notrack-7.c: Likewise.
>> > >> > * gcc.target/i386/cet-property-1.c: Likewise.
>> > >> > * gcc.target/i386/cet-property-2.c: Likewise.
>> > >> > * gcc.target/i386/cet-rdssp-1.c: Likewise.
>> > >> > * gcc.target/i386/cet-sjlj-1.c: Likewise.
>> > >> > * gcc.target/i386/cet-sjlj-2.c: Likewise.
>> > >> > * gcc.target/i386/cet-sjlj-3.c: Likewise.
>> > >> > * gcc.target/i386/cet-switch-1.c: Likewise.
>> > >> > * gcc.target/i386/cet-switch-2.c: Likewise.
>> > >> > * lib/target-supports.exp (check_effective_target_cet): New proc.
>> > >>
>> > >> A couple of questions:
>> > >>
>> > >> +/* { dg-do compile } */
>> > >> +/* { dg-options "-O2 -mcet" } */
>> > >> +/* { dg-final { scan-assembler-times "setssbsy" 2 } } */
>> > >> +
>> > >> +#include <immintrin.h>
>> > >> +
>> > >> +void f1 (void)
>> > >> +{
>> > >> +  __builtin_ia32_setssbsy ();
>> > >> +}
>> > >> +
>> > >> +void f2 (void)
>> > >> +{
>> > >> +  _setssbsy ();
>> > >> +}
>> > >>
>> > >> Is there a reason that both, __builtin and intrinsic versions are
>> > >> tested in a couple of places? The intrinsic version is just a
>> > >> wrapper for __builtin, so IMO testing intrinsic version should be
>> enough.
>> > > No strong reason. Just to check that intrinsic names are recognized
>> > > and
>> > processed correctly.
>> > > The implementation could change and the test will catch inconsistency.
>> > > I would also assume a user will use intrinsics that's why I add intrinsic
>> check.
>> > Should I remove it?
>> >
>> > Actually, these __builtins are considered as implementation detail,
>> > and their use should be discouraged. They are deliberately not
>> > documented, and users should use intrinsic headers instead. That said,
>> > builtins won't change without a reason, since Ada needs them.
>> >
>> > It can happen that the test fails due to change of intrinsics, so I'd
>> > recommend to remove them.
>> Ok, I will remove intrinsic.
>>
>> > >> diff --git a/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
>> > >> b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
>> > >> new file mode 100644
>> > >> index 0000000..f9223a5
>> > >> --- /dev/null
>> > >> +++ b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
>> > >> @@ -0,0 +1,39 @@
>> > >> +/* { dg-do run { target cet } } */
>> > >> +/* { dg-options "-O2 -finstrument-control-flow -mcet" } */
>> > >>
>> > >> The "target cet" directive just checks that CET instructions can be
>> > compiled.
>> > >> The test will (probably?) fail on targets with binutils that can
>> > >> compile CET instructions, but the target itself doesn't support CET.
>> > >> If this is the case, then check header has to be introduced, so the
>> > >> test can be bypassed on targets without runtime support.
>> > > The test will not fail even if a target doesn't support CET as 'rdssp'
>> > > instruction is a NOP on such target and further usage of CET
>> > > instruction is bypassed. In this case the code
>> > >
>> > > +  ssp = rdssp (ssp);
>> > >
>> > > Will keep ssp as 0.
>> >
>> > I assume that this is true also for other runtime tests, and this
>> > clears my concern about runtime failures with updated binutils.
>> Yes, that's true for other runtime tests.
>>
>> Igor
>>
>> >
>> > Uros.

^ permalink raw reply	[flat|nested] 17+ messages in thread

* RE: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
  2017-09-19 21:29     ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
@ 2017-10-12 18:56       ` Tsimbalist, Igor V
  2017-10-13  9:10         ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Uros Bizjak
  0 siblings, 1 reply; 17+ messages in thread
From: Tsimbalist, Igor V @ 2017-10-12 18:56 UTC (permalink / raw)
  To: Uros Bizjak; +Cc: gcc-patches, Tsimbalist, Igor V

[-- Attachment #1: Type: text/plain, Size: 5899 bytes --]

Attached is an updated patch according to your comments. New tests are
added to test ICF optimization in presence of nocf_check attribute.

Igor


> -----Original Message-----
> From: Tsimbalist, Igor V
> Sent: Tuesday, September 19, 2017 11:30 PM
> To: Uros Bizjak <ubizjak@gmail.com>
> Cc: gcc-patches@gcc.gnu.org; Tsimbalist, Igor V
> <igor.v.tsimbalist@intel.com>
> Subject: RE: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> 
> > -----Original Message-----
> > From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
> > owner@gcc.gnu.org] On Behalf Of Uros Bizjak
> > Sent: Tuesday, September 19, 2017 6:13 PM
> > To: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>
> > Cc: gcc-patches@gcc.gnu.org
> > Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> >
> > On Tue, Sep 19, 2017 at 5:18 PM, Tsimbalist, Igor V
> > <igor.v.tsimbalist@intel.com> wrote:
> > >> -----Original Message-----
> > >> From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
> > >> owner@gcc.gnu.org] On Behalf Of Uros Bizjak
> > >> Sent: Monday, September 18, 2017 12:17 PM
> > >> To: gcc-patches@gcc.gnu.org
> > >> Cc: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>; Tsimbalist,
> > >> Igor V <igor.v.tsimbalist@intel.com>
> > >> Subject: Re:
> > >> 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> > >>
> > >> Hello!
> > >>
> > >> > gcc/testsuite/
> > >> >
> > >> > * g++.dg/cet-notrack-1.C: New test.
> > >> > * gcc.target/i386/cet-intrin-1.c: Likewise.
> > >> > * gcc.target/i386/cet-intrin-10.c: Likewise.
> > >> > * gcc.target/i386/cet-intrin-2.c: Likewise.
> > >> > * gcc.target/i386/cet-intrin-3.c: Likewise.
> > >> > * gcc.target/i386/cet-intrin-4.c: Likewise.
> > >> > * gcc.target/i386/cet-intrin-5.c: Likewise.
> > >> > * gcc.target/i386/cet-intrin-6.c: Likewise.
> > >> > * gcc.target/i386/cet-intrin-7.c: Likewise.
> > >> > * gcc.target/i386/cet-intrin-8.c: Likewise.
> > >> > * gcc.target/i386/cet-intrin-9.c: Likewise.
> > >> > * gcc.target/i386/cet-label.c: Likewise.
> > >> > * gcc.target/i386/cet-notrack-1a.c: Likewise.
> > >> > * gcc.target/i386/cet-notrack-1b.c: Likewise.
> > >> > * gcc.target/i386/cet-notrack-2a.c: Likewise.
> > >> > * gcc.target/i386/cet-notrack-2b.c: Likewise.
> > >> > * gcc.target/i386/cet-notrack-3.c: Likewise.
> > >> > * gcc.target/i386/cet-notrack-4a.c: Likewise.
> > >> > * gcc.target/i386/cet-notrack-4b.c: Likewise.
> > >> > * gcc.target/i386/cet-notrack-5a.c: Likewise.
> > >> > * gcc.target/i386/cet-notrack-5b.c: Likewise.
> > >> > * gcc.target/i386/cet-notrack-6a.c: Likewise.
> > >> > * gcc.target/i386/cet-notrack-6b.c: Likewise.
> > >> > * gcc.target/i386/cet-notrack-7.c: Likewise.
> > >> > * gcc.target/i386/cet-property-1.c: Likewise.
> > >> > * gcc.target/i386/cet-property-2.c: Likewise.
> > >> > * gcc.target/i386/cet-rdssp-1.c: Likewise.
> > >> > * gcc.target/i386/cet-sjlj-1.c: Likewise.
> > >> > * gcc.target/i386/cet-sjlj-2.c: Likewise.
> > >> > * gcc.target/i386/cet-sjlj-3.c: Likewise.
> > >> > * gcc.target/i386/cet-switch-1.c: Likewise.
> > >> > * gcc.target/i386/cet-switch-2.c: Likewise.
> > >> > * lib/target-supports.exp (check_effective_target_cet): New proc.
> > >>
> > >> A couple of questions:
> > >>
> > >> +/* { dg-do compile } */
> > >> +/* { dg-options "-O2 -mcet" } */
> > >> +/* { dg-final { scan-assembler-times "setssbsy" 2 } } */
> > >> +
> > >> +#include <immintrin.h>
> > >> +
> > >> +void f1 (void)
> > >> +{
> > >> +  __builtin_ia32_setssbsy ();
> > >> +}
> > >> +
> > >> +void f2 (void)
> > >> +{
> > >> +  _setssbsy ();
> > >> +}
> > >>
> > >> Is there a reason that both, __builtin and intrinsic versions are
> > >> tested in a couple of places? The intrinsic version is just a
> > >> wrapper for __builtin, so IMO testing intrinsic version should be
> enough.
> > > No strong reason. Just to check that intrinsic names are recognized
> > > and
> > processed correctly.
> > > The implementation could change and the test will catch inconsistency.
> > > I would also assume a user will use intrinsics that's why I add intrinsic
> check.
> > Should I remove it?
> >
> > Actually, these __builtins are considered as implementation detail,
> > and their use should be discouraged. They are deliberately not
> > documented, and users should use intrinsic headers instead. That said,
> > builtins won't change without a reason, since Ada needs them.
> >
> > It can happen that the test fails due to change of intrinsics, so I'd
> > recommend to remove them.
> Ok, I will remove intrinsic.
> 
> > >> diff --git a/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
> > >> b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
> > >> new file mode 100644
> > >> index 0000000..f9223a5
> > >> --- /dev/null
> > >> +++ b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
> > >> @@ -0,0 +1,39 @@
> > >> +/* { dg-do run { target cet } } */
> > >> +/* { dg-options "-O2 -finstrument-control-flow -mcet" } */
> > >>
> > >> The "target cet" directive just checks that CET instructions can be
> > compiled.
> > >> The test will (probably?) fail on targets with binutils that can
> > >> compile CET instructions, but the target itself doesn't support CET.
> > >> If this is the case, then check header has to be introduced, so the
> > >> test can be bypassed on targets without runtime support.
> > > The test will not fail even if a target doesn't support CET as 'rdssp'
> > > instruction is a NOP on such target and further usage of CET
> > > instruction is bypassed. In this case the code
> > >
> > > +  ssp = rdssp (ssp);
> > >
> > > Will keep ssp as 0.
> >
> > I assume that this is true also for other runtime tests, and this
> > clears my concern about runtime failures with updated binutils.
> Yes, that's true for other runtime tests.
> 
> Igor
> 
> >
> > Uros.

[-- Attachment #2: 0006-Add-x86-tests-for-Intel-CET-implementation.patch --]
[-- Type: application/octet-stream, Size: 39464 bytes --]

From 85c81751cde231c3804808fb77e49331c151c9c4 Mon Sep 17 00:00:00 2001
From: Igor Tsimbalist <igor.v.tsimbalist@intel.com>
Date: Fri, 21 Jul 2017 19:40:40 +0300
Subject: [PATCH 6/6] Add x86 tests for Intel CET implementation.

gcc/testsuite/
	* g++.dg/cet-notrack-1.C: New test.
	* gcc.target/i386/cet-intrin-1.c: Likewise.
	* gcc.target/i386/cet-intrin-10.c: Likewise.
	* gcc.target/i386/cet-intrin-2.c: Likewise.
	* gcc.target/i386/cet-intrin-3.c: Likewise.
	* gcc.target/i386/cet-intrin-4.c: Likewise.
	* gcc.target/i386/cet-intrin-5.c: Likewise.
	* gcc.target/i386/cet-intrin-6.c: Likewise.
	* gcc.target/i386/cet-intrin-7.c: Likewise.
	* gcc.target/i386/cet-intrin-8.c: Likewise.
	* gcc.target/i386/cet-intrin-9.c: Likewise.
	* gcc.target/i386/cet-label.c: Likewise.
	* gcc.target/i386/cet-notrack-1a.c: Likewise.
	* gcc.target/i386/cet-notrack-1b.c: Likewise.
	* gcc.target/i386/cet-notrack-2a.c: Likewise.
	* gcc.target/i386/cet-notrack-2b.c: Likewise.
	* gcc.target/i386/cet-notrack-3.c: Likewise.
	* gcc.target/i386/cet-notrack-4a.c: Likewise.
	* gcc.target/i386/cet-notrack-4b.c: Likewise.
	* gcc.target/i386/cet-notrack-5a.c: Likewise.
	* gcc.target/i386/cet-notrack-5b.c: Likewise.
	* gcc.target/i386/cet-notrack-6a.c: Likewise.
	* gcc.target/i386/cet-notrack-6b.c: Likewise.
	* gcc.target/i386/cet-notrack-7.c: Likewise.
	* gcc.target/i386/cet-property-1.c: Likewise.
	* gcc.target/i386/cet-property-2.c: Likewise.
	* gcc.target/i386/cet-rdssp-1.c: Likewise.
	* gcc.target/i386/cet-sjlj-1.c: Likewise.
	* gcc.target/i386/cet-sjlj-2.c: Likewise.
	* gcc.target/i386/cet-sjlj-3.c: Likewise.
	* gcc.target/i386/cet-switch-1.c: Likewise.
	* gcc.target/i386/cet-switch-2.c: Likewise.
	* lib/target-supports.exp (check_effective_target_cet): New
	proc.
---
 gcc/testsuite/c-c++-common/attr-nocf-check-1a.c   | 32 ++++++++++++++++
 gcc/testsuite/c-c++-common/attr-nocf-check-3a.c   | 32 ++++++++++++++++
 gcc/testsuite/c-c++-common/fcf-protection-1.c     |  2 +-
 gcc/testsuite/c-c++-common/fcf-protection-2.c     |  2 +-
 gcc/testsuite/c-c++-common/fcf-protection-3.c     |  2 +-
 gcc/testsuite/c-c++-common/fcf-protection-4.c     |  2 +-
 gcc/testsuite/c-c++-common/fcf-protection-5.c     |  2 +-
 gcc/testsuite/g++.dg/cet-notrack-1.C              | 25 ++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-10.c     | 10 +++++
 gcc/testsuite/gcc.target/i386/cet-intrin-3.c      | 33 ++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-4.c      | 31 +++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-5.c      | 10 +++++
 gcc/testsuite/gcc.target/i386/cet-intrin-6.c      | 10 +++++
 gcc/testsuite/gcc.target/i386/cet-intrin-7.c      | 18 +++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-8.c      | 18 +++++++++
 gcc/testsuite/gcc.target/i386/cet-intrin-9.c      | 10 +++++
 gcc/testsuite/gcc.target/i386/cet-label.c         | 16 ++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-1a.c    | 22 +++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-1b.c    | 23 ++++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-2a.c    | 12 ++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-2b.c    | 12 ++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-3.c     | 14 +++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-4a.c    |  6 +++
 gcc/testsuite/gcc.target/i386/cet-notrack-4b.c    |  6 +++
 gcc/testsuite/gcc.target/i386/cet-notrack-5a.c    | 16 ++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-5b.c    | 21 +++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-6a.c    | 15 ++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-6b.c    | 15 ++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-7.c     | 15 ++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-icf-1.c | 31 +++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-icf-2.c | 30 +++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-icf-3.c | 36 ++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-notrack-icf-4.c | 35 +++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-property-1.c    | 11 ++++++
 gcc/testsuite/gcc.target/i386/cet-property-2.c    | 11 ++++++
 gcc/testsuite/gcc.target/i386/cet-rdssp-1.c       | 39 +++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-sjlj-1.c        | 42 +++++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-sjlj-2.c        |  4 ++
 gcc/testsuite/gcc.target/i386/cet-sjlj-3.c        | 46 +++++++++++++++++++++++
 gcc/testsuite/gcc.target/i386/cet-switch-1.c      | 26 +++++++++++++
 gcc/testsuite/gcc.target/i386/cet-switch-2.c      | 26 +++++++++++++
 gcc/testsuite/lib/target-supports.exp             | 13 +++++++
 42 files changed, 777 insertions(+), 5 deletions(-)
 create mode 100644 gcc/testsuite/c-c++-common/attr-nocf-check-1a.c
 create mode 100644 gcc/testsuite/c-c++-common/attr-nocf-check-3a.c
 create mode 100644 gcc/testsuite/g++.dg/cet-notrack-1.C
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-10.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-4.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-5.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-6.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-7.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-8.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-intrin-9.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-label.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-1a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-1b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-2a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-2b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-4a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-4b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-5a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-5b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-6a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-6b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-7.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-icf-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-icf-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-icf-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-notrack-icf-4.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-property-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-property-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-sjlj-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-sjlj-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-sjlj-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-switch-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/cet-switch-2.c

diff --git a/gcc/testsuite/c-c++-common/attr-nocf-check-1a.c b/gcc/testsuite/c-c++-common/attr-nocf-check-1a.c
new file mode 100644
index 0000000..9549e69
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/attr-nocf-check-1a.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fcf-protection -mcet" } */
+
+int func (int) __attribute__ ((nocf_check));
+int (*fptr) (int) __attribute__ ((nocf_check));
+typedef void (*nocf_check_t) (void) __attribute__ ((nocf_check));
+
+int
+foo1 (int arg)
+{
+  return func (arg) + fptr (arg);
+}
+
+void
+foo2 (void (*foo) (void))
+{
+  void (*func) (void) __attribute__((nocf_check)) = foo; /* { dg-warning "incompatible pointer type" "" { target c } } */
+							 /* { dg-error "invalid conversion" "" { target c++ } .-1 } */
+  func ();
+}
+
+void
+foo3 (nocf_check_t foo)
+{
+  foo ();
+}
+
+void
+foo4 (void (*foo) (void) __attribute__((nocf_check)))
+{
+  foo ();
+}
diff --git a/gcc/testsuite/c-c++-common/attr-nocf-check-3a.c b/gcc/testsuite/c-c++-common/attr-nocf-check-3a.c
new file mode 100644
index 0000000..1a83301
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/attr-nocf-check-3a.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fcf-protection -mcet" } */
+
+int  foo (void) __attribute__ ((nocf_check));
+void (*foo1) (void) __attribute__((nocf_check));
+void (*foo2) (void);
+
+int __attribute__ ((nocf_check))
+foo (void) /* The function's address is not tracked.  */
+{
+  /* This call site is not tracked for
+     control-flow instrumentation.  */
+  (*foo1)();
+
+  foo1 = foo2; /* { dg-warning "incompatible pointer type" "" { target c } } */
+	       /* { dg-error "invalid conversion" "" { target c++ } .-1 } */
+  /* This call site is still not tracked for
+     control-flow instrumentation.  */
+  (*foo1)();
+
+  /* This call site is tracked for
+     control-flow instrumentation.  */
+  (*foo2)();
+
+  foo2 = foo1; /* { dg-warning "incompatible pointer type" "" { target c } } */
+	       /* { dg-error "invalid conversion" "" { target c++ } .-1 } */
+  /* This call site is still tracked for
+     control-flow instrumentation.  */
+  (*foo2)();
+
+  return 0;
+}
diff --git a/gcc/testsuite/c-c++-common/fcf-protection-1.c b/gcc/testsuite/c-c++-common/fcf-protection-1.c
index 6a27e19..832ae05 100644
--- a/gcc/testsuite/c-c++-common/fcf-protection-1.c
+++ b/gcc/testsuite/c-c++-common/fcf-protection-1.c
@@ -1,4 +1,4 @@
 /* { dg-do compile } */
 /* { dg-options "-fcf-protection=full" } */
-/* { dg-error "'-fcf-protection=full' is not supported for this target" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
+/* { dg-error "'-fcf-protection=full' requires CET support on this target. Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
 /* { dg-error "'-fcf-protection=full' is not supported for this target" "" { target { ! "i?86-*-* x86_64-*-*" } } 0 } */
diff --git a/gcc/testsuite/c-c++-common/fcf-protection-2.c b/gcc/testsuite/c-c++-common/fcf-protection-2.c
index 558f4c0..520b16e 100644
--- a/gcc/testsuite/c-c++-common/fcf-protection-2.c
+++ b/gcc/testsuite/c-c++-common/fcf-protection-2.c
@@ -1,4 +1,4 @@
 /* { dg-do compile } */
 /* { dg-options "-fcf-protection=branch" } */
-/* { dg-error "'-fcf-protection=branch' is not supported for this target" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
+/* { dg-error "'-fcf-protection=branch' requires CET support on this target. Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
 /* { dg-error "'-fcf-protection=branch' is not supported for this target" "" { target { ! "i?86-*-* x86_64-*-*" } } 0 } */
diff --git a/gcc/testsuite/c-c++-common/fcf-protection-3.c b/gcc/testsuite/c-c++-common/fcf-protection-3.c
index ffc7346..cf17c65 100644
--- a/gcc/testsuite/c-c++-common/fcf-protection-3.c
+++ b/gcc/testsuite/c-c++-common/fcf-protection-3.c
@@ -1,4 +1,4 @@
 /* { dg-do compile } */
 /* { dg-options "-fcf-protection=return" } */
-/* { dg-error "'-fcf-protection=return' is not supported for this target" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
+/* { dg-error "'-fcf-protection=return' requires CET support on this target. Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
 /* { dg-error "'-fcf-protection=return' is not supported for this target" "" { target { ! "i?86-*-* x86_64-*-*" } } 0 } */
diff --git a/gcc/testsuite/c-c++-common/fcf-protection-4.c b/gcc/testsuite/c-c++-common/fcf-protection-4.c
index 1a5b1b8..fab0982 100644
--- a/gcc/testsuite/c-c++-common/fcf-protection-4.c
+++ b/gcc/testsuite/c-c++-common/fcf-protection-4.c
@@ -1,4 +1,4 @@
 /* { dg-do compile } */
 /* { dg-options "-fcf-protection=none" } */
-/* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
+/* { dg-bogus "'-fcf-protection=none' res CET support on this target. Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
 /* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" { target { ! "i?86-*-* x86_64-*-*" } } 0 } */
diff --git a/gcc/testsuite/c-c++-common/fcf-protection-5.c b/gcc/testsuite/c-c++-common/fcf-protection-5.c
index 2ea2ce0..30e0cbb 100644
--- a/gcc/testsuite/c-c++-common/fcf-protection-5.c
+++ b/gcc/testsuite/c-c++-common/fcf-protection-5.c
@@ -1,4 +1,4 @@
 /* { dg-do compile } */
 /* { dg-options "-fcf-protection" } */
-/* { dg-error "'-fcf-protection=full' is not supported for this target" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
+/* { dg-error "'-fcf-protection=full' requires CET support on this target. Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target { "i?86-*-* x86_64-*-*" } } 0 } */
 /* { dg-error "'-fcf-protection=full' is not supported for this target" "" { target { ! "i?86-*-* x86_64-*-*" } } 0 } */
diff --git a/gcc/testsuite/g++.dg/cet-notrack-1.C b/gcc/testsuite/g++.dg/cet-notrack-1.C
new file mode 100644
index 0000000..43dbbd6
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cet-notrack-1.C
@@ -0,0 +1,25 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-fcf-protection -mcet" } */
+/* { dg-final { scan-assembler "endbr32|endbr64" } } */
+/* { dg-final { scan-assembler-times "\tcall\[ \t]+puts" 2 } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+#include <stdio.h>
+
+struct A {
+virtual int foo() __attribute__((nocf_check)) { return 42; }
+};
+
+struct B : A {
+int foo() __attribute__((nocf_check)) { return 73; }
+};
+
+int main() {
+B b;
+A& a = b;
+int (A::*amem) () __attribute__((nocf_check)) = &A::foo; // take address
+if ((a.*amem)() == 73) // use the address
+  printf("pass\n");
+else
+  printf("fail\n");
+return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-10.c b/gcc/testsuite/gcc.target/i386/cet-intrin-10.c
new file mode 100644
index 0000000..695dc5e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-10.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "clrssbsy" 1 } } */
+
+#include <immintrin.h>
+
+void f2 (void *__B)
+{
+  _clrssbsy (__B);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-3.c b/gcc/testsuite/gcc.target/i386/cet-intrin-3.c
new file mode 100644
index 0000000..bcd7203
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-3.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 2 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 4 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "rdsspd|incsspd\[ \t]+(%|)eax" { target ia32 } } } */
+/* { dg-final { scan-assembler "rdssp\[dq]\[ \t]+(%|)\[re]ax" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "incssp\[dq]\[ \t]+(%|)\[re]di" { target { ! ia32 } } } } */
+
+#include <immintrin.h>
+
+unsigned int f1 ()
+{
+  unsigned int x = 0;
+  return _rdsspd (x);
+}
+
+void f3 (unsigned int _a)
+{
+  _incsspd (_a);
+}
+
+#ifdef __x86_64__
+unsigned long long f2 ()
+{
+  unsigned long long x = 0;
+  return _rdsspq (x);
+}
+
+void f4 (unsigned int _a)
+{
+  _incsspq (_a);
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-4.c b/gcc/testsuite/gcc.target/i386/cet-intrin-4.c
new file mode 100644
index 0000000..76ec160
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-4.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mshstk" } */
+/* { dg-final { scan-assembler "rdsspd|incsspd\[ \t]+(%|)eax" { target ia32 } } } */
+/* { dg-final { scan-assembler "rdssp\[dq]\[ \t]+(%|)\[re]ax"  { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "incssp\[dq]\[ \t]+(%|)\[re]di" { target { ! ia32 } } } } */
+
+#include <immintrin.h>
+
+unsigned int f1 ()
+{
+  unsigned int x = 0;
+  return _rdsspd (x);
+}
+
+void f3 (unsigned int _a)
+{
+  _incsspd (_a);
+}
+
+#ifdef __x86_64__
+unsigned long long f2 ()
+{
+  unsigned long long x = 0;
+  return _rdsspq (x);
+}
+
+void f4 (unsigned int _a)
+{
+  _incsspq (_a);
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-5.c b/gcc/testsuite/gcc.target/i386/cet-intrin-5.c
new file mode 100644
index 0000000..8a1b637
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-5.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "saveprevssp" 1 } } */
+
+#include <immintrin.h>
+
+void f2 (void)
+{
+  _saveprevssp ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-6.c b/gcc/testsuite/gcc.target/i386/cet-intrin-6.c
new file mode 100644
index 0000000..dfa6d20
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-6.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "rstorssp" 1 } } */
+
+#include <immintrin.h>
+
+void f2 (void *__B)
+{
+  _rstorssp (__B);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-7.c b/gcc/testsuite/gcc.target/i386/cet-intrin-7.c
new file mode 100644
index 0000000..ecd1825
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-7.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "wrssd" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "wrss\[d|q]" 2 { target lp64 } } } */
+
+#include <immintrin.h>
+
+void f1 (unsigned int __A, void *__B)
+{
+  _wrssd (__A, __B);
+}
+
+#ifdef __x86_64__
+void f2 (unsigned long long __A, void *__B)
+{
+  _wrssq (__A, __B);
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-8.c b/gcc/testsuite/gcc.target/i386/cet-intrin-8.c
new file mode 100644
index 0000000..2188876
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-8.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "wrussd" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "wruss\[d|q]" 2 { target lp64 } } } */
+
+#include <immintrin.h>
+
+void f1 (unsigned int __A, void *__B)
+{
+  _wrussd (__A, __B);
+}
+
+#ifdef __x86_64__
+void f2 (unsigned long long __A, void *__B)
+{
+  _wrussq (__A, __B);
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/cet-intrin-9.c b/gcc/testsuite/gcc.target/i386/cet-intrin-9.c
new file mode 100644
index 0000000..569931a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-intrin-9.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "setssbsy" 1 } } */
+
+#include <immintrin.h>
+
+void f2 (void)
+{
+  _setssbsy ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-label.c b/gcc/testsuite/gcc.target/i386/cet-label.c
new file mode 100644
index 0000000..8fb8d42
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-label.c
@@ -0,0 +1,16 @@
+/* Verify that CET works.  */
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 3 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 3 { target { ! ia32 } } } } */
+
+int func (int arg)
+{
+  static void *array[] = { &&foo, &&bar };
+
+  goto *array[arg];
+foo:
+  return arg*111;
+bar:
+  return arg*777;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-1a.c b/gcc/testsuite/gcc.target/i386/cet-notrack-1a.c
new file mode 100644
index 0000000..ab0bd3b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-1a.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -fcf-protection=none -mno-cet" } */
+/* { dg-final { scan-assembler-not "endbr" } } */
+/* { dg-final { scan-assembler-not "notrack call\[ \t]+" } } */
+
+int func (int a) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+int (*fptr) (int a) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+
+int foo (int arg)
+{
+  int a, b;
+  a = func (arg);
+  b = (*fptr) (arg);
+  return a+b;
+}
+
+int __attribute__ ((nocf_check))
+func (int arg)
+{ /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+  int (*fptrl) (int a) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+  return arg*(*fptrl)(arg);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-1b.c b/gcc/testsuite/gcc.target/i386/cet-notrack-1b.c
new file mode 100644
index 0000000..6faf88f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-1b.c
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 2 } } */
+
+int func (int a) __attribute__ ((nocf_check));
+int (*fptr) (int a) __attribute__ ((nocf_check));
+
+int foo (int arg)
+{
+int a, b;
+  a = func (arg);
+  b = (*fptr) (arg);
+  return a+b;
+}
+
+int __attribute__ ((nocf_check))
+func (int arg)
+{
+int (*fptrl) (int a) __attribute__ ((nocf_check));
+  return arg*(*fptrl)(arg);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-2a.c b/gcc/testsuite/gcc.target/i386/cet-notrack-2a.c
new file mode 100644
index 0000000..6f441e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-2a.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+
+void
+bar (void (*foo) (void))
+{
+  void (*func) (void) __attribute__((nocf_check)) = foo; /* { dg-warning "incompatible pointer type" } */
+  func ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-2b.c b/gcc/testsuite/gcc.target/i386/cet-notrack-2b.c
new file mode 100644
index 0000000..0df4645
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-2b.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack jmp\[ \t]+" 1 } } */
+
+void
+bar (void (*foo) (void))
+{
+  void (*func) (void) __attribute__((nocf_check)) = foo; /* { dg-warning "incompatible pointer type" } */
+  func ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-3.c b/gcc/testsuite/gcc.target/i386/cet-notrack-3.c
new file mode 100644
index 0000000..5e124c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-3.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+
+typedef void (*func_t) (void) __attribute__((nocf_check));
+extern func_t func;
+
+void
+bar (void)
+{
+  func ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-4a.c b/gcc/testsuite/gcc.target/i386/cet-notrack-4a.c
new file mode 100644
index 0000000..34cfd90
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-4a.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-fcf-protection=none -mno-cet" } */
+
+int var1 __attribute__((nocf_check)); /* { dg-warning "'nocf_check' attribute only applies to function types" } */
+int *var2 __attribute__((nocf_check)); /* { dg-warning "'nocf_check' attribute only applies to function types" } */
+void (**var3) (void) __attribute__((nocf_check)); /* { dg-warning "'nocf_check' attribute only applies to function types" } */
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-4b.c b/gcc/testsuite/gcc.target/i386/cet-notrack-4b.c
new file mode 100644
index 0000000..6065ef6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-4b.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+
+int var1 __attribute__((nocf_check)); /* { dg-warning "'nocf_check' attribute only applies to function types" } */
+int *var2 __attribute__((nocf_check)); /* { dg-warning "'nocf_check' attribute only applies to function types" } */
+void (**var3) (void) __attribute__((nocf_check)); /* { dg-warning "'nocf_check' attribute only applies to function types" } */
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-5a.c b/gcc/testsuite/gcc.target/i386/cet-notrack-5a.c
new file mode 100644
index 0000000..d23968e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-5a.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-not "\tcall\[ \t]+" } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+
+int (*fptr) (int) __attribute__ ((nocf_check));
+
+int
+foo (int arg)
+{
+  int a;
+  a = (*fptr) (arg); /* notrack call.  */
+  return arg+a;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-5b.c b/gcc/testsuite/gcc.target/i386/cet-notrack-5b.c
new file mode 100644
index 0000000..42d9d07
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-5b.c
@@ -0,0 +1,21 @@
+/* Check the attribute do not proparate through assignment.  */
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "\tcall\[ \t]+" 1 } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+
+int (*fptr) (int) __attribute__ ((nocf_check));
+int (*fptr1) (int);
+
+int
+foo (int arg)
+{
+  int a;
+  a = (*fptr) (arg); /* non-checked call.  */
+  arg += a;
+  fptr1 = fptr; /* { dg-warning "incompatible pointer type" } */ 
+  a = (*fptr1) (arg); /* checked call.  */
+  return arg+a;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-6a.c b/gcc/testsuite/gcc.target/i386/cet-notrack-6a.c
new file mode 100644
index 0000000..e0fb4f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-6a.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "\t(?:call|jmp)\[ \t]+.*foo" 1 } } */
+/* { dg-final { scan-assembler-not "notrack call\[ \t]+" } } */
+
+int foo (int arg);
+
+int func (int arg)
+{
+  int (*fptrl) (int a) __attribute__ ((nocf_check)) = foo; /* { dg-warning "incompatible pointer type" } */
+
+  return (*fptrl)(arg);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-6b.c b/gcc/testsuite/gcc.target/i386/cet-notrack-6b.c
new file mode 100644
index 0000000..1c47c9f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-6b.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-not "\tcall\[ \t]+" } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+" 1 } } */
+
+int foo (int arg);
+
+int func (int arg)
+{
+  int (*fptrl) (int a) __attribute__ ((nocf_check)) = foo; /* { dg-warning "incompatible pointer type" } */
+
+  return (*fptrl)(arg);  /* notrack call.  */
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-7.c b/gcc/testsuite/gcc.target/i386/cet-notrack-7.c
new file mode 100644
index 0000000..f2e31d0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-7.c
@@ -0,0 +1,15 @@
+/* Check the notrack prefix is not generated for direct call.  */
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack call\[ \t]+.*foo" 0 } } */
+/* { dg-final { scan-assembler-times "\tcall\[ \t]+.*foo" 1 } } */
+
+extern void foo (void) __attribute__((nocf_check));
+
+void
+bar (void)
+{
+  foo ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-icf-1.c b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-1.c
new file mode 100644
index 0000000..7987d53
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-1.c
@@ -0,0 +1,31 @@
+/* Verify nocf_check functions are not ICF optimized.  */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-not "endbr" } } */
+/* { dg-final { scan-assembler-not "fn3:" } } */
+/* { dg-final { scan-assembler "set\[ \t]+fn2,fn1" } } */
+/* { dg-final { scan-assembler "set\[ \t]+fn3,fn1" } } */
+
+static __attribute__((noinline)) int
+fn1 (int x)
+{
+  return x + 12;
+}
+
+static __attribute__((noinline)) int
+fn2 (int x)
+{
+  return x + 12;
+}
+
+static __attribute__((noinline, nocf_check)) int
+fn3 (int x)
+{ /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+  return x + 12;
+}
+
+int
+fn4 (int x)
+{
+  return fn1 (x) + fn2 (x) + fn3 (x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-icf-2.c b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-2.c
new file mode 100644
index 0000000..db0b0a4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-2.c
@@ -0,0 +1,30 @@
+/* Verify nocf_check functions are not ICF optimized.  */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler "endbr" } } */
+/* { dg-final { scan-assembler "fn3:" } } */
+/* { dg-final { scan-assembler "set\[ \t]+fn2,fn1" } } */
+
+static __attribute__((noinline)) int
+fn1 (int x)
+{
+  return x + 12;
+}
+
+static __attribute__((noinline)) int
+fn2 (int x)
+{
+  return x + 12;
+}
+
+static __attribute__((noinline, nocf_check)) int
+fn3 (int x)
+{
+  return x + 12;
+}
+
+int
+fn4 (int x)
+{
+  return fn1 (x) + fn2 (x) + fn3 (x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-icf-3.c b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-3.c
new file mode 100644
index 0000000..07c4a6b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-3.c
@@ -0,0 +1,36 @@
+/* Verify nocf_check function calls are not ICF optimized.  */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-not "endbr" } } */
+/* { dg-final { scan-assembler-not "fn2:" } } */
+/* { dg-final { scan-assembler "set\[ \t]+fn2,fn1" } } */
+/* { dg-final { scan-assembler "set\[ \t]+fn3,fn1" } } */
+
+int (*foo)(int);
+
+typedef int (*type1_t) (int) __attribute__ ((nocf_check)); /* { dg-warning "'nocf_check' attribute ignored. Use -fcf-protection option to enable it" } */
+typedef int (*type2_t) (int);
+
+static __attribute__((noinline)) int
+fn1 (int x)
+{
+  return ((type2_t)foo)(x + 12);
+}
+
+static __attribute__((noinline)) int
+fn2 (int x)
+{
+  return ((type1_t)foo)(x + 12);
+}
+
+static __attribute__((noinline)) int
+fn3 (int x)
+{
+  return ((type2_t)foo)(x + 12);
+}
+
+int
+fn4 (int x)
+{
+  return fn1 (x) + fn2 (x) + fn3 (x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-notrack-icf-4.c b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-4.c
new file mode 100644
index 0000000..e4e96aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-notrack-icf-4.c
@@ -0,0 +1,35 @@
+/* Verify nocf_check function calls are not ICF optimized.  */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler "endbr" } } */
+/* { dg-final { scan-assembler "fn2:" } } */
+/* { dg-final { scan-assembler "set\[ \t]+fn3,fn1" } } */
+
+int (*foo)(int);
+
+typedef int (*type1_t) (int) __attribute__ ((nocf_check));
+typedef int (*type2_t) (int);
+
+static __attribute__((noinline)) int
+fn1 (int x)
+{
+  return ((type2_t)foo)(x + 12);
+}
+
+static __attribute__((noinline)) int
+fn2 (int x)
+{
+  return ((type1_t)foo)(x + 12);
+}
+
+static __attribute__((noinline)) int
+fn3 (int x)
+{
+  return ((type2_t)foo)(x + 12);
+}
+
+int
+fn4 (int x)
+{
+  return fn1 (x) + fn2 (x) + fn3 (x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-property-1.c b/gcc/testsuite/gcc.target/i386/cet-property-1.c
new file mode 100644
index 0000000..df243ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-property-1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-fcf-protection -mcet" } */
+/* { dg-final { scan-assembler ".note.gnu.property" } } */
+
+extern void foo (void);
+
+void
+bar (void)
+{
+  foo ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-property-2.c b/gcc/testsuite/gcc.target/i386/cet-property-2.c
new file mode 100644
index 0000000..5a87dab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-property-2.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mcet" } */
+/* { dg-final { scan-assembler-not ".note.gnu.property" } } */
+
+extern void foo (void);
+
+void
+bar (void)
+{
+  foo ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
new file mode 100644
index 0000000..fb50ff4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
@@ -0,0 +1,39 @@
+/* { dg-do run { target cet } } */
+/* { dg-options "-O2 -fcf-protection -mcet" } */
+
+void _exit(int status) __attribute__ ((__noreturn__));
+
+#ifdef __x86_64__
+# define incssp(x) __builtin_ia32_incsspq (x)
+# define rdssp(x) __builtin_ia32_rdsspq (x)
+#else
+# define incssp(x) __builtin_ia32_incsspd (x)
+# define rdssp(x) __builtin_ia32_rdsspd (x)
+#endif
+
+static void
+__attribute__ ((noinline, noclone))
+test (unsigned long frames)
+{
+  unsigned long ssp = 0;
+  ssp = rdssp (ssp);
+  if (ssp != 0)
+    {
+      unsigned long tmp = frames;
+      while (tmp > 255)
+	{
+	  incssp (tmp);
+	  tmp -= 255;
+	}
+      incssp (tmp);
+    }
+  /* We must call _exit since shadow stack is incorrect now.  */
+  _exit (0);
+}
+
+int
+main ()
+{
+  test (1);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-sjlj-1.c b/gcc/testsuite/gcc.target/i386/cet-sjlj-1.c
new file mode 100644
index 0000000..374d12a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-sjlj-1.c
@@ -0,0 +1,42 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 4 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 4 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "rdssp\[dq]" 2 } } */
+/* { dg-final { scan-assembler-times "incssp\[dq]" 1 } } */
+
+/* Based on gcc.dg/setjmp-3.c.  */
+
+void *buf[5];
+
+extern void abort (void);
+
+void raise0(void)
+{
+  __builtin_longjmp (buf, 1);
+}
+
+int execute(int cmd)
+{
+  int last = 0;
+
+  if (__builtin_setjmp (buf) == 0)
+    while (1)
+      {
+	last = 1;
+	raise0 ();
+      }
+
+  if (last == 0)
+    return 0;
+  else
+    return cmd;
+}
+
+int main(void)
+{
+  if (execute (1) == 0)
+    abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-sjlj-2.c b/gcc/testsuite/gcc.target/i386/cet-sjlj-2.c
new file mode 100644
index 0000000..c97094a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-sjlj-2.c
@@ -0,0 +1,4 @@
+/* { dg-do run { target cet } } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+
+#include "cet-sjlj-1.c"
diff --git a/gcc/testsuite/gcc.target/i386/cet-sjlj-3.c b/gcc/testsuite/gcc.target/i386/cet-sjlj-3.c
new file mode 100644
index 0000000..c1efbbe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-sjlj-3.c
@@ -0,0 +1,46 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 4 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 4 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "call	_setjmp" 1 } } */
+/* { dg-final { scan-assembler-times "call	longjmp" 1 } } */
+
+#include <stdio.h>
+#include <setjmp.h>
+
+jmp_buf buf;
+int bar (int);
+
+int
+foo (int i)
+{
+  int j = i * 11;
+
+  if (!setjmp (buf))
+    {
+      j += 33;
+      printf ("After setjmp: j = %d\n", j);
+      bar (j);
+    }
+
+  return j + i;
+}
+
+int
+bar (int i)
+{
+int j = i;
+
+  j -= 111;
+  printf ("In longjmp: j = %d\n", j);
+  longjmp (buf, 1);
+
+  return j;
+}
+
+int
+main ()
+{
+  foo (10);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-switch-1.c b/gcc/testsuite/gcc.target/i386/cet-switch-1.c
new file mode 100644
index 0000000..7a75857
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-switch-1.c
@@ -0,0 +1,26 @@
+/* Verify that CET works.  */
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "notrack jmp\[ \t]+\[*]" 1 } } */
+
+void func2 (int);
+
+int func1 (int arg)
+{
+  switch (arg)
+  {
+    case 1: func2 (arg*100);
+    case 2: func2 (arg*300);
+    case 5: func2 (arg*500);
+    case 8: func2 (arg*700);
+    case 7: func2 (arg*900);
+    case -1: func2 (arg*-100);
+    case -2: func2 (arg*-300);
+    case -5: func2 (arg*-500);
+    case -7: func2 (arg*-700);
+    case -9: func2 (arg*-900);
+  }
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cet-switch-2.c b/gcc/testsuite/gcc.target/i386/cet-switch-2.c
new file mode 100644
index 0000000..e620b83
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-switch-2.c
@@ -0,0 +1,26 @@
+/* Verify that CET works.  */
+/* { dg-do compile } */
+/* { dg-options "-O -fcf-protection -mcet -mcet-switch" } */
+/* { dg-final { scan-assembler-times "endbr32" 12 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 12 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "\[ \t]+jmp\[ \t]+\[*]" 1 } } */
+
+void func2 (int);
+
+int func1 (int arg)
+{
+  switch (arg)
+  {
+    case 1: func2 (arg*100);
+    case 2: func2 (arg*300);
+    case 5: func2 (arg*500);
+    case 8: func2 (arg*700);
+    case 7: func2 (arg*900);
+    case -1: func2 (arg*-100);
+    case -2: func2 (arg*-300);
+    case -5: func2 (arg*-500);
+    case -7: func2 (arg*-700);
+    case -9: func2 (arg*-900);
+  }
+  return 0;
+}
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 2733c62..2ce3d97 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8594,3 +8594,16 @@ proc check_effective_target_autoincdec { } {
     }
     return 0
 }
+
+# Return 1 if CET instructions can be compiled.
+proc check_effective_target_cet { } {
+    if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+	return 0
+    }
+    return [check_no_compiler_messages cet object {
+	void foo (void)
+	{
+	  asm ("setssbsy");
+	}
+    } "-O2" ]
+}
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 17+ messages in thread

* RE: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
  2017-09-19 16:13   ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Uros Bizjak
@ 2017-09-19 21:29     ` Tsimbalist, Igor V
  2017-10-12 18:56       ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
  0 siblings, 1 reply; 17+ messages in thread
From: Tsimbalist, Igor V @ 2017-09-19 21:29 UTC (permalink / raw)
  To: Uros Bizjak; +Cc: gcc-patches, Tsimbalist, Igor V

> -----Original Message-----
> From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
> owner@gcc.gnu.org] On Behalf Of Uros Bizjak
> Sent: Tuesday, September 19, 2017 6:13 PM
> To: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> 
> On Tue, Sep 19, 2017 at 5:18 PM, Tsimbalist, Igor V
> <igor.v.tsimbalist@intel.com> wrote:
> >> -----Original Message-----
> >> From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
> >> owner@gcc.gnu.org] On Behalf Of Uros Bizjak
> >> Sent: Monday, September 18, 2017 12:17 PM
> >> To: gcc-patches@gcc.gnu.org
> >> Cc: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>; Tsimbalist,
> >> Igor V <igor.v.tsimbalist@intel.com>
> >> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> >>
> >> Hello!
> >>
> >> > gcc/testsuite/
> >> >
> >> > * g++.dg/cet-notrack-1.C: New test.
> >> > * gcc.target/i386/cet-intrin-1.c: Likewise.
> >> > * gcc.target/i386/cet-intrin-10.c: Likewise.
> >> > * gcc.target/i386/cet-intrin-2.c: Likewise.
> >> > * gcc.target/i386/cet-intrin-3.c: Likewise.
> >> > * gcc.target/i386/cet-intrin-4.c: Likewise.
> >> > * gcc.target/i386/cet-intrin-5.c: Likewise.
> >> > * gcc.target/i386/cet-intrin-6.c: Likewise.
> >> > * gcc.target/i386/cet-intrin-7.c: Likewise.
> >> > * gcc.target/i386/cet-intrin-8.c: Likewise.
> >> > * gcc.target/i386/cet-intrin-9.c: Likewise.
> >> > * gcc.target/i386/cet-label.c: Likewise.
> >> > * gcc.target/i386/cet-notrack-1a.c: Likewise.
> >> > * gcc.target/i386/cet-notrack-1b.c: Likewise.
> >> > * gcc.target/i386/cet-notrack-2a.c: Likewise.
> >> > * gcc.target/i386/cet-notrack-2b.c: Likewise.
> >> > * gcc.target/i386/cet-notrack-3.c: Likewise.
> >> > * gcc.target/i386/cet-notrack-4a.c: Likewise.
> >> > * gcc.target/i386/cet-notrack-4b.c: Likewise.
> >> > * gcc.target/i386/cet-notrack-5a.c: Likewise.
> >> > * gcc.target/i386/cet-notrack-5b.c: Likewise.
> >> > * gcc.target/i386/cet-notrack-6a.c: Likewise.
> >> > * gcc.target/i386/cet-notrack-6b.c: Likewise.
> >> > * gcc.target/i386/cet-notrack-7.c: Likewise.
> >> > * gcc.target/i386/cet-property-1.c: Likewise.
> >> > * gcc.target/i386/cet-property-2.c: Likewise.
> >> > * gcc.target/i386/cet-rdssp-1.c: Likewise.
> >> > * gcc.target/i386/cet-sjlj-1.c: Likewise.
> >> > * gcc.target/i386/cet-sjlj-2.c: Likewise.
> >> > * gcc.target/i386/cet-sjlj-3.c: Likewise.
> >> > * gcc.target/i386/cet-switch-1.c: Likewise.
> >> > * gcc.target/i386/cet-switch-2.c: Likewise.
> >> > * lib/target-supports.exp (check_effective_target_cet): New proc.
> >>
> >> A couple of questions:
> >>
> >> +/* { dg-do compile } */
> >> +/* { dg-options "-O2 -mcet" } */
> >> +/* { dg-final { scan-assembler-times "setssbsy" 2 } } */
> >> +
> >> +#include <immintrin.h>
> >> +
> >> +void f1 (void)
> >> +{
> >> +  __builtin_ia32_setssbsy ();
> >> +}
> >> +
> >> +void f2 (void)
> >> +{
> >> +  _setssbsy ();
> >> +}
> >>
> >> Is there a reason that both, __builtin and intrinsic versions are
> >> tested in a couple of places? The intrinsic version is just a wrapper
> >> for __builtin, so IMO testing intrinsic version should be enough.
> > No strong reason. Just to check that intrinsic names are recognized and
> processed correctly.
> > The implementation could change and the test will catch inconsistency.
> > I would also assume a user will use intrinsics that's why I add intrinsic check.
> Should I remove it?
> 
> Actually, these __builtins are considered as implementation detail, and their
> use should be discouraged. They are deliberately not documented, and users
> should use intrinsic headers instead. That said, builtins won't change without
> a reason, since Ada needs them.
> 
> It can happen that the test fails due to change of intrinsics, so I'd recommend
> to remove them.
Ok, I will remove intrinsic.

> >> diff --git a/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
> >> b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
> >> new file mode 100644
> >> index 0000000..f9223a5
> >> --- /dev/null
> >> +++ b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
> >> @@ -0,0 +1,39 @@
> >> +/* { dg-do run { target cet } } */
> >> +/* { dg-options "-O2 -finstrument-control-flow -mcet" } */
> >>
> >> The "target cet" directive just checks that CET instructions can be
> compiled.
> >> The test will (probably?) fail on targets with binutils that can
> >> compile CET instructions, but the target itself doesn't support CET.
> >> If this is the case, then check header has to be introduced, so the
> >> test can be bypassed on targets without runtime support.
> > The test will not fail even if a target doesn't support CET as 'rdssp'
> > instruction is a NOP on such target and further usage of CET
> > instruction is bypassed. In this case the code
> >
> > +  ssp = rdssp (ssp);
> >
> > Will keep ssp as 0.
> 
> I assume that this is true also for other runtime tests, and this clears my
> concern about runtime failures with updated binutils.
Yes, that's true for other runtime tests.

Igor

> 
> Uros.

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
  2017-09-19 15:18 ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
@ 2017-09-19 16:13   ` Uros Bizjak
  2017-09-19 21:29     ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
  0 siblings, 1 reply; 17+ messages in thread
From: Uros Bizjak @ 2017-09-19 16:13 UTC (permalink / raw)
  To: Tsimbalist, Igor V; +Cc: gcc-patches

On Tue, Sep 19, 2017 at 5:18 PM, Tsimbalist, Igor V
<igor.v.tsimbalist@intel.com> wrote:
>> -----Original Message-----
>> From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
>> owner@gcc.gnu.org] On Behalf Of Uros Bizjak
>> Sent: Monday, September 18, 2017 12:17 PM
>> To: gcc-patches@gcc.gnu.org
>> Cc: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>; Tsimbalist, Igor V
>> <igor.v.tsimbalist@intel.com>
>> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
>>
>> Hello!
>>
>> > gcc/testsuite/
>> >
>> > * g++.dg/cet-notrack-1.C: New test.
>> > * gcc.target/i386/cet-intrin-1.c: Likewise.
>> > * gcc.target/i386/cet-intrin-10.c: Likewise.
>> > * gcc.target/i386/cet-intrin-2.c: Likewise.
>> > * gcc.target/i386/cet-intrin-3.c: Likewise.
>> > * gcc.target/i386/cet-intrin-4.c: Likewise.
>> > * gcc.target/i386/cet-intrin-5.c: Likewise.
>> > * gcc.target/i386/cet-intrin-6.c: Likewise.
>> > * gcc.target/i386/cet-intrin-7.c: Likewise.
>> > * gcc.target/i386/cet-intrin-8.c: Likewise.
>> > * gcc.target/i386/cet-intrin-9.c: Likewise.
>> > * gcc.target/i386/cet-label.c: Likewise.
>> > * gcc.target/i386/cet-notrack-1a.c: Likewise.
>> > * gcc.target/i386/cet-notrack-1b.c: Likewise.
>> > * gcc.target/i386/cet-notrack-2a.c: Likewise.
>> > * gcc.target/i386/cet-notrack-2b.c: Likewise.
>> > * gcc.target/i386/cet-notrack-3.c: Likewise.
>> > * gcc.target/i386/cet-notrack-4a.c: Likewise.
>> > * gcc.target/i386/cet-notrack-4b.c: Likewise.
>> > * gcc.target/i386/cet-notrack-5a.c: Likewise.
>> > * gcc.target/i386/cet-notrack-5b.c: Likewise.
>> > * gcc.target/i386/cet-notrack-6a.c: Likewise.
>> > * gcc.target/i386/cet-notrack-6b.c: Likewise.
>> > * gcc.target/i386/cet-notrack-7.c: Likewise.
>> > * gcc.target/i386/cet-property-1.c: Likewise.
>> > * gcc.target/i386/cet-property-2.c: Likewise.
>> > * gcc.target/i386/cet-rdssp-1.c: Likewise.
>> > * gcc.target/i386/cet-sjlj-1.c: Likewise.
>> > * gcc.target/i386/cet-sjlj-2.c: Likewise.
>> > * gcc.target/i386/cet-sjlj-3.c: Likewise.
>> > * gcc.target/i386/cet-switch-1.c: Likewise.
>> > * gcc.target/i386/cet-switch-2.c: Likewise.
>> > * lib/target-supports.exp (check_effective_target_cet): New proc.
>>
>> A couple of questions:
>>
>> +/* { dg-do compile } */
>> +/* { dg-options "-O2 -mcet" } */
>> +/* { dg-final { scan-assembler-times "setssbsy" 2 } } */
>> +
>> +#include <immintrin.h>
>> +
>> +void f1 (void)
>> +{
>> +  __builtin_ia32_setssbsy ();
>> +}
>> +
>> +void f2 (void)
>> +{
>> +  _setssbsy ();
>> +}
>>
>> Is there a reason that both, __builtin and intrinsic versions are tested in a
>> couple of places? The intrinsic version is just a wrapper for __builtin, so IMO
>> testing intrinsic version should be enough.
> No strong reason. Just to check that intrinsic names are recognized and processed correctly.
> The implementation could change and the test will catch inconsistency. I would also assume
> a user will use intrinsics that's why I add intrinsic check. Should I remove it?

Actually, these __builtins are considered as implementation detail,
and their use should be discouraged. They are deliberately not
documented, and users should use intrinsic headers instead. That said,
builtins won't change without a reason, since Ada needs them.

It can happen that the test fails due to change of intrinsics, so I'd
recommend to remove them.

>> diff --git a/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
>> b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
>> new file mode 100644
>> index 0000000..f9223a5
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
>> @@ -0,0 +1,39 @@
>> +/* { dg-do run { target cet } } */
>> +/* { dg-options "-O2 -finstrument-control-flow -mcet" } */
>>
>> The "target cet" directive just checks that CET instructions can be compiled.
>> The test will (probably?) fail on targets with binutils that can compile CET
>> instructions, but the target itself doesn't support CET. If this is the case, then
>> check header has to be introduced, so the test can be bypassed on targets
>> without runtime support.
> The test will not fail even if a target doesn't support CET as 'rdssp' instruction is a
> NOP on such target and further usage of CET instruction is bypassed. In this case
> the code
>
> +  ssp = rdssp (ssp);
>
> Will keep ssp as 0.

I assume that this is true also for other runtime tests, and this
clears my concern about runtime failures with updated binutils.

Uros.

^ permalink raw reply	[flat|nested] 17+ messages in thread

* RE: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
  2017-09-18 10:17 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Uros Bizjak
@ 2017-09-19 15:18 ` Tsimbalist, Igor V
  2017-09-19 16:13   ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Uros Bizjak
  0 siblings, 1 reply; 17+ messages in thread
From: Tsimbalist, Igor V @ 2017-09-19 15:18 UTC (permalink / raw)
  To: Uros Bizjak; +Cc: gcc-patches, Tsimbalist, Igor V

> -----Original Message-----
> From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
> owner@gcc.gnu.org] On Behalf Of Uros Bizjak
> Sent: Monday, September 18, 2017 12:17 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Tsimbalist, Igor V <igor.v.tsimbalist@intel.com>; Tsimbalist, Igor V
> <igor.v.tsimbalist@intel.com>
> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> 
> Hello!
> 
> > gcc/testsuite/
> >
> > * g++.dg/cet-notrack-1.C: New test.
> > * gcc.target/i386/cet-intrin-1.c: Likewise.
> > * gcc.target/i386/cet-intrin-10.c: Likewise.
> > * gcc.target/i386/cet-intrin-2.c: Likewise.
> > * gcc.target/i386/cet-intrin-3.c: Likewise.
> > * gcc.target/i386/cet-intrin-4.c: Likewise.
> > * gcc.target/i386/cet-intrin-5.c: Likewise.
> > * gcc.target/i386/cet-intrin-6.c: Likewise.
> > * gcc.target/i386/cet-intrin-7.c: Likewise.
> > * gcc.target/i386/cet-intrin-8.c: Likewise.
> > * gcc.target/i386/cet-intrin-9.c: Likewise.
> > * gcc.target/i386/cet-label.c: Likewise.
> > * gcc.target/i386/cet-notrack-1a.c: Likewise.
> > * gcc.target/i386/cet-notrack-1b.c: Likewise.
> > * gcc.target/i386/cet-notrack-2a.c: Likewise.
> > * gcc.target/i386/cet-notrack-2b.c: Likewise.
> > * gcc.target/i386/cet-notrack-3.c: Likewise.
> > * gcc.target/i386/cet-notrack-4a.c: Likewise.
> > * gcc.target/i386/cet-notrack-4b.c: Likewise.
> > * gcc.target/i386/cet-notrack-5a.c: Likewise.
> > * gcc.target/i386/cet-notrack-5b.c: Likewise.
> > * gcc.target/i386/cet-notrack-6a.c: Likewise.
> > * gcc.target/i386/cet-notrack-6b.c: Likewise.
> > * gcc.target/i386/cet-notrack-7.c: Likewise.
> > * gcc.target/i386/cet-property-1.c: Likewise.
> > * gcc.target/i386/cet-property-2.c: Likewise.
> > * gcc.target/i386/cet-rdssp-1.c: Likewise.
> > * gcc.target/i386/cet-sjlj-1.c: Likewise.
> > * gcc.target/i386/cet-sjlj-2.c: Likewise.
> > * gcc.target/i386/cet-sjlj-3.c: Likewise.
> > * gcc.target/i386/cet-switch-1.c: Likewise.
> > * gcc.target/i386/cet-switch-2.c: Likewise.
> > * lib/target-supports.exp (check_effective_target_cet): New proc.
> 
> A couple of questions:
> 
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -mcet" } */
> +/* { dg-final { scan-assembler-times "setssbsy" 2 } } */
> +
> +#include <immintrin.h>
> +
> +void f1 (void)
> +{
> +  __builtin_ia32_setssbsy ();
> +}
> +
> +void f2 (void)
> +{
> +  _setssbsy ();
> +}
> 
> Is there a reason that both, __builtin and intrinsic versions are tested in a
> couple of places? The intrinsic version is just a wrapper for __builtin, so IMO
> testing intrinsic version should be enough.
No strong reason. Just to check that intrinsic names are recognized and processed correctly.
The implementation could change and the test will catch inconsistency. I would also assume
a user will use intrinsics that's why I add intrinsic check. Should I remove it?

> 
> diff --git a/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
> b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
> new file mode 100644
> index 0000000..f9223a5
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
> @@ -0,0 +1,39 @@
> +/* { dg-do run { target cet } } */
> +/* { dg-options "-O2 -finstrument-control-flow -mcet" } */
> 
> The "target cet" directive just checks that CET instructions can be compiled.
> The test will (probably?) fail on targets with binutils that can compile CET
> instructions, but the target itself doesn't support CET. If this is the case, then
> check header has to be introduced, so the test can be bypassed on targets
> without runtime support.
The test will not fail even if a target doesn't support CET as 'rdssp' instruction is a
NOP on such target and further usage of CET instruction is bypassed. In this case
the code

+  ssp = rdssp (ssp);

Will keep ssp as 0.

Thanks,
Igor

> Uros.

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
@ 2017-09-18 10:17 Uros Bizjak
  2017-09-19 15:18 ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
  0 siblings, 1 reply; 17+ messages in thread
From: Uros Bizjak @ 2017-09-18 10:17 UTC (permalink / raw)
  To: gcc-patches; +Cc: Tsimbalist, Igor V

Hello!

> gcc/testsuite/
>
> * g++.dg/cet-notrack-1.C: New test.
> * gcc.target/i386/cet-intrin-1.c: Likewise.
> * gcc.target/i386/cet-intrin-10.c: Likewise.
> * gcc.target/i386/cet-intrin-2.c: Likewise.
> * gcc.target/i386/cet-intrin-3.c: Likewise.
> * gcc.target/i386/cet-intrin-4.c: Likewise.
> * gcc.target/i386/cet-intrin-5.c: Likewise.
> * gcc.target/i386/cet-intrin-6.c: Likewise.
> * gcc.target/i386/cet-intrin-7.c: Likewise.
> * gcc.target/i386/cet-intrin-8.c: Likewise.
> * gcc.target/i386/cet-intrin-9.c: Likewise.
> * gcc.target/i386/cet-label.c: Likewise.
> * gcc.target/i386/cet-notrack-1a.c: Likewise.
> * gcc.target/i386/cet-notrack-1b.c: Likewise.
> * gcc.target/i386/cet-notrack-2a.c: Likewise.
> * gcc.target/i386/cet-notrack-2b.c: Likewise.
> * gcc.target/i386/cet-notrack-3.c: Likewise.
> * gcc.target/i386/cet-notrack-4a.c: Likewise.
> * gcc.target/i386/cet-notrack-4b.c: Likewise.
> * gcc.target/i386/cet-notrack-5a.c: Likewise.
> * gcc.target/i386/cet-notrack-5b.c: Likewise.
> * gcc.target/i386/cet-notrack-6a.c: Likewise.
> * gcc.target/i386/cet-notrack-6b.c: Likewise.
> * gcc.target/i386/cet-notrack-7.c: Likewise.
> * gcc.target/i386/cet-property-1.c: Likewise.
> * gcc.target/i386/cet-property-2.c: Likewise.
> * gcc.target/i386/cet-rdssp-1.c: Likewise.
> * gcc.target/i386/cet-sjlj-1.c: Likewise.
> * gcc.target/i386/cet-sjlj-2.c: Likewise.
> * gcc.target/i386/cet-sjlj-3.c: Likewise.
> * gcc.target/i386/cet-switch-1.c: Likewise.
> * gcc.target/i386/cet-switch-2.c: Likewise.
> * lib/target-supports.exp (check_effective_target_cet): New
> proc.

A couple of questions:

+/* { dg-do compile } */
+/* { dg-options "-O2 -mcet" } */
+/* { dg-final { scan-assembler-times "setssbsy" 2 } } */
+
+#include <immintrin.h>
+
+void f1 (void)
+{
+  __builtin_ia32_setssbsy ();
+}
+
+void f2 (void)
+{
+  _setssbsy ();
+}

Is there a reason that both, __builtin and intrinsic versions are
tested in a couple of places? The intrinsic version is just a wrapper
for __builtin, so IMO testing intrinsic version should be enough.


diff --git a/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
new file mode 100644
index 0000000..f9223a5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-rdssp-1.c
@@ -0,0 +1,39 @@
+/* { dg-do run { target cet } } */
+/* { dg-options "-O2 -finstrument-control-flow -mcet" } */

The "target cet" directive just checks that CET instructions can be
compiled. The test will (probably?) fail on targets with binutils that
can compile CET instructions, but the target itself doesn't support
CET. If this is the case, then check header has to be introduced, so
the test can be bypassed on targets without runtime support.

Uros.

^ permalink raw reply	[flat|nested] 17+ messages in thread

end of thread, other threads:[~2017-10-24 16:02 UTC | newest]

Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-08-01  8:57 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
2017-08-25 22:46 ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Jeff Law
2017-09-15 15:36   ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
2017-09-18 10:17 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Uros Bizjak
2017-09-19 15:18 ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
2017-09-19 16:13   ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Uros Bizjak
2017-09-19 21:29     ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
2017-10-12 18:56       ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
2017-10-13  9:10         ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Uros Bizjak
2017-10-13 11:01           ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
2017-10-13 12:01             ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Uros Bizjak
2017-10-24 15:37               ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Rainer Orth
2017-10-24 16:04                 ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Uros Bizjak
2017-10-22 11:58             ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Andreas Schwab
2017-10-22 17:39               ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V
2017-10-22 12:26             ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation H.J. Lu
2017-10-22 14:14               ` 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation Tsimbalist, Igor V

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