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From: "Tsimbalist, Igor V" <igor.v.tsimbalist@intel.com>
To: Florian Weimer <fweimer@redhat.com>,
	Sandra Loosemore	<sandra@codesourcery.com>,
	Uros Bizjak <ubizjak@gmail.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
	"Tsimbalist, Igor V"	<igor.v.tsimbalist@intel.com>
Subject: RE: 0005-Part-5.-Add-x86-CET-documentation
Date: Wed, 27 Sep 2017 11:52:00 -0000	[thread overview]
Message-ID: <D511F25789BA7F4EBA64C8A63891A0028ADB9B67@irsmsx105.ger.corp.intel.com> (raw)
In-Reply-To: <f5e8586c-051d-dd26-9424-c6a8d1083c23@redhat.com>

> -----Original Message-----
> From: Florian Weimer [mailto:fweimer@redhat.com]
> Sent: Wednesday, September 27, 2017 10:52 AM
> To: Sandra Loosemore <sandra@codesourcery.com>; Tsimbalist, Igor V
> <igor.v.tsimbalist@intel.com>; Uros Bizjak <ubizjak@gmail.com>
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: 0005-Part-5.-Add-x86-CET-documentation
> 
> On 09/27/2017 05:40 AM, Sandra Loosemore wrote:
> >>
> >> +@emph{x86 implementation:} when @option{-fcf-protection} option is
> >> +specified the compiler inserts an ENDBR instruction at function's
> >> +prologue if the function's type does not have the @code{nocf_check}
> >> +attribute and addresses to which indirect control-flow transfer can
> >> +happen.  The instruction triggers the HW check if a control-flow
> >> +transfer to the address of ENDBR instruction is valid.
> >
> > Implementation details like this should be comments in the code, not
> > included in the user-facing documentation.
> 
> This is part of the ABI GCC implements, so it has to be documented
> somewhere, and not just as part of the GCC source code.

A question for both Sandra and Florian - What is your suggestion where the text should go?

> CET is not properly described in the ABI supplement and I don't think this will
> change, so detailed documentation in the GCC manual is very much
> desirable.
> 
> That being said, the implementation notes above need some clarification.
>   It's not clear to me what the conditions are under which the ENDBR
> instruction is emitted (and we probably should use @code{endbr} in the
> manual), what it is trying to achieve, and how the x86 calling convention
> changes.  I assume it is somehow related to what we call internally “the suffix

We are diving into implementation details but it's simple enough.

- endbr is generated for every function, which does not have nocf_check attribute.
   Optimization can be done later to exclude functions, whose address was not taken.
- there is no change in calling convention

Thanks,
Igor

> problem”: without control flow integrity, an attacker might skip over
> precondition/hardening checks, directly to the critical changes we want to
> protect, executing only the suffix of a function (hence the name).
> 
> Thanks,
> Florian

  reply	other threads:[~2017-09-27 11:52 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-01  8:57 0005-Part-5.-Add-x86-CET-documentation Tsimbalist, Igor V
2017-09-20  9:21 ` 0005-Part-5.-Add-x86-CET-documentation Tsimbalist, Igor V
2017-09-20 14:13   ` 0005-Part-5.-Add-x86-CET-documentation Uros Bizjak
2017-09-25  3:43     ` 0005-Part-5.-Add-x86-CET-documentation Sandra Loosemore
2017-09-26 13:47       ` 0005-Part-5.-Add-x86-CET-documentation Tsimbalist, Igor V
2017-09-27  3:40         ` 0005-Part-5.-Add-x86-CET-documentation Sandra Loosemore
2017-09-27  8:52           ` 0005-Part-5.-Add-x86-CET-documentation Florian Weimer
2017-09-27 11:52             ` Tsimbalist, Igor V [this message]
2017-09-27 16:48             ` 0005-Part-5.-Add-x86-CET-documentation Sandra Loosemore
2017-09-27 17:01             ` 0005-Part-5.-Add-x86-CET-documentation Joseph Myers
2017-09-28 23:29               ` 0005-Part-5.-Add-x86-CET-documentation Jeff Law
2017-09-27 15:17           ` 0005-Part-5.-Add-x86-CET-documentation Tsimbalist, Igor V
2017-09-28 23:32             ` 0005-Part-5.-Add-x86-CET-documentation Jeff Law
2017-09-29  5:15             ` 0005-Part-5.-Add-x86-CET-documentation Sandra Loosemore

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