From: "Yangfei (Felix)" <felix.yang@huawei.com>
To: "augustine.sterling@gmail.com" <augustine.sterling@gmail.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
Felix Yang <fei.yang0953@gmail.com>
Subject: Re: [PATCH] Add zero-overhead looping for xtensa backend
Date: Fri, 24 Oct 2014 06:43:00 -0000 [thread overview]
Message-ID: <DA41BE1DDCA941489001C7FBD7A8820E5554BB72@szxema507-mbx.china.huawei.com> (raw)
In-Reply-To: <CAGSvup9yzkQCV_TaByLfvFLmqjVhy3+yhjUBDvAG3WJmnMuA4Q@mail.gmail.com>
1. The original xtensa port never generates "loop" instruction at all.
2. A port doesn't need to implement hwloop_pattern_reg hook if it has no zero-cost loop instruction.
Is that clear?
>
> I mean without your patch at all.
>
> On Thu, Oct 23, 2014 at 11:30 PM, Yangfei (Felix) <felix.yang@huawei.com>
> wrote:
> >>
> >> On Thu, Oct 23, 2014 at 9:12 PM, Yangfei (Felix) <felix.yang@huawei.com>
> wrote:
> >> >> Here the key point is we need a general purpose register for the "loop"
> >> >> instruction.
> >>
> >> So the question to ask here is, "How does this work today, without
> >> loop instructions?" Somehow--even when it has been spilled--a branch
> >> instruction can test the trip count. There should be no difference.
> >>
> >> >> And we cannot use zero-cost looping in this situation.
> >> >> And that's why I spilt the zero_cost_loop_end into a normal test and
> branch.
> >>
> >> > Also note that the hwloop_pattern_reg interface also expects a
> >> > general
> >> purpose register in the doloop_end pattern.
> >>
> >> If there were no loop instruction, how would this work?
> >
> >
> > Just take a look at my patch. I handle this in the new define_split:
> >
> > +(define_split
> > + [(set (pc)
> > + (if_then_else (ne (match_operand:SI 0 "nonimmediate_operand"
> "")
> > + (const_int 1))
> > + (label_ref (match_operand 1 "" ""))
> > + (pc)))
> > + (set (match_operand:SI 2 "nonimmediate_operand" "")
> > + (plus:SI (match_dup 0)
> > + (const_int -1)))
> > + (unspec [(const_int 0)] UNSPEC_LSETUP_END)
> > + (clobber (match_scratch 3))]
> > + "TARGET_LOOPS && optimize && reload_completed"
> > + [(const_int 0)]
> > +{
> > + if (!REG_P (operands[0]))
> > + {
> > + rtx test;
> > +
> > + /* Fallback into a normal conditional branch insn. */
> > + emit_move_insn (operands[3], operands[0]);
> > + emit_insn (gen_addsi3 (operands[3], operands[3], constm1_rtx));
> > + emit_move_insn (operands[0], operands[3]);
> > + test = gen_rtx_NE (VOIDmode, operands[3], const0_rtx);
> > + emit_jump_insn (gen_cbranchsi4 (test, operands[3],
> > + const0_rtx, operands[1]));
> > + }
> > + else
> > + {
> > + emit_jump_insn (gen_loop_end (operands[0], operands[1],
> operands[2]));
> > + }
> > +
> > + DONE;
> > +})
next prev parent reply other threads:[~2014-10-24 6:40 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-08 16:27 Felix Yang
2014-01-08 16:49 ` Sterling Augustine
2014-01-09 15:08 ` Felix Yang
2014-01-09 23:51 ` Felix Yang
2014-01-10 3:49 ` Yangfei (Felix)
2014-01-13 17:24 ` Sterling Augustine
2014-10-09 11:04 ` Felix Yang
2014-10-10 14:01 ` Felix Yang
2014-10-11 9:32 ` [PING] [PATCH, xtensa] " Yangfei (Felix)
2014-10-13 16:09 ` [PATCH] " augustine.sterling
2014-10-13 16:30 ` Felix Yang
2014-10-14 15:43 ` Felix Yang
2014-10-15 19:51 ` augustine.sterling
2014-10-16 4:52 ` Yangfei (Felix)
2014-10-21 14:57 ` augustine.sterling
2014-10-22 2:20 ` Yangfei (Felix)
2014-10-22 5:20 ` Yangfei (Felix)
2014-10-23 17:51 ` augustine.sterling
2014-10-24 1:49 ` Yangfei (Felix)
2014-10-24 4:32 ` Yangfei (Felix)
2014-10-24 6:28 ` augustine.sterling
2014-10-24 6:33 ` Yangfei (Felix)
2014-10-24 6:40 ` augustine.sterling
2014-10-24 6:43 ` Yangfei (Felix) [this message]
2014-10-24 6:49 ` augustine.sterling
2014-10-24 6:53 ` Yangfei (Felix)
2014-10-24 7:15 ` Andrew Pinski
2014-10-28 12:24 ` Yangfei (Felix)
2014-10-30 22:02 ` augustine.sterling
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