From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 84073 invoked by alias); 3 Nov 2017 16:47:44 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 84008 invoked by uid 89); 3 Nov 2017 16:47:43 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.2 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.2 spammy=picky, uncovered X-HELO: EUR03-VE1-obe.outbound.protection.outlook.com Received: from mail-eopbgr50077.outbound.protection.outlook.com (HELO EUR03-VE1-obe.outbound.protection.outlook.com) (40.107.5.77) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 03 Nov 2017 16:47:42 +0000 Received: from DB6PR0801MB2053.eurprd08.prod.outlook.com (10.168.86.22) by HE1PR08MB2668.eurprd08.prod.outlook.com (10.170.248.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.178.6; Fri, 3 Nov 2017 16:47:38 +0000 Received: from DB6PR0801MB2053.eurprd08.prod.outlook.com ([fe80::d9d5:2017:ca12:1d9d]) by DB6PR0801MB2053.eurprd08.prod.outlook.com ([fe80::d9d5:2017:ca12:1d9d%18]) with mapi id 15.20.0156.009; Fri, 3 Nov 2017 16:47:37 +0000 From: Wilco Dijkstra To: James Greenhalgh CC: GCC Patches , Jeff Law , nd Subject: Re: [PATCH][AArch64] Simplify frame layout for stack probing Date: Fri, 03 Nov 2017 16:47:00 -0000 Message-ID: References: <20171026151935.GB25439@arm.com>,<20171027084636.GA12600@arm.com> In-Reply-To: <20171027084636.GA12600@arm.com> authentication-results: spf=none (sender IP is ) smtp.mailfrom=Wilco.Dijkstra@arm.com; x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;HE1PR08MB2668;6:ETotXLi+M1p9CWhEh4VD5uaz98XTJaw0QD94QhS94Th3y/SIRUbPtuq23m2Bq7KKN4iKK2vkv20rDvAQLu9pMMa6OcuKFmyiyixO88PhfQAgO4lcDrdnySoJb9fYcrqlzh/kiEpTlziEaMUi2xRqI4nRsBUnQyAX899A+DIqGwr8rk23//OXj0IY5B0FIHPrMRfB6vA9BSM73MNPGFSEjVe2DBUlEG/miJon+U8JJ/QGh5CuZkom/jVYS77+Ae16Vi6qKL0lP7bfflC7/3vBhWKGmqgraRbADzd4NmU91accdQeuqdTubvhMf0jgUpf9gHUCjMe07xDhYoKVp3g3F8uYjaMYZf1xsd1VeSZ02QI=;5:tGrBNxL7j1yURwPlABGVaLZArjRXmQ4F/A6wIP3xrV3o/a7VPO111Rpw6DSb1DEm61yp4FrSrz+Afh6KlsT53oeT2Sy7/CCpaKd8svQLpZs6rNWvBVtFvo2nxs+ylPPqrrcZevSs5FBbT+zcaZ8amUS12EyfA+4JHjwXfGPvkBI=;24:B4gAsoNHB5XxQ7qFmCnWAt8OmQrkwJwD/yuwKXGMGaRFhMcZC2QBFl/CLIcpVpsx3wRsEnZ0EefS6FN7kRs4yJXRBqDLxPW7RAZ9SFrsAy4=;7:KRIT6ZFTp9JCo01Unf5C0grH9LMdw8GuLU/W2eY9Lo1YjNlrkmABvYWTz+homNKEeMk2Vl0b6NUFGL8Qqri9mVEx+1d4ojlnltMgFTWPabpmPL3qqmemYvwTam/HDUV1Kefh+GLa1g1wOO9n6S1thL+1Z6DwAnpEmj3Mspop5MvZchaGvk7jbj351zthv5WXjVjmoK7l/qtz7bjGlMKZRqF5WDz7Uw/NpY9Vrf3lOwp91WJHxMlOqD0QPEDr5sO4 x-ms-exchange-antispam-srfa-diagnostics: SSOS;SSOR; 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x-forefront-prvs: 0480A51D4A x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(6009001)(376002)(346002)(39860400002)(24454002)(54534003)(189002)(199003)(377424004)(99286004)(5660300001)(189998001)(55016002)(478600001)(6436002)(316002)(54356999)(25786009)(54906003)(9686003)(8936002)(74316002)(33656002)(2906002)(97736004)(3660700001)(3280700002)(72206003)(86362001)(2900100001)(5250100002)(3846002)(4326008)(305945005)(102836003)(6116002)(66066001)(7736002)(7696004)(105586002)(14454004)(101416001)(6862004)(106356001)(2950100002)(53936002)(6246003)(229853002)(68736007)(50986999)(6636002)(8676002)(81156014)(81166006)(76176999)(6506006);DIR:OUT;SFP:1101;SCL:1;SRVR:HE1PR08MB2668;H:DB6PR0801MB2053.eurprd08.prod.outlook.com;FPR:;SPF:None;PTR:InfoNoRecords;MX:1;A:1;LANG:en; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3f8cad3b-5d06-4d72-ac6c-08d522da971f X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Nov 2017 16:47:37.5818 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR08MB2668 X-SW-Source: 2017-11/txt/msg00234.txt.bz2 James Greenhalgh wrote: > > This caused: > >=A0 Failures: >=A0=A0=A0=A0=A0=A0=A0 gcc.target/aarch64/test_frame_4.c >=A0=A0=A0=A0=A0=A0=A0 gcc.target/aarch64/test_frame_2.c >=A0=A0=A0=A0=A0=A0=A0 gcc.target/aarch64/test_frame_7.c >=A0=A0=A0=A0=A0=A0=A0 gcc.target/aarch64/test_frame_10.c Sorry, I missed that in testing.=A0I've reverted part of the patch that cau= sed this. The tests are definitely too picky but they also uncovered a real code gene= ration inefficiency, so I need to look into that further. I've committed this: 2017-11-03 Wilco Dijkstra PR target/82786 * config/aarch64/aarch64.c (aarch64_layout_frame): Undo forcing of LR at bottom of frame. -- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2fc7db4..949f3cb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-11-03 Wilco Dijkstra + + PR target/82786 + * config/aarch64/aarch64.c (aarch64_layout_frame): + Undo forcing of LR at bottom of frame. + 2017-11-03 Jeff Law =20 * cfganal.c (single_pred_edge_ignoring_loop_edges): New function diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 1e12645..12f247d 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -2908,8 +2908,7 @@ aarch64_frame_pointer_required (void) =20 /* Mark the registers that need to be saved by the callee and calculate the size of the callee-saved registers area and frame record (both FP - and LR may be omitted). If the function is not a leaf, ensure LR is - saved at the bottom of the callee-save area. */ + and LR may be omitted). */ static void aarch64_layout_frame (void) { @@ -2966,13 +2965,6 @@ aarch64_layout_frame (void) cfun->machine->frame.wb_candidate2 =3D R30_REGNUM; offset =3D 2 * UNITS_PER_WORD; } - else if (!crtl->is_leaf) - { - /* Ensure LR is saved at the bottom of the callee-saves. */ - cfun->machine->frame.reg_offset[R30_REGNUM] =3D 0; - cfun->machine->frame.wb_candidate1 =3D R30_REGNUM; - offset =3D UNITS_PER_WORD; - } =20 /* Now assign stack slots for them. */ for (regno =3D R0_REGNUM; regno <=3D R30_REGNUM; regno++)