From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 47305 invoked by alias); 8 Aug 2017 10:04:26 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 46456 invoked by uid 89); 8 Aug 2017 10:04:25 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:935 X-HELO: EUR01-VE1-obe.outbound.protection.outlook.com Received: from mail-ve1eur01on0081.outbound.protection.outlook.com (HELO EUR01-VE1-obe.outbound.protection.outlook.com) (104.47.1.81) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 08 Aug 2017 10:04:22 +0000 Received: from DB6PR0801MB2053.eurprd08.prod.outlook.com (10.168.86.22) by VI1PR0802MB2384.eurprd08.prod.outlook.com (10.172.14.136) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.1304.22; Tue, 8 Aug 2017 10:04:18 +0000 Received: from DB6PR0801MB2053.eurprd08.prod.outlook.com ([fe80::cd9d:80f1:82d8:5181]) by DB6PR0801MB2053.eurprd08.prod.outlook.com ([fe80::cd9d:80f1:82d8:5181%18]) with mapi id 15.01.1320.018; Tue, 8 Aug 2017 10:04:17 +0000 From: Wilco Dijkstra To: GCC Patches , "kenner@vlsi1.ultra.nyu.edu" CC: nd , Michael Collison , "pinskia@gmail.com" Subject: RE: [PATCH] [Aarch64] Optimize subtract in shift counts Date: Tue, 08 Aug 2017 10:04:00 -0000 Message-ID: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Wilco.Dijkstra@arm.com; x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;VI1PR0802MB2384;6:w4OCj6fugwxx2+klPGsqBy+hih4a8CftC3EVXPcCFOok2FDYzGY5zj9pjxtrox68HlZFOH67ffyPK/Uoltb2Bg4VOt0PC9Qf4HeFwL/OXMHfJfPyykcaYS7AOT/dW7AaK+6r8Q9/nXOg9L6kZcye+1kl1SNuowdtQUFcl9UctAFeKI4JCIZe2JZomyZE+cgNWrkXLMM7j/orZCS2zOBaozIA7Oa7tNJw4ePcjm4JmCUw8bAst8+3BdJLv6a2etpdQPPFPcjc1Rfs84//pXDG4S9b4o2T491ttayQ9mSNd8ebUieLf5blI9Yr/elx4Hy39SEsOwwcLeDQAJYrvkiYgQ==;5:W+rnjqtY5kfT3le90J1sgFiUznha3epQw1mKVkzpRxJLKO4pOYjtPqAMmxVhBLn1U90/JigmbWgo3vep9Di21YMuTxa/lvdwVFI+H+qVGVLomT4GsPiieaWielMIonGEfEviXsm8nU7H+UB/iGPT4g==;24:CM1RS+g+kBX7rUnkd1x6GJeWBAeQxEn4epG+HSyYtdgQOadnpRoHcQcanqckWHinNvz0u2/+XrcI0LlvPv3Hli6ZY+eASaCM1vixzKrHo+w=;7:9/qkADKRy6cQwp8R2pX2kJB18SOlLfY/ZS8qrj3X9MjFlSpjjGPWShnNzRkIufYDUpvKYTVUSp0aezskjPS4CN0PyokepoIe3kp1ZpXPcl6FJDLiwcm3N0rSCzKFB5ifgrUCM50+RgFrOLcAJt5capOI8FbCSt/epF2QK+eqZqR37PACcFGMz0Q1IrAw7hnG1tix0DOhFv2aSeJCsllO8FU0MAUE31cGWgUP71r8ps0= x-ms-exchange-antispam-srfa-diagnostics: SSOS; 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x-forefront-prvs: 03932714EB x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(6009001)(39400400002)(39850400002)(39860400002)(39410400002)(39840400002)(39450400003)(189002)(24454002)(199003)(9686003)(3846002)(229853002)(102836003)(7696004)(6436002)(5660300001)(74316002)(2906002)(55016002)(53936002)(86362001)(99286003)(66066001)(2900100001)(54906002)(3660700001)(6116002)(6506006)(105586002)(106356001)(33656002)(3280700002)(14454004)(50986999)(25786009)(68736007)(72206003)(5250100002)(101416001)(2501003)(97736004)(8676002)(7736002)(4326008)(189998001)(8936002)(2171002)(38730400002)(54356999)(305945005)(39060400002)(478600001)(81166006)(81156014)(6246003);DIR:OUT;SFP:1101;SCL:1;SRVR:VI1PR0802MB2384;H:DB6PR0801MB2053.eurprd08.prod.outlook.com;FPR:;SPF:None;PTR:InfoNoRecords;MX:1;A:1;LANG:en; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-originalarrivaltime: 08 Aug 2017 10:04:17.6439 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0802MB2384 X-SW-Source: 2017-08/txt/msg00575.txt.bz2 Richard Kenner wrote: >Michael Collison wrote: > > On Aarc64 SHIFT_COUNT_TRUNCATED is only true if SIMD code generation > > is disabled. This is because the simd instructions can be used for > > shifting but they do not truncate the shift count. > > In that case, the change isn't safe! Consider if the value was > negative, for example. Yes, it's technically undefined, but I'm not > sure I'd want to rely on that. No it's perfectly safe - it becomes an integer-only shift after the split s= ince it keeps the masking as part of the pattern. But generally the SHIFT_COUNT_TRUNCATED is a mess, and so are other ways of doing this - note the extremely complex subregs in the patch, none of th= at should be required as there are no QI registers on AArch64! So it would be great i= f there was a better way to describe the number of bits used by a particular shift = alternative. Wilco