Re: [PATCH][Arm][1/3] Support for Arm Custom Datapath Extension (CDE): enable the feature

[Dennis Zhang <Dennis.Zhang@arm.com>]

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Hi Kyrylo,

>________________________________________
>From: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
>Sent: Wednesday, March 18, 2020 9:04 AM
>To: Dennis Zhang; gcc-patches@gcc.gnu.org
>Cc: nd; Richard Earnshaw; Ramana Radhakrishnan
>Subject: RE: [PATCH][Arm][1/3] Support for Arm Custom Datapath Extension (CDE): enable the feature
>
>Hi Dennis,
>
>> -----Original Message-----
>> From: Dennis Zhang <Dennis.Zhang@arm.com>
>> Sent: 12 March 2020 12:06
>> To: gcc-patches@gcc.gnu.org
>> Cc: nd <nd@arm.com>; Richard Earnshaw <Richard.Earnshaw@arm.com>;
>> Ramana Radhakrishnan <Ramana.Radhakrishnan@arm.com>; Kyrylo Tkachov
>> <Kyrylo.Tkachov@arm.com>
>> Subject: [PATCH][Arm][1/3] Support for Arm Custom Datapath Extension
>> (CDE): enable the feature
>>
>> Hi all,
>>
>> This patch is part of a series that adds support for the ARMv8.m
>> Custom Datapath Extension.
>> This patch defines the options cdecp0-cdecp7 for CLI to enable the CDE
>> on corresponding coprocessor 0-7.
>> It also adds new check-effective for CDE feature.
>>
>> ISA has been announced at
>> https://developer.arm.com/architectures/instruction-sets/custom-
>> instructions
>>
>> Regtested and bootstrapped.
>>
>> Is it OK to commit please?
>
>Can you please rebase this patch on top of the recent MVE commits?
>It currently doesn't apply cleanly to trunk.
>Thanks,
>Kyrill

The rebase patches is as attached.
Is it OK to commit?

Thanks
Dennis

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diff --git a/gcc/config.gcc b/gcc/config.gcc
index 13e3cb753e2..7624c654c51 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -346,7 +346,7 @@ arc*-*-*)
 arm*-*-*)
 	cpu_type=arm
 	extra_objs="arm-builtins.o aarch-common.o"
-	extra_headers="mmintrin.h arm_neon.h arm_acle.h arm_fp16.h arm_cmse.h arm_bf16.h arm_mve.h"
+	extra_headers="mmintrin.h arm_neon.h arm_acle.h arm_fp16.h arm_cmse.h arm_bf16.h arm_mve.h arm_cde.h"
 	target_type_format_char='%'
 	c_target_objs="arm-c.o"
 	cxx_target_objs="arm-c.o"
diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 73bdb9cfae0..7e92e8a83ae 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -237,6 +237,12 @@ arm_cpu_builtins (struct cpp_reader* pfile)
       builtin_define_with_int_value ("__ARM_FEATURE_COPROC", coproc_level);
     }
 
+  def_or_undef_macro (pfile, "__ARM_FEATURE_CDE", TARGET_CDE);
+  cpp_undef (pfile, "__ARM_FEATURE_CDE_COPROC");
+  if (TARGET_CDE)
+    builtin_define_with_int_value ("__ARM_FEATURE_CDE_COPROC",
+				   arm_arch_cde_coproc);
+
   def_or_undef_macro (pfile, "__ARM_FEATURE_MATMUL_INT8", TARGET_I8MM);
   def_or_undef_macro (pfile, "__ARM_FEATURE_BF16_SCALAR_ARITHMETIC",
 		      TARGET_BF16_FP);
diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index 77b43090d69..fba34e556fb 100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -211,6 +211,16 @@ define feature i8mm
 # Brain half-precision floating-point extension. Optional from v8.2-A.
 define feature bf16
 
+# Arm Custom Datapath Extension (CDE).
+define feature cdecp0
+define feature cdecp1
+define feature cdecp2
+define feature cdecp3
+define feature cdecp4
+define feature cdecp5
+define feature cdecp6
+define feature cdecp7
+
 # Feature groups.  Conventionally all (or mostly) upper case.
 # ALL_FPU lists all the feature bits associated with the floating-point
 # unit; these will all be removed if the floating-point unit is disabled
@@ -676,6 +686,14 @@ begin arch armv8-m.main
  option fp.dp add FPv5 FP_DBL
  option nofp remove ALL_FP
  option nodsp remove armv7em
+ option cdecp0 add cdecp0
+ option cdecp1 add cdecp1
+ option cdecp2 add cdecp2
+ option cdecp3 add cdecp3
+ option cdecp4 add cdecp4
+ option cdecp5 add cdecp5
+ option cdecp6 add cdecp6
+ option cdecp7 add cdecp7
 end arch armv8-m.main
 
 begin arch armv8-r
@@ -707,6 +725,14 @@ begin arch armv8.1-m.main
  option nofp remove ALL_FP
  option mve add MVE
  option mve.fp add MVE_FP
+ option cdecp0 add cdecp0
+ option cdecp1 add cdecp1
+ option cdecp2 add cdecp2
+ option cdecp3 add cdecp3
+ option cdecp4 add cdecp4
+ option cdecp5 add cdecp5
+ option cdecp6 add cdecp6
+ option cdecp7 add cdecp7
 end arch armv8.1-m.main
 
 begin arch iwmmxt
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index b3dfa285f01..55a4ebf5147 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -1021,6 +1021,13 @@ int arm_arch_i8mm = 0;
 /* Nonzero if chip supports the BFloat16 instructions.  */
 int arm_arch_bf16 = 0;
 
+/* Nonzero if chip supports the Custom Datapath Extension.  */
+int arm_arch_cde = 0;
+int arm_arch_cde_coproc = 0;
+const int arm_arch_cde_coproc_bits[] = {
+  0x1, 0x2, 0x4, 0x8, 0x10, 0x20, 0x40, 0x80
+};
+
 /* The condition codes of the ARM, and the inverse function.  */
 static const char * const arm_condition_codes[] =
 {
@@ -3740,6 +3747,21 @@ arm_option_reconfigure_globals (void)
       arm_fp16_format = ARM_FP16_FORMAT_IEEE;
     }
 
+  arm_arch_cde = 0;
+  arm_arch_cde_coproc = 0;
+  int cde_bits[] = {isa_bit_cdecp0, isa_bit_cdecp1, isa_bit_cdecp2,
+		    isa_bit_cdecp3, isa_bit_cdecp4, isa_bit_cdecp5,
+		    isa_bit_cdecp6, isa_bit_cdecp7};
+  for (int i = 0, e = ARRAY_SIZE (cde_bits); i < e; i++)
+    {
+      int cde_bit = bitmap_bit_p (arm_active_target.isa, cde_bits[i]);
+      if (cde_bit)
+	{
+	  arm_arch_cde |= cde_bit;
+	  arm_arch_cde_coproc |= arm_arch_cde_coproc_bits[i];
+	}
+    }
+
   /* And finally, set up some quirks.  */
   arm_arch_no_volatile_ce
     = bitmap_bit_p (arm_active_target.isa, isa_bit_quirk_no_volatile_ce);
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index fb55f73c62b..343235d0cbc 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -354,6 +354,9 @@ emission of floating point pcs attributes.  */
 /* Nonzero if disallow volatile memory access in IT block.  */
 #define TARGET_NO_VOLATILE_CE		(arm_arch_no_volatile_ce)
 
+/* Nonzero if chip supports the Custom Datapath Extension.  */
+#define TARGET_CDE	(arm_arch_cde && arm_arch8 && !arm_arch_notm)
+
 /* Should constant I be slplit for OP.  */
 #define DONT_EARLY_SPLIT_CONSTANT(i, op) \
 				((optimize >= 2) \
@@ -568,6 +571,11 @@ extern int arm_arch_i8mm;
 /* Nonzero if chip supports the BFloat16 instructions.  */
 extern int arm_arch_bf16;
 
+/* Nonzero if chip supports the Custom Datapath Extension.  */
+extern int arm_arch_cde;
+extern int arm_arch_cde_coproc;
+extern const int arm_arch_cde_coproc_bits[];
+
 #ifndef TARGET_DEFAULT
 #define TARGET_DEFAULT  (MASK_APCS_FRAME)
 #endif
diff --git a/gcc/config/arm/arm_cde.h b/gcc/config/arm/arm_cde.h
new file mode 100644
index 00000000000..f975754632f
--- /dev/null
+++ b/gcc/config/arm/arm_cde.h
@@ -0,0 +1,40 @@
+/* Arm Custom Datapath Extension (CDE) intrinsics include file.
+
+   Copyright (C) 2020 Free Software Foundation, Inc.
+   Contributed by Arm Ltd.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _GCC_ARM_CDE_H
+#define _GCC_ARM_CDE_H 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 96a95162696..79ca005b858 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -18665,6 +18665,10 @@ The single- and double-precision floating-point instructions.
 
 @item +nofp
 Disable the floating-point extension.
+
+@item +cdecp0, +cdecp1, ... , +cdecp7
+Enable the Custom Datapath Extension (CDE) on selected coprocessors according
+to the numbers given in the options in the range 0 to 7.
 @end table
 
 @item  armv8-m.main
@@ -18683,6 +18687,10 @@ The single- and double-precision floating-point instructions.
 
 @item +nofp
 Disable the floating-point extension.
+
+@item +cdecp0, +cdecp1, ... , +cdecp7
+Enable the Custom Datapath Extension (CDE) on selected coprocessors according
+to the numbers given in the options in the range 0 to 7.
 @end table
 
 @item armv8-r
diff --git a/gcc/testsuite/gcc.target/arm/pragma_cde.c b/gcc/testsuite/gcc.target/arm/pragma_cde.c
new file mode 100644
index 00000000000..97643a08405
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pragma_cde.c
@@ -0,0 +1,98 @@
+/* Test for CDE #prama target macros.  */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8m_main_cde_ok } */
+/* { dg-add-options arm_v8m_main_cde } */
+
+#pragma GCC push_options
+#pragma GCC target ("arch=armv8-m.main")
+#ifdef __ARM_FEATURE_CDE
+#error "__ARM_FEATURE_CDE is defined but should not be"
+#endif
+#pragma GCC pop_options
+
+#pragma GCC push_options
+#pragma GCC target ("arch=armv8-m.main+cdecp0")
+#ifndef __ARM_FEATURE_CDE
+#error "__ARM_FEATURE_CDE is not defined but should be"
+#endif
+#if __ARM_FEATURE_CDE_COPROC != 0x1
+#error "__ARM_FEATURE_CDE_COPROC is not defined as configured"
+#endif
+#pragma GCC pop_options
+
+#pragma GCC push_options
+#pragma GCC target ("arch=armv8-m.main+cdecp1")
+#ifndef __ARM_FEATURE_CDE
+#error "__ARM_FEATURE_CDE is not defined but should be"
+#endif
+#if __ARM_FEATURE_CDE_COPROC != 0x2
+#error "__ARM_FEATURE_CDE_COPROC is not defined as configured"
+#endif
+#pragma GCC pop_options
+
+#pragma GCC push_options
+#pragma GCC target ("arch=armv8-m.main+cdecp2")
+#ifndef __ARM_FEATURE_CDE
+#error "__ARM_FEATURE_CDE is not defined but should be"
+#endif
+#if __ARM_FEATURE_CDE_COPROC != 0x4
+#error "__ARM_FEATURE_CDE_COPROC is not defined as configured"
+#endif
+#pragma GCC pop_options
+
+#pragma GCC push_options
+#pragma GCC target ("arch=armv8-m.main+cdecp3")
+#ifndef __ARM_FEATURE_CDE
+#error "__ARM_FEATURE_CDE is not defined but should be"
+#endif
+#if __ARM_FEATURE_CDE_COPROC != 0x8
+#error "__ARM_FEATURE_CDE_COPROC is not defined as configured"
+#endif
+#pragma GCC pop_options
+
+#pragma GCC push_options
+#pragma GCC target ("arch=armv8-m.main+cdecp4")
+#ifndef __ARM_FEATURE_CDE
+#error "__ARM_FEATURE_CDE is not defined but should be"
+#endif
+#if __ARM_FEATURE_CDE_COPROC != 0x10
+#error "__ARM_FEATURE_CDE_COPROC is not defined as configured"
+#endif
+#pragma GCC pop_options
+
+#pragma GCC push_options
+#pragma GCC target ("arch=armv8-m.main+cdecp5")
+#ifndef __ARM_FEATURE_CDE
+#error "__ARM_FEATURE_CDE is not defined but should be"
+#endif
+#if __ARM_FEATURE_CDE_COPROC != 0x20
+#error "__ARM_FEATURE_CDE_COPROC is not defined as configured"
+#endif
+#pragma GCC pop_options
+
+#pragma GCC push_options
+#pragma GCC target ("arch=armv8-m.main+cdecp6")
+#ifndef __ARM_FEATURE_CDE
+#error "__ARM_FEATURE_CDE is not defined but should be"
+#endif
+#if __ARM_FEATURE_CDE_COPROC != 0x40
+#error "__ARM_FEATURE_CDE_COPROC is not defined as configured"
+#endif
+#pragma GCC pop_options
+
+#pragma GCC push_options
+#pragma GCC target ("arch=armv8-m.main+cdecp7")
+#ifndef __ARM_FEATURE_CDE
+#error "__ARM_FEATURE_CDE is not defined but should be"
+#endif
+#if __ARM_FEATURE_CDE_COPROC != 0x80
+#error "__ARM_FEATURE_CDE_COPROC is not defined as configured"
+#endif
+#pragma GCC pop_options
+
+#pragma GCC push_options
+#pragma GCC target ("arch=armv8-m.main+cdecp0+cdecp1")
+#if __ARM_FEATURE_CDE_COPROC != 0x3
+#error "__ARM_FEATURE_CDE_COPROC is not defined as configured"
+#endif
+#pragma GCC pop_options
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 4413c26fbc9..a32a56ea511 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -5053,6 +5053,65 @@ proc add_options_for_arm_v8_2a_bf16_neon { flags } {
     return "$flags $et_arm_v8_2a_bf16_neon_flags"
 }
 
+# A series of routines are created to 1) check if a given architecture is
+# effective (check_effective_target_*_ok) and then 2) give the corresponding
+# flags that enable the architecture (add_options_for_*).
+# The series includes:
+#   arm_v8m_main_cde: Armv8-m CDE (Custom Datapath Extension).
+#   arm_v8m_main_cde_fp: Armv8-m CDE with FP registers.
+#   arm_v8_1m_main_cde_mve: Armv8.1-m CDE with MVE.
+# Usage:
+#   /* { dg-require-effective-target arm_v8m_main_cde_ok } */
+#   /* { dg-add-options arm_v8m_main_cde } */
+# The tests are valid for Arm.
+
+foreach { armfunc armflag armdef } {
+	arm_v8m_main_cde
+		"-march=armv8-m.main+cdecp0 -mthumb"
+		"defined (__ARM_FEATURE_CDE)"
+	arm_v8m_main_cde_fp
+		"-march=armv8-m.main+fp+cdecp0 -mthumb"
+		"defined (__ARM_FEATURE_CDE) && defined (__ARM_FP)"
+	arm_v8_1m_main_cde_mve
+		"-march=armv8.1-m.main+mve+cdecp0 -mthumb"
+		"defined (__ARM_FEATURE_CDE) && defined (__ARM_FEATURE_MVE)"
+	} {
+    eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
+	proc check_effective_target_FUNC_ok_nocache { } {
+	    global et_FUNC_flags
+	    set et_FUNC_flags ""
+
+	    if { ![istarget arm*-*-*] } {
+		return 0;
+	    }
+
+	    if { [check_no_compiler_messages_nocache FUNC_ok assembly {
+		#if !(DEF)
+		#error "DEF failed"
+		#endif
+	    } "FLAG"] } {
+		    set et_FUNC_flags "FLAG"
+		    return 1
+	    }
+
+	    return 0;
+	}
+
+	proc check_effective_target_FUNC_ok { } {
+	    return [check_cached_effective_target FUNC_ok \
+		    check_effective_target_FUNC_ok_nocache]
+	}
+
+	proc add_options_for_FUNC { flags } {
+	    if { ! [check_effective_target_FUNC_ok] } {
+		return "$flags"
+	    }
+	    global et_FUNC_flags
+	    return "$flags $et_FUNC_flags"
+	}
+    }]
+}
+
 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
 # otherwise.