Hi,

As subject, this patch rewrites the v[q]tbx Neon intrinsics to use RTL
builtins rather than inline assembly code, allowing for better scheduling
and optimization.

Regression tested and bootstrapped on aarch64-none-linux-gnu - no
issues.

Ok for master?

Thanks,
Jonathan

---

gcc/ChangeLog:

2021-02-12  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add tbx1 builtin
	generator macros.
	* config/aarch64/aarch64-simd.md (aarch64_tbx1<mode>):
	Define.
	* config/aarch64/arm_neon.h (vqtbx1_s8): USE RTL builtin
	instead of inline asm.
	(vqtbx1_u8): Likewise.
	(vqtbx1_p8): Likewise.
	(vqtbx1q_s8): Likewise.
	(vqtbx1q_u8): Likewise.
	(vqtbx1q_p8): Likewise.
	(vtbx2_s8): Likewise.
	(vtbx2_u8): Likewise.
	(vtbx2_p8): Likewise.