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From: "Kong, Lingling" <lingling.kong@intel.com>
To: Hongtao Liu <crazylht@gmail.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
	"Liu, Hongtao" <hongtao.liu@intel.com>
Subject: RE: [wwwdocs] [GCC13] Mention Intel __bf16 support in AVX512BF16 intrinsics.
Date: Wed, 2 Nov 2022 02:15:48 +0000	[thread overview]
Message-ID: <DM4PR11MB548756680AA18A48A645E226EC399@DM4PR11MB5487.namprd11.prod.outlook.com> (raw)
In-Reply-To: <CAMZc-by8ofrNkie-xencwoGZB4AFoekTPUn+LAaORWcNx1kKEg@mail.gmail.com>

> > diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html
> > index 7c6bfa6e..cd0282f1 100644
> > --- a/htdocs/gcc-13/changes.html
> > +++ b/htdocs/gcc-13/changes.html
> > @@ -230,6 +230,8 @@ a work-in-progress.</p>
> >    <li>For both C and C++ the <code>__bf16</code> type is supported on
> >        x86 systems with SSE2 and above enabled.
> >    </li>
> > +  <li>Use <code>__bf16</code> type for AVX512BF16 intrinsics.
> Could you add more explanations. Like originally it's ..., now it's ..., and what's
> the difference when users compile the same source code(which contains
> avx512bf16 intrinsics) with gcc12(and before) and GCC13.
> > +  </li>
> >  </ul>
> >
> >  <!-- <h3 id="mips">MIPS</h3> -->
> > --
> > 2.18.2
> >
Yes,  changed it. Thanks a lot!

Subject: [PATCH] Mention Intel __bf16 support in AVX512BF16 intrinsics.

---
 htdocs/gcc-13/changes.html | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html
index 7c6bfa6e..a35f4fab 100644
--- a/htdocs/gcc-13/changes.html
+++ b/htdocs/gcc-13/changes.html
@@ -230,6 +230,12 @@ a work-in-progress.</p>
   <li>For both C and C++ the <code>__bf16</code> type is supported on
       x86 systems with SSE2 and above enabled.
   </li>
+  <li>Use <code>__bf16</code> type for AVX512BF16 intrinsics. Previously we use
+  short to represent bf16. Now we introduced <code>__bf16</code> to x86 psABI.
+  So we switch intrinsics in AVX512BF16 to the new type <code>__bf16</code>.
+  When users compile the same source code contains AVX512BF16 intrinsics with
+  GCC13 need to support SSE2, which is different to GCC12 (and before).
+  </li>
 </ul>

 <!-- <h3 id="mips">MIPS</h3> -->
--
2.18.2

BRs,
Lingling

  reply	other threads:[~2022-11-02  2:15 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20221101011756.3818109-1-lingling.kong@intel.com>
2022-11-01  1:20 ` Kong, Lingling
2022-11-01  1:28   ` Hongtao Liu
2022-11-02  2:15     ` Kong, Lingling [this message]
2022-11-03  6:52       ` Kong, Lingling
2022-11-03  7:57         ` Hongtao Liu

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