Oh, I see. I try this way:
static poly_uint64
riscv_vectorize_preferred_vector_alignment (const_tree type)
{
  if (riscv_v_ext_vector_mode_p (TYPE_MODE (type)))
    return TYPE_ALIGN (TREE_TYPE (type));
  return TYPE_ALIGN (type);
}

And disable both TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE
and TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST

Both VLA and VLS works well after the testing of align-1.c && align-2.c
Is the way you prefer ?

But I am not sure whether it's safe since both my downstream GCC and ARM SVE didn't use this approach.
I am Ok of both for now. So do you prefer the second approach ? Then I can send V2 patch.



juzhe.zhong@rivai.ai
 
From: Kito Cheng
Date: 2023-05-15 10:38
To: juzhe.zhong@rivai.ai
CC: gcc-patches; palmer; Robin Dapp; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT to optimize codegen of RVV auto-vectorization
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index de578b5b899..a5776a550b2 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -7499,6 +7499,24 @@ riscv_preferred_simd_mode (scalar_mode mode)
>    return word_mode;
> }
> +/* Implement target hook TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT.  */
> +
> +static poly_uint64
> +riscv_vectorize_preferred_vector_alignment (const_tree type)
> +{
> +  if (riscv_v_ext_vector_mode_p (TYPE_MODE (type)))
> +    {
> +      /* If the length of the vector is a fixed power of 2, try to align
> + to that length, otherwise don't try to align at all.  */
> +      HOST_WIDE_INT result;
> +      if (!GET_MODE_BITSIZE (TYPE_MODE (type)).is_constant (&result)
> +   || !pow2p_hwi (result))
> + result = TYPE_ALIGN (TREE_TYPE (type));
> +      return result;
 
Why we block VLS here and then relaxed by different way in another patch?