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From: Iain Sandoe <iain@sandoe.co.uk>
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Subject: Re: [PATCH] testsuite, X86, Darwin: Fix bf16 ABI tests for
 Mach-O/macOS ABI.
Date: Mon, 5 Dec 2022 14:54:34 +0000
In-Reply-To: <CAFULd4Y_O0v5zx=2jytyw5EuMWArF=tAgfH0qCXs6WK4dzkQzQ@mail.gmail.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>,
 crazylht@gmail.com
To: Uros Bizjak <ubizjak@gmail.com>
References: <20221204115150.35508-1-iain@sandoe.co.uk>
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 <47BE3C16-6C72-4F13-94D7-9754BD3DEE77@sandoe.co.uk>
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Hi Uros,

> On 5 Dec 2022, at 10:37, Uros Bizjak via Gcc-patches =
<gcc-patches@gcc.gnu.org> wrote:
>=20
> On Sun, Dec 4, 2022 at 9:30 PM Iain Sandoe <iain@sandoe.co.uk> wrote:
>>=20

>> gcc/testsuite/ChangeLog:
>>=20
>>        * gcc.target/x86_64/abi/bf16/args.h: Make xmm_regs, x87_regs =
extern.
>>        * gcc.target/x86_64/abi/bf16/m256bf16/args.h: Likewise.
>>        * gcc.target/x86_64/abi/bf16/m512bf16/args.h: Likewise.
>>        * gcc.target/x86_64/abi/bf16/asm-support.S: Add Mach-O =
variant.
>>        * gcc.target/x86_64/abi/bf16/m256bf16/asm-support.S: Likewise.
>>        * gcc.target/x86_64/abi/bf16/m512bf16/asm-support.S: Likewise.
>=20
> Please note that in other directories asm-support-darwin.s is
> introduced and included via .exp file. Is there a reason a different
> approach is introduced here?

Since it seems that testcases get added and amended without considering =
any
sub-target apart from x86_64-linux-gnu (even by very experienced =
contributors),
I was hoping that the Darwin section might prompt folks to remember that =
there
are several other sub-targets.

However, the main thing is to fix the tests .. so here=E2=80=99s a =
version using separate
files.

OK?
thanks,
Iain


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=46rom=20b52cc366902919c3bf45600f398968207e55052e=20Mon=20Sep=2017=20=
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Likewise.=0A=09*=20gcc.target/x86_64/abi/bf16/m512bf16/abi-bf16-zmm.exp:=20=
Likewise.=0A=09*=20gcc.target/x86_64/abi/bf16/args.h:=20Make=20xmm_regs,=20=
x87_regs=20extern.=0A=09*=20gcc.target/x86_64/abi/bf16/m256bf16/args.h:=20=
Likewise.=0A=09*=20gcc.target/x86_64/abi/bf16/m512bf16/args.h:=20=
Likewise.=0A=09*=20gcc.target/x86_64/abi/bf16/asm-support-darwin.S:=20=
New=20file.=0A=09*=20=
gcc.target/x86_64/abi/bf16/m256bf16/asm-support-darwin.S:=20New=20file.=0A=
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=20=20=20=20|=20=2097=20+++++++++++++++=0A=20=
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=2097=20+++++++++++++++=0A=20=
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=20create=20mode=20100644=20=
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=0Adiff=20--git=20=
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$srcdir/$subdir/test_*.c]]=20{=0A=20=20=20=20=20if=20{[runtest_file_p=20=
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rax,rbx,rcx,rdx,rsi,rdi,rsp,rbp,r8,r9,r10,r11,r12,r13,r14,r15;=0A-XMM_T=20=
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%rdx,=20_rdx(%rip)=0A+=09movq=09%rdi,=20_rdi(%rip)=0A+=09movq=09%rsi,=20=
_rsi(%rip)=0A+=09movq=09%rbp,=20_rbp(%rip)=0A+=09movq=09%rsp,=20=
_rsp(%rip)=0A+=09movq=09%r8,=20_r8(%rip)=0A+=09movq=09%r9,=20_r9(%rip)=0A=
+=09movq=09%r10,=20_r10(%rip)=0A+=09movq=09%r11,=20_r11(%rip)=0A+=09movq=09=
%r12,=20_r12(%rip)=0A+=09movq=09%r13,=20_r13(%rip)=0A+=09movq=09%r14,=20=
_r14(%rip)=0A+=09movq=09%r15,=20_r15(%rip)=0A+=09movdqu=09%xmm0,=20=
_xmm_regs+0(%rip)=0A+=09movdqu=09%xmm1,=20_xmm_regs+16(%rip)=0A+=09=
movdqu=09%xmm2,=20_xmm_regs+32(%rip)=0A+=09movdqu=09%xmm3,=20=
_xmm_regs+48(%rip)=0A+=09movdqu=09%xmm4,=20_xmm_regs+64(%rip)=0A+=09=
movdqu=09%xmm5,=20_xmm_regs+80(%rip)=0A+=09movdqu=09%xmm6,=20=
_xmm_regs+96(%rip)=0A+=09movdqu=09%xmm7,=20_xmm_regs+112(%rip)=0A+=09=
movdqu=09%xmm8,=20_xmm_regs+128(%rip)=0A+=09movdqu=09%xmm9,=20=
_xmm_regs+144(%rip)=0A+=09movdqu=09%xmm10,=20_xmm_regs+160(%rip)=0A+=09=
movdqu=09%xmm11,=20_xmm_regs+176(%rip)=0A+=09movdqu=09%xmm12,=20=
_xmm_regs+192(%rip)=0A+=09movdqu=09%xmm13,=20_xmm_regs+208(%rip)=0A+=09=
movdqu=09%xmm14,=20_xmm_regs+224(%rip)=0A+=09movdqu=09%xmm15,=20=
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+=09movq=09%rdx,=20_rdx(%rip)=0A+=09movdqu=09%xmm0,=20_xmm_regs+0(%rip)=0A=
+=09movdqu=09%xmm1,=20_xmm_regs+16(%rip)=0A+=09fstpt=09_x87_regs(%rip)=0A=
+=09fstpt=09_x87_regs+16(%rip)=0A+=09fldt=09_x87_regs+16(%rip)=0A+=09=
fldt=09_x87_regs(%rip)=0A+=09ret=0A+=0A+=09.globl=09_callthis=0A+=09=
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.zerofill=20__DATA,__bss,_rax,8,3=0A+=09.globl=09_rbx=0A+=09.zerofill=20=
__DATA,__bss,_rbx,8,3=0A+=09.globl=09_rcx=0A+=09.zerofill=20=
__DATA,__bss,_rcx,8,3=0A+=09.globl=09_rdx=0A+=09.zerofill=20=
__DATA,__bss,_rdx,8,3=0A+=09.globl=09_rsi=0A+=09.zerofill=20=
__DATA,__bss,_rsi,8,3=0A+=09.globl=09_rdi=0A+=09.zerofill=20=
__DATA,__bss,_rdi,8,3=0A+=09.globl=09_rsp=0A+=09.zerofill=20=
__DATA,__bss,_rsp,8,3=0A+=09.globl=09_rbp=0A+=09.zerofill=20=
__DATA,__bss,_rbp,8,3=0A+=09.globl=09_r8=0A+=09.zerofill=20=
__DATA,__bss,_r8,8,3=0A+=09.globl=09_r9=0A+=09.zerofill=20=
__DATA,__bss,_r9,8,3=0A+=09.globl=09_r10=0A+=09.zerofill=20=
__DATA,__bss,_r10,8,3=0A+=09.globl=09_r11=0A+=09.zerofill=20=
__DATA,__bss,_r11,8,3=0A+=09.globl=09_r12=0A+=09.zerofill=20=
__DATA,__bss,_r12,8,3=0A+=09.globl=09_r13=0A+=09.zerofill=20=
__DATA,__bss,_r13,8,3=0A+=09.globl=09_r14=0A+=09.zerofill=20=
__DATA,__bss,_r14,8,3=0A+=09.globl=09_r15=0A+=09.zerofill=20=
__DATA,__bss,_r15,8,3=0A+=09.globl=09_xmm_regs=0A+=09.zerofill=20=
__DATA,__bss,_xmm_regs,256,5=0A+=09.globl=09_x87_regs=0A+=09.zerofill=20=
__DATA,__bss,_x87_regs,128,5=0A+=09.globl=09_volatile_var=0A+=09=
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+extern=20X87_T=20x87_regs[8];=0A=20extern=20volatile=20unsigned=20long=20=
long=20volatile_var;=0A=20extern=20void=20snapshot=20(void);=0A=20extern=20=
void=20snapshot_ret=20(void);=0Adiff=20--git=20=
a/gcc/testsuite/gcc.target/x86_64/abi/bf16/m256bf16/asm-support-darwin.S=20=
b/gcc/testsuite/gcc.target/x86_64/abi/bf16/m256bf16/asm-support-darwin.S=0A=
new=20file=20mode=20100644=0Aindex=2000000000000..e136b574f6e=0A---=20=
/dev/null=0A+++=20=
b/gcc/testsuite/gcc.target/x86_64/abi/bf16/m256bf16/asm-support-darwin.S=0A=
@@=20-0,0=20+1,97=20@@=0A+=09.text=0A+=09.p2align=204,,15=0A+=09.globl=20=
_snapshot=0A+_snapshot:=0A+.LFB3:=0A+=09movq=09%rax,=20_rax(%rip)=0A+=09=
movq=09%rbx,=20_rbx(%rip)=0A+=09movq=09%rcx,=20_rcx(%rip)=0A+=09movq=09=
%rdx,=20_rdx(%rip)=0A+=09movq=09%rdi,=20_rdi(%rip)=0A+=09movq=09%rsi,=20=
_rsi(%rip)=0A+=09movq=09%rbp,=20_rbp(%rip)=0A+=09movq=09%rsp,=20=
_rsp(%rip)=0A+=09movq=09%r8,=20_r8(%rip)=0A+=09movq=09%r9,=20_r9(%rip)=0A=
+=09movq=09%r10,=20_r10(%rip)=0A+=09movq=09%r11,=20_r11(%rip)=0A+=09movq=09=
%r12,=20_r12(%rip)=0A+=09movq=09%r13,=20_r13(%rip)=0A+=09movq=09%r14,=20=
_r14(%rip)=0A+=09movq=09%r15,=20_r15(%rip)=0A+=09vmovdqu=09%ymm0,=20=
_ymm_regs+0(%rip)=0A+=09vmovdqu=09%ymm1,=20_ymm_regs+32(%rip)=0A+=09=
vmovdqu=09%ymm2,=20_ymm_regs+64(%rip)=0A+=09vmovdqu=09%ymm3,=20=
_ymm_regs+96(%rip)=0A+=09vmovdqu=09%ymm4,=20_ymm_regs+128(%rip)=0A+=09=
vmovdqu=09%ymm5,=20_ymm_regs+160(%rip)=0A+=09vmovdqu=09%ymm6,=20=
_ymm_regs+192(%rip)=0A+=09vmovdqu=09%ymm7,=20_ymm_regs+224(%rip)=0A+=09=
vmovdqu=09%ymm8,=20_ymm_regs+256(%rip)=0A+=09vmovdqu=09%ymm9,=20=
_ymm_regs+288(%rip)=0A+=09vmovdqu=09%ymm10,=20_ymm_regs+320(%rip)=0A+=09=
vmovdqu=09%ymm11,=20_ymm_regs+352(%rip)=0A+=09vmovdqu=09%ymm12,=20=
_ymm_regs+384(%rip)=0A+=09vmovdqu=09%ymm13,=20_ymm_regs+416(%rip)=0A+=09=
vmovdqu=09%ymm14,=20_ymm_regs+448(%rip)=0A+=09vmovdqu=09%ymm15,=20=
_ymm_regs+480(%rip)=0A+=09jmp=09*_callthis(%rip)=0A+.LFE3:=0A+=0A+=09=
.p2align=204,,15=0A+=09.globl=20_snapshot_ret=0A+_snapshot_ret:=0A+=09=
movq=09%rdi,=20_rdi(%rip)=0A+=09subq=09$8,=20%rsp=0A+=09call=09=
*_callthis(%rip)=0A+=09addq=09$8,=20%rsp=0A+=09movq=09%rax,=20_rax(%rip)=0A=
+=09movq=09%rdx,=20_rdx(%rip)=0A+=09vmovdqu=09%ymm0,=20_ymm_regs+0(%rip)=0A=
+=09vmovdqu=09%ymm1,=20_ymm_regs+32(%rip)=0A+=09fstpt=09_x87_regs(%rip)=0A=
+=09fstpt=09_x87_regs+16(%rip)=0A+=09fldt=09_x87_regs+16(%rip)=0A+=09=
fldt=09_x87_regs(%rip)=0A+=09ret=0A+=0A+=09.globl=09_callthis=0A+=09=
.zerofill=20__DATA,__bss,_callthis,8,3=0A+=09.globl=09_rax=0A+=09=
.zerofill=20__DATA,__bss,_rax,8,3=0A+=09.globl=09_rbx=0A+=09.zerofill=20=
__DATA,__bss,_rbx,8,3=0A+=09.globl=09_rcx=0A+=09.zerofill=20=
__DATA,__bss,_rcx,8,3=0A+=09.globl=09_rdx=0A+=09.zerofill=20=
__DATA,__bss,_rdx,8,3=0A+=09.globl=09_rsi=0A+=09.zerofill=20=
__DATA,__bss,_rsi,8,3=0A+=09.globl=09_rdi=0A+=09.zerofill=20=
__DATA,__bss,_rdi,8,3=0A+=09.globl=09_rsp=0A+=09.zerofill=20=
__DATA,__bss,_rsp,8,3=0A+=09.globl=09_rbp=0A+=09.zerofill=20=
__DATA,__bss,_rbp,8,3=0A+=09.globl=09_r8=0A+=09.zerofill=20=
__DATA,__bss,_r8,8,3=0A+=09.globl=09_r9=0A+=09.zerofill=20=
__DATA,__bss,_r9,8,3=0A+=09.globl=09_r10=0A+=09.zerofill=20=
__DATA,__bss,_r10,8,3=0A+=09.globl=09_r11=0A+=09.zerofill=20=
__DATA,__bss,_r11,8,3=0A+=09.globl=09_r12=0A+=09.zerofill=20=
__DATA,__bss,_r12,8,3=0A+=09.globl=09_r13=0A+=09.zerofill=20=
__DATA,__bss,_r13,8,3=0A+=09.globl=09_r14=0A+=09.zerofill=20=
__DATA,__bss,_r14,8,3=0A+=09.globl=09_r15=0A+=09.zerofill=20=
__DATA,__bss,_r15,8,3=0A+=09.globl=09_ymm_regs=0A+=09.zerofill=20=
__DATA,__bss,_ymm_regs,512,5=0A+=09.globl=09_x87_regs=0A+=09.zerofill=20=
__DATA,__bss,_x87_regs,128,5=0A+=09.globl=09_volatile_var=0A+=09=
.zerofill=20__DATA,__bss,_volatile_var,8,3=0Adiff=20--git=20=
a/gcc/testsuite/gcc.target/x86_64/abi/bf16/m512bf16/abi-bf16-zmm.exp=20=
b/gcc/testsuite/gcc.target/x86_64/abi/bf16/m512bf16/abi-bf16-zmm.exp=0A=
index=20b6e0fed4cb4..28abb4e876b=20100644=0A---=20=
a/gcc/testsuite/gcc.target/x86_64/abi/bf16/m512bf16/abi-bf16-zmm.exp=0A=
+++=20=
b/gcc/testsuite/gcc.target/x86_64/abi/bf16/m512bf16/abi-bf16-zmm.exp=0A=
@@=20-36,9=20+36,15=20@@=20set=20additional_flags=20"-W=20-Wall=20=
-mavx512f"=0A=20=0A=20foreach=20src=20[lsort=20[glob=20-nocomplain=20=
$srcdir/$subdir/test_*.c]]=20{=0A=20=20=20=20=20if=20{[runtest_file_p=20=
$runtests=20$src]}=20{=0A-=20=20=20=20=20=20=20=20c-torture-execute=20=
[list=20$src=20\=0A-=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20$srcdir/$subdir/asm-support.S]=20=
\=0A-=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20$additional_flags=0A+=09if=20{=20([istarget=20=
*-*-darwin*])=20}=20then=20{=0A+=09=20=20=20=20c-torture-execute=20[list=20=
$src=20\=0A+=09=09=09=09=20=20=20=20=
$srcdir/$subdir/asm-support-darwin.S]=20\=0A+=09=09=09=09=20=20=20=20=
$additional_flags=0A+=09}=20else=20{=0A+=20=20=20=20=20=20=20=20=20=20=20=
=20c-torture-execute=20[list=20$src=20\=0A+=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20$srcdir/$subdir/asm-support.S]=20\=0A+=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
$additional_flags=0A+=20=20=20=20=20=20=20=20}=0A=20=20=20=20=20}=0A=20}=0A=
=20=0Adiff=20--git=20=
a/gcc/testsuite/gcc.target/x86_64/abi/bf16/m512bf16/args.h=20=
b/gcc/testsuite/gcc.target/x86_64/abi/bf16/m512bf16/args.h=0Aindex=20=
64b24783833..f9710bae347=20100644=0A---=20=
a/gcc/testsuite/gcc.target/x86_64/abi/bf16/m512bf16/args.h=0A+++=20=
b/gcc/testsuite/gcc.target/x86_64/abi/bf16/m512bf16/args.h=0A@@=20-51,8=20=
+51,8=20@@=20typedef=20union=20{=0A=20}=20X87_T;=0A=20extern=20void=20=
(*callthis)(void);=0A=20extern=20unsigned=20long=20long=20=
rax,rbx,rcx,rdx,rsi,rdi,rsp,rbp,r8,r9,r10,r11,r12,r13,r14,r15;=0A-ZMM_T=20=
zmm_regs[32];=0A-X87_T=20x87_regs[8];=0A+extern=20ZMM_T=20zmm_regs[32];=0A=
+extern=20X87_T=20x87_regs[8];=0A=20extern=20volatile=20unsigned=20long=20=
long=20volatile_var;=0A=20extern=20void=20snapshot=20(void);=0A=20extern=20=
void=20snapshot_ret=20(void);=0Adiff=20--git=20=
a/gcc/testsuite/gcc.target/x86_64/abi/bf16/m512bf16/asm-support-darwin.S=20=
b/gcc/testsuite/gcc.target/x86_64/abi/bf16/m512bf16/asm-support-darwin.S=0A=
new=20file=20mode=20100644=0Aindex=2000000000000..71b61b36b4f=0A---=20=
/dev/null=0A+++=20=
b/gcc/testsuite/gcc.target/x86_64/abi/bf16/m512bf16/asm-support-darwin.S=0A=
@@=20-0,0=20+1,113=20@@=0A+=09.text=0A+=09.p2align=204,,15=0A+=09.globl=20=
_snapshot=0A+_snapshot:=0A+.LFB3:=0A+=09movq=09%rax,=20_rax(%rip)=0A+=09=
movq=09%rbx,=20_rbx(%rip)=0A+=09movq=09%rcx,=20_rcx(%rip)=0A+=09movq=09=
%rdx,=20_rdx(%rip)=0A+=09movq=09%rdi,=20_rdi(%rip)=0A+=09movq=09%rsi,=20=
_rsi(%rip)=0A+=09movq=09%rbp,=20_rbp(%rip)=0A+=09movq=09%rsp,=20=
_rsp(%rip)=0A+=09movq=09%r8,=20_r8(%rip)=0A+=09movq=09%r9,=20_r9(%rip)=0A=
+=09movq=09%r10,=20_r10(%rip)=0A+=09movq=09%r11,=20_r11(%rip)=0A+=09movq=09=
%r12,=20_r12(%rip)=0A+=09movq=09%r13,=20_r13(%rip)=0A+=09movq=09%r14,=20=
_r14(%rip)=0A+=09movq=09%r15,=20_r15(%rip)=0A+=09vmovdqu32=20%zmm0,=20=
_zmm_regs+0(%rip)=0A+=09vmovdqu32=20%zmm1,=20_zmm_regs+64(%rip)=0A+=09=
vmovdqu32=20%zmm2,=20_zmm_regs+128(%rip)=0A+=09vmovdqu32=20%zmm3,=20=
_zmm_regs+192(%rip)=0A+=09vmovdqu32=20%zmm4,=20_zmm_regs+256(%rip)=0A+=09=
vmovdqu32=20%zmm5,=20_zmm_regs+320(%rip)=0A+=09vmovdqu32=20%zmm6,=20=
_zmm_regs+384(%rip)=0A+=09vmovdqu32=20%zmm7,=20_zmm_regs+448(%rip)=0A+=09=
vmovdqu32=20%zmm8,=20_zmm_regs+512(%rip)=0A+=09vmovdqu32=20%zmm9,=20=
_zmm_regs+576(%rip)=0A+=09vmovdqu32=20%zmm10,=20_zmm_regs+640(%rip)=0A+=09=
vmovdqu32=20%zmm11,=20_zmm_regs+704(%rip)=0A+=09vmovdqu32=20%zmm12,=20=
_zmm_regs+768(%rip)=0A+=09vmovdqu32=20%zmm13,=20_zmm_regs+832(%rip)=0A+=09=
vmovdqu32=20%zmm14,=20_zmm_regs+896(%rip)=0A+=09vmovdqu32=20%zmm15,=20=
_zmm_regs+960(%rip)=0A+=09vmovdqu32=20%zmm16,=20_zmm_regs+1024(%rip)=0A+=09=
vmovdqu32=20%zmm17,=20_zmm_regs+1088(%rip)=0A+=09vmovdqu32=20%zmm18,=20=
_zmm_regs+1152(%rip)=0A+=09vmovdqu32=20%zmm19,=20_zmm_regs+1216(%rip)=0A=
+=09vmovdqu32=20%zmm20,=20_zmm_regs+1280(%rip)=0A+=09vmovdqu32=20%zmm21,=20=
_zmm_regs+1344(%rip)=0A+=09vmovdqu32=20%zmm22,=20_zmm_regs+1408(%rip)=0A=
+=09vmovdqu32=20%zmm23,=20_zmm_regs+1472(%rip)=0A+=09vmovdqu32=20%zmm24,=20=
_zmm_regs+1536(%rip)=0A+=09vmovdqu32=20%zmm25,=20_zmm_regs+1600(%rip)=0A=
+=09vmovdqu32=20%zmm26,=20_zmm_regs+1664(%rip)=0A+=09vmovdqu32=20%zmm27,=20=
_zmm_regs+1728(%rip)=0A+=09vmovdqu32=20%zmm28,=20_zmm_regs+1792(%rip)=0A=
+=09vmovdqu32=20%zmm29,=20_zmm_regs+1856(%rip)=0A+=09vmovdqu32=20%zmm30,=20=
_zmm_regs+1920(%rip)=0A+=09vmovdqu32=20%zmm31,=20_zmm_regs+1984(%rip)=0A=
+=09jmp=09*_callthis(%rip)=0A+.LFE3:=0A+=0A+=09.p2align=204,,15=0A+=09=
.globl=20_snapshot_ret=0A+_snapshot_ret:=0A+=09movq=09%rdi,=20_rdi(%rip)=0A=
+=09subq=09$8,=20%rsp=0A+=09call=09*_callthis(%rip)=0A+=09addq=09$8,=20=
%rsp=0A+=09movq=09%rax,=20_rax(%rip)=0A+=09movq=09%rdx,=20_rdx(%rip)=0A+=09=
vmovdqu32=09%zmm0,=20_zmm_regs+0(%rip)=0A+=09vmovdqu32=09%zmm1,=20=
_zmm_regs+64(%rip)=0A+=09fstpt=09_x87_regs(%rip)=0A+=09fstpt=09=
_x87_regs+16(%rip)=0A+=09fldt=09_x87_regs+16(%rip)=0A+=09fldt=09=
_x87_regs(%rip)=0A+=09ret=0A+=0A+=09.globl=09_callthis=0A+=09.zerofill=20=
__DATA,__bss,_callthis,8,3=0A+=09.globl=09_rax=0A+=09.zerofill=20=
__DATA,__bss,_rax,8,3=0A+=09.globl=09_rbx=0A+=09.zerofill=20=
__DATA,__bss,_rbx,8,3=0A+=09.globl=09_rcx=0A+=09.zerofill=20=
__DATA,__bss,_rcx,8,3=0A+=09.globl=09_rdx=0A+=09.zerofill=20=
__DATA,__bss,_rdx,8,3=0A+=09.globl=09_rsi=0A+=09.zerofill=20=
__DATA,__bss,_rsi,8,3=0A+=09.globl=09_rdi=0A+=09.zerofill=20=
__DATA,__bss,_rdi,8,3=0A+=09.globl=09_rsp=0A+=09.zerofill=20=
__DATA,__bss,_rsp,8,3=0A+=09.globl=09_rbp=0A+=09.zerofill=20=
__DATA,__bss,_rbp,8,3=0A+=09.globl=09_r8=0A+=09.zerofill=20=
__DATA,__bss,_r8,8,3=0A+=09.globl=09_r9=0A+=09.zerofill=20=
__DATA,__bss,_r9,8,3=0A+=09.globl=09_r10=0A+=09.zerofill=20=
__DATA,__bss,_r10,8,3=0A+=09.globl=09_r11=0A+=09.zerofill=20=
__DATA,__bss,_r11,8,3=0A+=09.globl=09_r12=0A+=09.zerofill=20=
__DATA,__bss,_r12,8,3=0A+=09.globl=09_r13=0A+=09.zerofill=20=
__DATA,__bss,_r13,8,3=0A+=09.globl=09_r14=0A+=09.zerofill=20=
__DATA,__bss,_r14,8,3=0A+=09.globl=09_r15=0A+=09.zerofill=20=
__DATA,__bss,_r15,8,3=0A+=09.globl=09_zmm_regs=0A+=09.zerofill=20=
__DATA,__bss,_zmm_regs,2048,6=0A+=09.globl=09_x87_regs=0A+=09.zerofill=20=
__DATA,__bss,_x87_regs,128,5=0A+=09.globl=09_volatile_var=0A+=09=
.zerofill=20__DATA,__bss,_volatile_var,8,3=0A--=20=0A2.37.1=20(Apple=20=
Git-137.1)=0A=0A=

--Apple-Mail=_1D76BB85-D8C0-4E24-AFBE-C5AF1569CF79--