From: "juzhe.zhong@rivai.ai" <juzhe.zhong@rivai.ai>
To: jeffreyalaw <jeffreyalaw@gmail.com>,
gcc-patches <gcc-patches@gcc.gnu.org>
Cc: kito.cheng <kito.cheng@gmail.com>,
Kito.cheng <kito.cheng@sifive.com>,
"Robin Dapp" <rdapp.gcc@gmail.com>
Subject: Re: Re: [PATCH] RISC-V: Fix VLMAX AVL incorrect local anticipate [VSETVL PASS]
Date: Thu, 10 Aug 2023 08:50:08 +0800 [thread overview]
Message-ID: <EA37D79857BEDA61+202308100850076590370@rivai.ai> (raw)
In-Reply-To: <c5640472-b150-7aac-9f59-9edec23ca01f@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 2580 bytes --]
Yes. I think so. Will backport GCC 13 soon.
juzhe.zhong@rivai.ai
From: Jeff Law
Date: 2023-08-10 01:01
To: Juzhe-Zhong; gcc-patches
CC: kito.cheng; kito.cheng; rdapp.gcc
Subject: Re: [PATCH] RISC-V: Fix VLMAX AVL incorrect local anticipate [VSETVL PASS]
On 8/9/23 04:51, Juzhe-Zhong wrote:
> Realize we have a bug in VSETVL PASS which is triggered by strided_load_run-1.c in RV32 system.
>
> FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c execution test
> FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c execution test
> FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c execution test
> FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c execution test
>
> This is because VSETVL PASS incorrect hoist vsetvl instruction:
>
> ...
> 10156: 0d9075d7 vsetvli a1,zero,e64,m2,ta,ma ---> pollute 'a1' register which will be used by following insns.
> 1015a: 01d586b3 add a3,a1,t4 --------> use 'a1'
> 1015e: 5e070257 vmv.v.v v4,v14
> 10162: b7032257 vmacc.vv v4,v6,v16
> 10166: 26440257 vand.vv v4,v4,v8
> 1016a: 22880227 vs2r.v v4,(a6)
> 1016e: 00b6b7b3 sltu a5,a3,a1
> 10172: 22888227 vs2r.v v4,(a7)
> 10176: 9e60b157 vmv2r.v v2,v6
> 1017a: 97ba add a5,a5,a4
> 1017c: a6a62157 vmadd.vv v2,v12,v10
> 10180: 26240157 vand.vv v2,v2,v8
> 10184: 22830127 vs2r.v v2,(t1)
> 10188: 873e mv a4,a5
> 1018a: 982a add a6,a6,a0
> 1018c: 98aa add a7,a7,a0
> 1018e: 932a add t1,t1,a0
> 10190: 85b6 mv a1,a3 -----> set 'a1'
> ...
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix incorrect anticipate info.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c: Adapt test.
> * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c: Ditto.
OK.
Do we need to backport this to gcc-13?
jeff
next prev parent reply other threads:[~2023-08-10 0:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-09 10:51 Juzhe-Zhong
2023-08-09 17:01 ` Jeff Law
2023-08-09 23:43 ` Li, Pan2
2023-08-10 0:50 ` juzhe.zhong [this message]
2023-08-10 4:33 ` Li, Pan2
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