From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 3667 invoked by alias); 5 Mar 2015 07:02:27 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 3655 invoked by uid 89); 5 Mar 2015 07:02:26 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-lb0-f170.google.com Received: from mail-lb0-f170.google.com (HELO mail-lb0-f170.google.com) (209.85.217.170) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Thu, 05 Mar 2015 07:02:25 +0000 Received: by lbvp9 with SMTP id p9so14172965lbv.10 for ; Wed, 04 Mar 2015 23:02:21 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:content-type:mime-version:subject:from :in-reply-to:date:cc:content-transfer-encoding:message-id:references :to; bh=bROL2KZuBXUAX3NcquoavMmWxDNBRwpRSRl3DgMpRhk=; b=gBr+63JmbwnXXW1BkL2C/ggXrwUcm/N+mGvQh99o34egKAThAkm66gEGRHTMvdqnb6 qnvBeTTvbfZ/nWATLVyIEe4QM/kPR0t3X8iZEfgtxvdUtlLOeGE1D2Z0NaDBgZb3SQUX m05GD2MZodFj6BnwtkXLg3i4QrXdD48WEzzZK/uibyWMJuC60RjQmQ9x3voCDfJvurnU iGeCSljyoENfYOudwjE3kLEkNIQe9NtovpgoC+dartAUtm4s0Zu6LxMjo3lss1UpaQ96 47aIerjn3LAEW+8QVxmXS5pnxrThjtMuxfGkdV59SlTQ/KlMS+gP4kKpkmQ/Q+5D/olZ BMvg== X-Gm-Message-State: ALoCoQmOyOwOOLMHsWLWpmrxQP6FCGkpT8IfMZrb044cPHUiPs6uUnnorfTLfqvYnr5mDdU3RDyv X-Received: by 10.112.78.37 with SMTP id y5mr6347815lbw.91.1425538941396; Wed, 04 Mar 2015 23:02:21 -0800 (PST) Received: from [192.168.43.225] ([195.16.111.83]) by mx.google.com with ESMTPSA id x9sm1124924lax.20.2015.03.04.23.02.19 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 04 Mar 2015 23:02:20 -0800 (PST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 8.2 \(2070.6\)) Subject: Re: [PATCH][ARM]Automatically add -mthumb for thumb-only target when mode isn't specified From: Maxim Kuvyrkov In-Reply-To: Date: Thu, 05 Mar 2015 07:02:00 -0000 Cc: Terry Guo , GCC Patches , Ramana Radhakrishnan , Richard Earnshaw Content-Transfer-Encoding: quoted-printable Message-Id: References: <000001d0548a$789a1bd0$69ce5370$@arm.com> <0E847550-2947-46C3-991C-2720641BC881@linaro.org> <4FE4F7E6-5093-4E37-A2D6-93272E679C69@linaro.org> To: Terry Guo X-SW-Source: 2015-03/txt/msg00263.txt.bz2 > On Mar 5, 2015, at 9:14 AM, Terry Guo wrote: >=20 >>=20 >> Thanks Terry (and everyone else) for explaining why we want to do this i= n the driver. The substance of the patch looks good to me, and below are s= ome comments and nit-picks. (Also, I'm not an ARM maintainer, so this is a= review, not an approval to commit). >>=20 >> Please make sure to update changelog before committing. >>=20 >=20 > Thanks Maxim, your comments are great. I accepted all of them and > commented two of them that I am not clear. >=20 > <> >>> + >>> +struct arm_arch_core_flag >>> +{ >>> + const char *const name; >>> + const unsigned long flags; >>> +}; >>> + >>> +static const struct arm_arch_core_flag arm_arch_core_flags[] =3D >>> +{ >>> +#undef ARM_CORE >>> +#define ARM_CORE(NAME, X, IDENT, ARCH, FLAGS, COSTS) \ >>> + {NAME, FLAGS | FL_FOR_ARCH##ARCH}, >>> +#include "arm-cores.def" >>> +#undef ARM_CORE >>> +#undef ARM_ARCH >>> +#define ARM_ARCH(NAME, CORE, ARCH, FLAGS) \ >>> + {NAME, FLAGS}, >>> +#include "arm-arches.def" >>> +#undef ARM_ARCH >>> + {NULL, 0} >>> +}; >>=20 >> Did you consider implications from mixing ARCHes and CPUs in the same ar= ray? It should not be a problem, but would you please double-check that ca= ses like "-march=3Dcortex-a15" are properly caught as errors elsewhere in t= he driver? >>=20 >=20 > Not sure I follow you correctly here. This array is just used for my > new arm_target_thumb_only function. It isn't used by any another code > in gcc. So I don't think mixing them will break gcc option check > mechanism. I tried below command and I can get error message: >=20 > $ ./install-native/bin/arm-none-eabi-gcc -march=3Dcortex-a15 x.c -S -mthu= mb > arm-none-eabi-gcc: error: unrecognized argument in option '-march=3Dcorte= x-a15' I'm just being paranoid here. The above check you did is all I wanted. >=20 >>> #endif >>> diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h >>> index 28ffe52..325a81c 100644 >>> --- a/gcc/config/arm/arm-protos.h >>> +++ b/gcc/config/arm/arm-protos.h >>> @@ -325,75 +325,6 @@ extern const char *arm_rewrite_selected_cpu (const= char *name); >>>=20 >>> extern bool arm_is_constant_pool_ref (rtx); >>>=20 >>> -/* Flags used to identify the presence of processor capabilities. */ >>=20 >> You've lost this comment in the new file. Was it intentional? >>=20 >=20 > The line is used as first line in new file arm-flags.h. Ack. Thanks, -- Maxim Kuvyrkov www.linaro.org