From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 3941 invoked by alias); 20 Oct 2014 19:16:52 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 3930 invoked by uid 89); 20 Oct 2014 19:16:51 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pd0-f182.google.com Received: from mail-pd0-f182.google.com (HELO mail-pd0-f182.google.com) (209.85.192.182) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Mon, 20 Oct 2014 19:16:50 +0000 Received: by mail-pd0-f182.google.com with SMTP id y10so5576270pdj.27 for ; Mon, 20 Oct 2014 12:16:49 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:content-type:mime-version:subject:from :in-reply-to:date:cc:content-transfer-encoding:message-id:references :to; bh=WbzeNpgLorICe1Ers8jSvyrXs3k79FXAXQOZ1xcEVqQ=; b=jl1jgFMf5PIPHUv0PVJBk0diPAtHBItWkUblxZyJ7CLyOF+y//I/+w/yGpAZndegKo VGur4rjfYtl8Tce2pVaXdtyVXNY/IGcEFFuxvVxkyx4rha2prgL9wNh9SOGUGTtfIfVU m4poIlRGtaQoXxnClJviwGJsBRoVip1F+EcjWOA2komrGiP1jgwQCEpqBCP8/AXS7yeO X55ibJaHA+DlTDFD1DqnBPRHBjDRiUVouYGkJTKrtd38+Jiaj7aeLFWdqrrt0J6HTYfL qMEZe1WYKQf6wHLbOAoi2bSUm0gXYaiWFKx7GYM2Nh1lnlBT5XizFZrlePSQ+KJfUlpK T/tA== X-Gm-Message-State: ALoCoQkrXp9YLSY6tY+nt7WqIdsOAfrFUpkX+I9QcYDr6pCp0o3nDMzZrHW5ej75WJsNWgH8d9gj X-Received: by 10.66.255.65 with SMTP id ao1mr29492172pad.42.1413832608855; Mon, 20 Oct 2014 12:16:48 -0700 (PDT) Received: from [192.168.0.122] (121-99-179-86.bng1.nct.orcon.net.nz. [121.99.179.86]) by mx.google.com with ESMTPSA id rb2sm9944558pab.5.2014.10.20.12.16.45 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 20 Oct 2014 12:16:47 -0700 (PDT) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 7.3 \(1878.6\)) Subject: Re: [PATCH] Account for prologue spills in reg_pressure scheduling From: Maxim Kuvyrkov In-Reply-To: <20141020191105.GB30024@f1.c.bardezibar.internal> Date: Mon, 20 Oct 2014 19:23:00 -0000 Cc: GCC Patches , Vladimir Makarov , Richard Sandiford Content-Transfer-Encoding: quoted-printable Message-Id: References: <20141020191105.GB30024@f1.c.bardezibar.internal> To: Sebastian Pop X-SW-Source: 2014-10/txt/msg01962.txt.bz2 On Oct 21, 2014, at 8:11 AM, Sebastian Pop wrote: > Maxim Kuvyrkov wrote: >> Hi, >>=20 >> This patch improves register pressure scheduling (both SCHED_PRESSURE_WE= IGHTED and SCHED_PRESSURE_MODEL) to better estimate number of available reg= isters. >>=20 >> At the moment the scheduler does not account for spills in the prologues= and restores in the epilogue, which occur from use of call-used registers.= The current state is, essentially, optimized for case when there is a hot= loop inside the function, and the loop executes significantly more often t= han the prologue/epilogue. However, on the opposite end, we have a case whe= n the function is just a single non-cyclic basic block, which executes just= as often as prologue / epilogue, so spills in the prologue hurt performanc= e as much as spills in the basic block itself. In such a case the schedule= r should throttle-down on the number of available registers and try to not = go beyond call-clobbered registers. >>=20 >> The patch uses basic block frequencies to balance the cost of using call= -used registers for intermediate cases between the two above extremes. >>=20 >> The motivation for this patch was a floating-point testcase on arm-linux= -gnueabihf (ARM is one of the few targets that use register pressure schedu= ling by default). >>=20 >=20 > Does aarch64 enable reg pressure sched by default, or what is the flag to= enable it? > I'm planing to look at the perf impact of the patch. Thanks, benchmarking results are welcome! AArch64 doesn't use reg_pressure= scheduling by default. Use "-fsched-pressure --param=3Dsched-pressure-alg= orithm=3D2" to enable same thing as on ARM. I would imagine C++ and Fortra= n floating-point code to be most affected. -- Maxim Kuvyrkov www.linaro.org