From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 25565 invoked by alias); 29 Sep 2015 21:24:34 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 25529 invoked by uid 89); 29 Sep 2015 21:24:30 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_PASS,T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: resqmta-po-05v.sys.comcast.net Received: from resqmta-po-05v.sys.comcast.net (HELO resqmta-po-05v.sys.comcast.net) (96.114.154.164) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 29 Sep 2015 21:24:29 +0000 Received: from resomta-po-16v.sys.comcast.net ([96.114.154.240]) by resqmta-po-05v.sys.comcast.net with comcast id P9QP1r0075BUCh4019QUGH; Tue, 29 Sep 2015 21:24:28 +0000 Received: from [IPv6:2001:558:6045:a4:40c6:7199:cd03:b02d] ([IPv6:2001:558:6045:a4:40c6:7199:cd03:b02d]) by resomta-po-16v.sys.comcast.net with comcast id P9QS1r00J2ztT3H019QTqX; Tue, 29 Sep 2015 21:24:27 +0000 Content-Type: text/plain; charset=windows-1252 Mime-Version: 1.0 (Mac OS X Mail 7.3 \(1878.6\)) Subject: Re: [PATCH] x86 interrupt attribute From: Mike Stump In-Reply-To: Date: Tue, 29 Sep 2015 22:10:00 -0000 Cc: Yulia Koval , GCC Patches , Uros Bizjak Content-Transfer-Encoding: quoted-printable Message-Id: References: <2AB9494F-91EC-4CF6-945B-0CB03A583513@comcast.net> To: "H.J. Lu" X-IsSubscribed: yes X-SW-Source: 2015-09/txt/msg02270.txt.bz2 On Sep 29, 2015, at 1:59 PM, H.J. Lu wrote: > commit f3a6675a8d69d810d2cad0c090a762094a0a8622 > Author: H.J. Lu > Date: Tue Sep 29 13:47:18 2015 -0700 >=20 > Define EPILOGUE_USES in i386 so that all preserved registers are used > by the epilogue of interrupt handler. Don't explicitly mark BP and SP > registers as used since they are always used in epilogue. >=20 > Please take a look. Oh, too bad you didn=92t copy it here. The easiest thing to blow is the ad= dition of reload_completed && on the condition: /* An interrupt handler must preserve some registers that are=20=20=20=20= =20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20=20=20=20=20 ordinarily call-clobbered. */ if (reload_completed && myarch_interrupt_func (current_function_decl) && save_reg_p (regno)) return true; without it, the optimizer will blow chunks all over the place and code-gen = will not be very good, if it doesn=92t. I=92d love this to be shared acros= s all ports, it it is cryptic and usually test cases are not elaborate enou= gh to find the problem. When we ported a large library to our system that = made extensive uses of complex interrupt routines, the compiler blew chunks= . With lessor code, we never even noticed a problem.