From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 7703 invoked by alias); 13 Jan 2015 23:47:26 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 7690 invoked by uid 89); 13 Jan 2015 23:47:25 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=AWL,BAYES_40,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 13 Jan 2015 23:47:23 +0000 Received: from svr-orw-fem-02x.mgc.mentorg.com ([147.34.96.206] helo=SVR-ORW-FEM-02.mgc.mentorg.com) by relay1.mentorg.com with esmtp id 1YBBB9-0007Tx-Hr from Catherine_Moore@mentor.com ; Tue, 13 Jan 2015 15:47:19 -0800 Received: from NA-MBX-04.mgc.mentorg.com ([169.254.4.117]) by SVR-ORW-FEM-02.mgc.mentorg.com ([147.34.96.168]) with mapi id 14.03.0224.002; Tue, 13 Jan 2015 15:47:19 -0800 From: "Moore, Catherine" To: Matthew Fortune CC: "'gcc-patches@gcc.gnu.org' (gcc-patches@gcc.gnu.org)" Subject: RE: [MIPS] Re-enable ABI->ISA inference Date: Wed, 14 Jan 2015 00:44:00 -0000 Message-ID: References: <6D39441BF12EF246A7ABCE6654B0235320F95F07@LEMAIL01.le.imgtec.org> In-Reply-To: <6D39441BF12EF246A7ABCE6654B0235320F95F07@LEMAIL01.le.imgtec.org> Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-SW-Source: 2015-01/txt/msg00960.txt.bz2 > -----Original Message----- > From: Matthew Fortune [mailto:Matthew.Fortune@imgtec.com] > Sent: Monday, January 05, 2015 6:09 PM > To: Moore, Catherine > Cc: 'gcc-patches@gcc.gnu.org' (gcc-patches@gcc.gnu.org) > Subject: [MIPS] Re-enable ABI->ISA inference >=20 > The R6 patch introduced MIPS_ISA_LEVEL_SPEC into DRIVER_SELF_SPECS for > all configurations. One part of MIPS_ISA_LEVEL_SPEC is however > incompatible with those configurations which infer an ISA from an ABI > without specifically setting the default ISAs using --with-arch-[32|64]. >=20 > I.e. a generic mips-linux (--enable-targets=3Dall) and mips64-linux would= fail to > build the n32/n64 multilibs as -mips1 would be introduced by > DRIVER_SELF_SPECS. >=20 > I have therefore split MIPS_ISA_LEVEL_SPEC into two. One part is suitable > for all confgurations and one part is only suitable for configurations th= at infer > an ABI from an ISA (these tend to be cross-compiler vendor configurations) >=20 > I have built and checked the driver generated options for all relevant > configurations and everything appears to work. >=20 > Let me know if you can see any problems with this? >=20 > Thanks, > Matthew >=20 > gcc/ >=20 > =A0=A0=A0=A0 * config/mips/mips.h (MIPS_ISA_LEVEL_SPEC): Only infer an ISA > =A0=A0=A0=A0 level from an ARCH; do not inject the default. > =A0=A0=A0=A0 (MIPS_DEFAULT_ISA_LEVEL_SPEC): New macro split out from > =A0=A0=A0=A0 MIPS_ISA_LEVEL_SPEC. > =A0=A0=A0=A0 (MIPS_ISA_NAN2008_SPEC): Update comment. > =A0=A0=A0=A0 (BASE_DRIVER_SELF_SPECS): Likewise. > =A0=A0=A0=A0 * config/mips/elfoabi.h (DRIVER_SELF_SPECS): Add > =A0=A0=A0=A0 MIPS_DEFAULT_ISA_LEVEL_SPEC. > =A0=A0=A0=A0 * config/mips/mti-elf.h (DRIVER_SELF_SPECS): Likewise. > =A0=A0=A0=A0 * config/mips/mti-linux.h (DRIVER_SELF_SPECS): Likewise. > =A0=A0=A0=A0 * config/mips/sde.h (DRIVER_SELF_SPECS): Likewise. > --- This looks OK.