From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 41417 invoked by alias); 14 Jul 2015 21:24:18 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 41363 invoked by uid 89); 14 Jul 2015 21:24:17 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 14 Jul 2015 21:24:15 +0000 Received: from svr-orw-fem-04.mgc.mentorg.com ([147.34.97.41]) by relay1.mentorg.com with esmtp id 1ZF7gS-00014h-3Q from Catherine_Moore@mentor.com ; Tue, 14 Jul 2015 14:24:12 -0700 Received: from NA-MBX-04.mgc.mentorg.com ([169.254.4.176]) by SVR-ORW-FEM-04.mgc.mentorg.com ([147.34.97.41]) with mapi id 14.03.0224.002; Tue, 14 Jul 2015 14:24:11 -0700 From: "Moore, Catherine" To: Robert Suchanek , Matthew Fortune , "gcc-patches@gcc.gnu.org" Subject: RE: [PATCH, MIPS] Support new interrupt handler options Date: Tue, 14 Jul 2015 21:30:00 -0000 Message-ID: References: In-Reply-To: Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-SW-Source: 2015-07/txt/msg01208.txt.bz2 > -----Original Message----- > From: Robert Suchanek [mailto:Robert.Suchanek@imgtec.com] > Sent: Tuesday, July 14, 2015 11:14 AM > To: Moore, Catherine; Matthew Fortune; gcc-patches@gcc.gnu.org > Subject: RE: [PATCH, MIPS] Support new interrupt handler options >=20 > Hi Catherine, >=20 > > I'm getting build errors with the current TOT and your patch. > > > > The first errors that I encounter are: > > gcc/config/mips/mips.c:1355:1: warning: 'mips_int_mask > > mips_interrupt_mask(tree)' defined but not used [-Wunused-function] > > gcc/config/mips/mips.c:1392:1: warning: 'mips_shadow_set > > mips_use_shadow_register_set(tree)' defined but not used > > [-Wunused-function] > > > > Removing these two functions results in further errors that I have not > > investigated. > > Will you try applying and building your patch again? >=20 > I have no explanation why this could happen. My guess is that a part of = the > patch did not apply correctly. Those functions are used in > mips_compute_frame_info(). >=20 > I did notice and fixed warnings about unused variables/arguments. I re-ran patch with the verbose option and found that it was silently disca= rding hunks (starting with #7) because it thought it was garbage. >=20 > > > > I have a couple of further comments on the existing patch, see below. >=20 > Comments added. Please have a look at the attached revised patch. > Tested against r225768. >=20 > Regards, > Robert >=20 >=20 > gcc/ > * config/mips/mips.c (mips_int_mask): New enum. > (mips_shadow_set): Likewise. > (int_mask): New variable. > (use_shadow_register_set_p): Change type to enum > mips_shadow_set. > (machine_function): Add int_mask and use_shadow_register_set. > (mips_attribute_table): Add attribute handlers for interrupt and > use_shadow_register_set. > (mips_interrupt_mask): New static function. > (mips_handle_interrupt_attr): Likewise. > (mips_handle_use_shadow_register_set_attr): Likewise. > (mips_use_shadow_register_set): Change return type to enum > mips_shadow_set. Add argument handling for > use_shadow_register_set > attribute. > (mips_interrupt_extra_called_saved_reg_p): Update the conditional > to > compare with mips_shadow_set enum. > (mips_compute_frame_info): Add interrupt mask and > use_shadow_register_set to per-function information structure. > Add a stack slot for EPC unconditionally. > (mips_expand_prologue): Compare use_shadow_register_set value > with mips_shadow_set enum. Save EPC always in K1, clobber only K1 > for > masked interrupt register but in EIC mode use K0 and save Cause in > K0. > EPC saved and restored unconditionally. Use PMODE_INSN macro > when > copying the stack pointer from the shadow register set. > * config/mips/mips.h (SR_IM0): New define. > * config/mips/mips.md (mips_rdpgpr): Rename to... > (mips_rdpgpr_): ...this. Use the Pmode iterator. > * doc/extend.texi (Declaring Attributes of Functions): Document > optional arguments for interrupt and use_shadow_register_set > attributes. >=20 > gcc/testsuite/ > * gcc.target/mips/interrupt_handler-4.c: New test. This is now OK to commit. Catherine