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received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Aug 2017 10:18:03.5179 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR08MB2657 X-SW-Source: 2017-08/txt/msg00048.txt.bz2 ping From: Wilco Dijkstra Sent: 26 July 2017 14:46 To: GCC Patches; James Greenhalgh Cc: nd Subject: [PATCH][AArch64] Remove '*' from movsi/di/ti patterns =A0=20=20=20 Remove the remaining uses of '*' from the movsi/di/ti patterns. Using '*' in alternatives is typically incorrect at it tells the register allocator to ignore those alternatives.=A0 So remove these from all the integer move patterns.=A0 This removes unnecessary int to float moves, for example gcc.target/aarch64/pr62178.c no longer generates a redundant fmov since the w =3D m variant is now allowed. Passes regress & bootstrap, OK for commit? ChangeLog: 2017-07-26=A0 Wilco Dijkstra=A0 =A0=A0=A0=A0=A0=A0=A0 * gcc/config/aarch64/aarch64.md (movsi_aarch64): Remo= ve all '*'. =A0=A0=A0=A0=A0=A0=A0 (movdi_aarch64): Likewise. =A0=A0=A0=A0=A0=A0=A0 (movti_aarch64): Likewise. -- diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 225b64e1daf1663d28bbe8c2d30ba373b4722176..97c5fb08a2fd5d2eee556e1fc20= dbf65b089d84b 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -920,8 +920,8 @@ (define_expand "mov" =A0) =A0 =A0(define_insn_and_split "*movsi_aarch64" -=A0 [(set (match_operand:SI 0 "nonimmediate_operand" "=3Dr,k,r,r,r,r,*w,m,= =A0 m,r,r=A0 ,*w,r,*w") -=A0=A0=A0=A0=A0=A0 (match_operand:SI 1 "aarch64_mov_operand"=A0 " r,r,k,M,= n,m, m,rZ,*w,Usa,Ush,rZ,w,*w"))] +=A0 [(set (match_operand:SI 0 "nonimmediate_operand" "=3Dr,k,r,r,r,r,w,m, = m,=A0 r,=A0 r, w,r,w") +=A0=A0=A0=A0=A0=A0 (match_operand:SI 1 "aarch64_mov_operand"=A0 " r,r,k,M,= n,m,m,rZ,w,Usa,Ush,rZ,w,w"))] =A0=A0 "(register_operand (operands[0], SImode) =A0=A0=A0=A0 || aarch64_reg_or_zero (operands[1], SImode))" =A0=A0 "@ @@ -952,8 +952,8 @@ (define_insn_and_split "*movsi_aarch64" =A0) =A0 =A0(define_insn_and_split "*movdi_aarch64" -=A0 [(set (match_operand:DI 0 "nonimmediate_operand" "=3Dr,k,r,r,r,r,*w,m,= =A0 m,r,r,=A0 *w,r,*w,w") -=A0=A0=A0=A0=A0=A0 (match_operand:DI 1 "aarch64_mov_operand"=A0 " r,r,k,N,= n,m, m,rZ,*w,Usa,Ush,rZ,w,*w,Dd"))] +=A0 [(set (match_operand:DI 0 "nonimmediate_operand" "=3Dr,k,r,r,r,r,w, m,= m,=A0 r,=A0 r, w,r,w,w") +=A0=A0=A0=A0=A0=A0 (match_operand:DI 1 "aarch64_mov_operand"=A0 " r,r,k,N,= n,m,m,rZ,w,Usa,Ush,rZ,w,w,Dd"))] =A0=A0 "(register_operand (operands[0], DImode) =A0=A0=A0=A0 || aarch64_reg_or_zero (operands[1], DImode))" =A0=A0 "@ @@ -1008,9 +1008,9 @@ (define_expand "movti" =A0 =A0(define_insn "*movti_aarch64" =A0=A0 [(set (match_operand:TI 0 -=A0=A0=A0=A0=A0=A0=A0 "nonimmediate_operand"=A0 "=3Dr, *w,r ,*w,r,m,m,*w,m= ") +=A0=A0=A0=A0=A0=A0=A0 "nonimmediate_operand"=A0 "=3Dr, w,r,w,r,m,m,w,m") =A0=A0=A0=A0=A0=A0=A0=A0 (match_operand:TI 1 -=A0=A0=A0=A0=A0=A0=A0 "aarch64_movti_operand" " rn,r ,*w,*w,m,r,Z, m,*w"))] +=A0=A0=A0=A0=A0=A0=A0 "aarch64_movti_operand" " rn,r,w,w,m,r,Z,m,w"))] =A0=A0 "(register_operand (operands[0], TImode) =A0=A0=A0=A0 || aarch64_reg_or_zero (operands[1], TImode))" =A0=A0 "@=20=20=20=20